From mboxrd@z Thu Jan  1 00:00:00 1970
From: t-kristo@ti.com (Tero Kristo)
Date: Mon, 19 Aug 2013 16:46:21 +0300
Subject: [PATCHv5 07/31] CLK: TI: add omap4 clock init file
In-Reply-To: <20130805072704.GS7656@atomide.com>
References: <1375460751-23676-1-git-send-email-t-kristo@ti.com>
 <1375460751-23676-8-git-send-email-t-kristo@ti.com>
 <20130805072704.GS7656@atomide.com>
Message-ID: <521221AD.7090703@ti.com>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On 08/05/2013 10:27 AM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [130802 09:33]:
>> clk-44xx.c now contains the clock init functionality for omap4, including
>> DT clock registration and adding of static clkdev entries.
>
> Few comments below from "boot new hardware with old kernels" point of
> view that seems to be pretty close for clocks.
>
>> --- /dev/null
>> +++ b/drivers/clk/ti/clk-44xx.c
> ...
>
>> +int __init omap4xxx_clk_init(void)
>> +{
>> +	int rc;
>> +	struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
>> +
>> +	/* FIXME register clocks from DT first */
>> +	of_clk_init(NULL);
>> +
>> +	omap_dt_clocks_register(omap44xx_clks);
>> +
>> +	omap2_clk_disable_autoidle_all();
>> +
>> +	/*
>> +	 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
>> +	 * state when turning the ABE clock domain. Workaround this by
>> +	 * locking the ABE DPLL on boot.
>> +	 * Lock the ABE DPLL in any case to avoid issues with audio.
>> +	 */
>> +	abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
>> +	sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
>> +	rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
>> +	abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
>> +	if (!rc)
>> +		rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
>> +	if (rc)
>> +		pr_err("%s: failed to configure ABE DPLL!\n", __func__);
>> +
>> +	/*
>> +	 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
>> +	 * domain can transition to retention state when not in use.
>> +	 */
>> +	usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
>> +	rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
>> +	if (rc)
>> +		pr_err("%s: failed to configure USB DPLL!\n", __func__);
>> +
>> +	return 0;
>> +}
>
> Maybe try to have a generic init function, then have SoC specific
> quirk function pointers set up based on the DT compatible property?
>
> Grep for varioius _of_match[] examples in the drivers.
>
> That way you might be able to make clocks work for some new similar
> hardware with just .dts change and patching in the quirks later on
> as needed ;)

I'll see what can be done for this once I figure out what to do with the 
clkdev alias stuff. :)

-Tero

>
> Regards,
>
> Tony
>