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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3b911469bffsm9885157f8f.36.2025.08.14.07.02.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Aug 2025 07:02:40 -0700 (PDT) Message-ID: <52887b08-d5bc-4710-af7c-a70fab5e7f81@linaro.org> Date: Thu, 14 Aug 2025 16:02:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] clocksource/drivers/arm_arch_timer: Add standalone MMIO driver To: Marc Zyngier , Steven Price Cc: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Rafael J. Wysocki" , Thomas Gleixner , Mark Rutland References: <20250807160243.1970533-1-maz@kernel.org> <20250807160243.1970533-3-maz@kernel.org> <8e58b01b-772d-4ca7-a681-34f10baa07e6@arm.com> <86ldnmdvpl.wl-maz@kernel.org> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <86ldnmdvpl.wl-maz@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250814_070243_360754_523DE5DF X-CRM114-Status: GOOD ( 22.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 14/08/2025 12:49, Marc Zyngier wrote: > On Thu, 14 Aug 2025 11:13:47 +0100, > Steven Price wrote: >> >> On 07/08/2025 17:02, Marc Zyngier wrote: >>> Add a new driver for the MMIO side of the ARM architected timer. >>> Most of it has been lifted from the existing arch timer code, >>> massaged, and finally rewritten. >>> >>> It supports both DT and ACPI as firmware descriptions. >>> >>> Signed-off-by: Marc Zyngier >>> --- >>> MAINTAINERS | 1 + >>> drivers/clocksource/arm_arch_timer_mmio.c | 420 ++++++++++++++++++++++ >>> 2 files changed, 421 insertions(+) >>> create mode 100644 drivers/clocksource/arm_arch_timer_mmio.c >>> >> [...] >>> +static void arch_timer_mmio_setup(struct arch_timer *at, int irq) >>> +{ >>> + at->evt = (struct clock_event_device) { >>> + .features = (CLOCK_EVT_FEAT_ONESHOT | >>> + CLOCK_EVT_FEAT_DYNIRQ), >>> + .name = "arch_mem_timer", >>> + .rating = 400, >>> + .cpumask = cpu_possible_mask, >>> + .irq = irq, >>> + .set_next_event = arch_timer_mmio_set_next_event, >>> + .set_state_oneshot_stopped = arch_timer_mmio_shutdown, >>> + .set_state_shutdown = arch_timer_mmio_shutdown, >>> + }; >>> + >>> + at->evt.set_state_shutdown(&at->evt); >>> + >>> + clockevents_config_and_register(&at->evt, at->rate, 0xf, CLOCKSOURCE_MASK(56)); >> >> This doesn't work on 32 bit - clockevents_config_and_register()'s final >> argument is an unsigned long, and a 56 bit mask doesn't fit. This >> triggers a compiler warning: > > Already reported, see 20250814111657.7debc9f1@canb.auug.org.au. > >> Possible this should really be min(CLOCKSOURCE_MASK(56), ULONG_MAX)? But >> I'm not familiar enough with this code. Most likely it's dead code on a >> 32 bit platform. > > No, this definitely exists on 32bit crap, since it has been part of > the architecture from the ARMv7+VE days. > > I think this is more of an impedance mismatch between the > CLOCKSOURCE_MASK() helper and the clockevents_config_and_register(), > and a (unsigned long) cast would do the trick. > > But it also means that the per-cpu timer also gets truncated the same > way, and that has interesting impacts on how often the timer is > reprogrammed. > > Daniel, do you want a patch on top or a new series? A new series please Thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog