From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC 1/4] phy: Add new Exynos5 USB 3.0 PHY driver
Date: Wed, 20 Nov 2013 21:14:44 +0530 [thread overview]
Message-ID: <528CD8EC.9050403@ti.com> (raw)
In-Reply-To: <CAFp+6iF3UnV-w2pYQE2THQZBGma8xpp6pqSuwXzjUN3emJnftQ@mail.gmail.com>
Hi,
On Wednesday 20 November 2013 03:02 PM, Vivek Gautam wrote:
> On Wed, Nov 20, 2013 at 2:34 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>> On Wednesday 20 November 2013 02:27 PM, Vivek Gautam wrote:
>>> Hi Kishon,
>>>
>>>
>>> On Mon, Nov 11, 2013 at 4:41 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>>> Hi,
>>> sorry for the delayed response.
>>>
>>>>
>>>> On Wednesday 06 November 2013 05:37 AM, Jingoo Han wrote:
>>>>> On Wednesday, November 06, 2013 2:58 AM, Vivek Gautam wrote:
>>>>>> On Tue, Nov 5, 2013 at 5:33 PM, Jingoo Han <jg1.han@samsung.com> wrote:
>>>>>
>>>>> [.....]
>>>>>
>>>>>>> USB3.0 PHY consists of two blocks such as 3.0 block and 2.0 block.
>>>>>>> This USB3.0 PHY can support UTMI+ and PIPE3 interface for 3.0 block
>>>>>>> and 2.0 block, respectively.
>>>>>>>
>>>>>>> Conclusion:
>>>>>>>
>>>>>>> 1) USB2.0 PHY: USB2.0 HOST, USB2.0 Device
>>>>>>> Base address: 0x1213 0000
>>>>>>>
>>>>>>> 2) USB3.0 PHY: USB3.0 DRD (3.0 HOST & 3.0 Device)
>>>>>>> Base address: 0x1210 0000
>>>>>>> 2.0 block(UTMI+) & 3.0 block(PIPE3)
>>>>>>
>>>>>> And this is of course the PHY used by DWC3 controller, which works at
>>>>>> both High speed as well as Super Speed.
>>>>>> Right ?
>>>>>
>>>>> Right.
>>>>>
>>>>> While 3.0 block(PIPE3) can be used for Super Speed, 2.0 block(UTMI+)
>>>>> can be used for High speed.
>>>>
>>>> It should then come under *single IP muliple PHY* category similar to what
>>>> Sylwester has done.
>>>
>>> Do you mean that i should be including PHY IDs for UTMI+ phy and PIPE3
>>> phy present in this PHY block ?
>>> AFAICS the two phys (UTMI+ and PIPE3) do not really have separate
>>> registers to program, and that's the reason
>>> we program the entire PHY in a shot.
>>
>> you mean you program the same set of bits for UTMI+ and PIPE3?
>
> No, looking closely into PHY datasheet as well as Exynos5250 manual, i
> can see that UTMI+ and PIPE3
> phys have separate bit settings. So i think we should be able to
> segregate the two PHYs (UTMI+ and PIPE3).
> Pardon me for my earlier observations.
no problem..
> Let me clarify more with our h/w team also on this and then i will
> confirm with this.
sure, thanks.
Cheers
Kishon
>
>>
>> Thanks
>> Kishon
>
>
>
next prev parent reply other threads:[~2013-11-20 15:44 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-31 7:45 [PATCH RFC 0/4] Add Exynos5 USB 3.0 phy driver based on generic PHY framework Vivek Gautam
2013-10-31 7:45 ` [PATCH RFC 1/4] phy: Add new Exynos5 USB 3.0 PHY driver Vivek Gautam
2013-11-04 6:54 ` Kishon Vijay Abraham I
2013-11-04 10:15 ` Kamil Debski
2013-11-04 13:12 ` Kishon Vijay Abraham I
2013-11-05 7:20 ` Vivek Gautam
2013-11-05 9:34 ` Tomasz Figa
2013-11-05 9:36 ` Kamil Debski
2013-11-05 11:12 ` Jingoo Han
2013-11-05 12:03 ` Jingoo Han
2013-11-05 17:58 ` Vivek Gautam
2013-11-06 0:07 ` Jingoo Han
2013-11-11 11:11 ` Kishon Vijay Abraham I
2013-11-20 8:57 ` Vivek Gautam
2013-11-20 9:04 ` Kishon Vijay Abraham I
2013-11-20 9:32 ` Vivek Gautam
2013-11-20 15:44 ` Kishon Vijay Abraham I [this message]
2013-12-04 14:28 ` Kishon Vijay Abraham I
2013-12-05 8:14 ` Vivek Gautam
2013-12-24 17:45 ` Kishon Vijay Abraham I
2013-12-30 9:43 ` Vivek Gautam
2014-01-07 9:49 ` Kishon Vijay Abraham I
2014-01-07 11:03 ` Vivek Gautam
2014-01-20 13:45 ` Vivek Gautam
2013-11-05 17:56 ` Vivek Gautam
2013-11-04 12:26 ` Tomasz Figa
2013-11-04 13:09 ` Kishon Vijay Abraham I
[not found] ` <CAFp+6iG5SAe5h0-RRsBuAhtWO_NBW6G=7jQeObd4Y2BQGaRHyA@mail.gmail.com>
2013-11-05 7:12 ` Vivek Gautam
2013-11-10 14:08 ` Tomasz Figa
2013-11-20 8:44 ` Vivek Gautam
2013-11-20 8:55 ` Vivek Gautam
2013-11-21 12:26 ` Yuvaraj Cd
2013-10-31 7:45 ` [PATCH 2/4] dt: exynos5250: Enable support for generic USB 3.0 phy Vivek Gautam
2013-11-10 14:54 ` Tomasz Figa
2013-10-31 7:45 ` [PATCH 3/4] dt: exynos5420: Enable support for USB 3.0 PHY controller Vivek Gautam
2013-10-31 7:45 ` [PATCH 4/4] dt: exynos5420: Enable support for DWC3 controller Vivek Gautam
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