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* [PATCH] clk: keystone: gate: don't use reserved bits
@ 2013-11-21 15:30 Ivan Khoronzhuk
  2013-11-21 15:35 ` Shilimkar, Santosh
  0 siblings, 1 reply; 3+ messages in thread
From: Ivan Khoronzhuk @ 2013-11-21 15:30 UTC (permalink / raw)
  To: linux-arm-kernel

According to TRM http://www.ti.com/lit/ug/sprugv4b/sprugv4b.pdf
the Power Domain Status Register (PDSTAT) has 0-1 bits for power
domain status, but PDSTAT_STATE_MASK is defined with 0x1F. In that
case we operate with reserved bits. So correct PDSTAT_STATE_MASK
to be 0x03.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
---
 drivers/clk/keystone/gate.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
index 1f333bc..995ae80 100644
--- a/drivers/clk/keystone/gate.c
+++ b/drivers/clk/keystone/gate.c
@@ -35,7 +35,7 @@
 
 #define MDSTAT_STATE_MASK	0x3f
 #define MDSTAT_MCKOUT		BIT(12)
-#define PDSTAT_STATE_MASK	0x1f
+#define PDSTAT_STATE_MASK	0x03
 #define MDCTL_FORCE		BIT(31)
 #define MDCTL_LRESET		BIT(8)
 #define PDCTL_NEXT		BIT(0)
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] clk: keystone: gate: don't use reserved bits
  2013-11-21 15:30 [PATCH] clk: keystone: gate: don't use reserved bits Ivan Khoronzhuk
@ 2013-11-21 15:35 ` Shilimkar, Santosh
  2013-11-21 15:39   ` ivan.khoronzhuk
  0 siblings, 1 reply; 3+ messages in thread
From: Shilimkar, Santosh @ 2013-11-21 15:35 UTC (permalink / raw)
  To: linux-arm-kernel

Sorry for top posting. The user-guide is not upto date....

State
4:0
R
Actual state
Current Power Domain State. 
Only PSM states Off and On are ?key states? that users should consider in normal run time situation. States with bit 4 = 1 are transitional states helpful for debug if PSM is stuck in those states. 

Regards,
Santosh

________________________________________
From: Khoronzhuk, Ivan
Sent: Thursday, November 21, 2013 10:30 AM
To: Shilimkar, Santosh
Cc: Mike Turquette; linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org; Strashko, Grygorii; Khoronzhuk, Ivan
Subject: [PATCH] clk: keystone: gate: don't use reserved bits

According to TRM http://www.ti.com/lit/ug/sprugv4b/sprugv4b.pdf
the Power Domain Status Register (PDSTAT) has 0-1 bits for power
domain status, but PDSTAT_STATE_MASK is defined with 0x1F. In that
case we operate with reserved bits. So correct PDSTAT_STATE_MASK
to be 0x03.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
---
 drivers/clk/keystone/gate.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
index 1f333bc..995ae80 100644
--- a/drivers/clk/keystone/gate.c
+++ b/drivers/clk/keystone/gate.c
@@ -35,7 +35,7 @@

 #define MDSTAT_STATE_MASK      0x3f
 #define MDSTAT_MCKOUT          BIT(12)
-#define PDSTAT_STATE_MASK      0x1f
+#define PDSTAT_STATE_MASK      0x03
 #define MDCTL_FORCE            BIT(31)
 #define MDCTL_LRESET           BIT(8)
 #define PDCTL_NEXT             BIT(0)
--
1.7.9.5

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] clk: keystone: gate: don't use reserved bits
  2013-11-21 15:35 ` Shilimkar, Santosh
@ 2013-11-21 15:39   ` ivan.khoronzhuk
  0 siblings, 0 replies; 3+ messages in thread
From: ivan.khoronzhuk @ 2013-11-21 15:39 UTC (permalink / raw)
  To: linux-arm-kernel

On 11/21/2013 05:35 PM, Shilimkar, Santosh wrote:
> Sorry for top posting. The user-guide is not upto date....
>
> State
> 4:0
> R
> Actual state
> Current Power Domain State.
> Only PSM states Off and On are ?key states? that users should consider in normal run time situation. States with bit 4 = 1 are transitional states helpful for debug if PSM is stuck in those states.
>
> Regards,
> Santosh
>
> ________________________________________
> From: Khoronzhuk, Ivan
> Sent: Thursday, November 21, 2013 10:30 AM
> To: Shilimkar, Santosh
> Cc: Mike Turquette; linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org; Strashko, Grygorii; Khoronzhuk, Ivan
> Subject: [PATCH] clk: keystone: gate: don't use reserved bits
>
> According to TRM http://www.ti.com/lit/ug/sprugv4b/sprugv4b.pdf
> the Power Domain Status Register (PDSTAT) has 0-1 bits for power
> domain status, but PDSTAT_STATE_MASK is defined with 0x1F. In that
> case we operate with reserved bits. So correct PDSTAT_STATE_MASK
> to be 0x03.
>
> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
> ---
>   drivers/clk/keystone/gate.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
> index 1f333bc..995ae80 100644
> --- a/drivers/clk/keystone/gate.c
> +++ b/drivers/clk/keystone/gate.c
> @@ -35,7 +35,7 @@
>
>   #define MDSTAT_STATE_MASK      0x3f
>   #define MDSTAT_MCKOUT          BIT(12)
> -#define PDSTAT_STATE_MASK      0x1f
> +#define PDSTAT_STATE_MASK      0x03
>   #define MDCTL_FORCE            BIT(31)
>   #define MDCTL_LRESET           BIT(8)
>   #define PDCTL_NEXT             BIT(0)
> --
> 1.7.9.5
>

Ok

-- 
Regards,
Ivan Khoronzhuk

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2013-11-21 15:30 [PATCH] clk: keystone: gate: don't use reserved bits Ivan Khoronzhuk
2013-11-21 15:35 ` Shilimkar, Santosh
2013-11-21 15:39   ` ivan.khoronzhuk

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