From mboxrd@z Thu Jan  1 00:00:00 1970
From: swarren@wwwdotorg.org (Stephen Warren)
Date: Wed, 18 Dec 2013 09:27:29 -0700
Subject: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID
In-Reply-To: <52B1568F.1050305@gmail.com>
References: <1386835033-4701-1-git-send-email-hdoyu@nvidia.com>
 <1386835033-4701-7-git-send-email-hdoyu@nvidia.com>
 <52B1568F.1050305@gmail.com>
Message-ID: <52B1CCF1.2040907@wwwdotorg.org>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On 12/18/2013 01:02 AM, Mark Zhang wrote:
> On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:
>> Create a header file to define the swgroup IDs used by the IOMMU(SMMU)
>> binding. "swgroup" is a group of H/W clients which a Tegra SoC
>> supports. This unique ID can be used to calculate MC_SMMU_<swgroup
>> name>_ASID_0 register offset and MC_<swgroup name>_HOTRESET_*_0
>> register bit. This will allow the same header to be used by both
>> device tree files, and drivers implementing this binding, which
>> guarantees that the two stay in sync. This also makes device trees
>> more readable by using names instead of magic numbers. For HOTRESET
>> bit shifting we need another conversion table, which will come later.

>> diff --git a/include/dt-bindings/memory/tegra-swgroup.h b/include/dt-bindings/memory/tegra-swgroup.h

>> +#define TEGRA_SWGROUP_MPE	11	/* 0x264 */
>> +#define TEGRA_SWGROUP_MSENC	SWGROUP_MPE
> 
> Need to change this to:
> 
> #define TEGRA_SWGROUP_MSENC	11
> 
> The reason is that, this makes "TEGRA_SWGROUP_BIT" doesn't work. So if I
> write "TEGRA_SWGROUP_CELLS(MSENC)" in dt, that causes a dt compiling error.

I guess it's because TEGRA_SWGROUP_BIT needs to expand its argument
twice, which can be done.

That all said, just defining all the names directly to constants is
probably the most direct fix.