* [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2
@ 2013-12-18 12:52 Laxman Dewangan
2013-12-18 12:52 ` [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT Laxman Dewangan
2013-12-18 20:56 ` [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Stephen Warren
0 siblings, 2 replies; 9+ messages in thread
From: Laxman Dewangan @ 2013-12-18 12:52 UTC (permalink / raw)
To: linux-arm-kernel
Compare the initial population of default pinmux configuration of Venice2
with the chrome branch and add/fix the missing configurations.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
arch/arm/boot/dts/tegra124-venice2.dts | 308 +++++++++++++++++++++++++++-----
1 file changed, 260 insertions(+), 48 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index d6bb25c..6bc4e07 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -23,34 +23,40 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dap1_din_pn1 {
- nvidia,pins = "dap1_din_pn1",
- "dap1_dout_pn2",
+ nvidia,pins = "dap1_din_pn1";
+ nvidia,function = "i2s0";
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ dap1_dout_pn2 {
+ nvidia,pins = "dap1_dout_pn2",
"dap1_fs_pn0",
"dap1_sclk_pn3";
nvidia,function = "i2s0";
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
dap2_din_pa4 {
- nvidia,pins = "dap2_din_pa4",
- "dap2_dout_pa5",
- "dap2_fs_pa2",
- "dap2_sclk_pa3";
+ nvidia,pins = "dap2_din_pa4";
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- dvfs_pwm_px0 {
- nvidia,pins = "dvfs_pwm_px0";
- nvidia,function = "cldvfs";
+ dap2_dout_pa5 {
+ nvidia,pins = "dap2_dout_pa5",
+ "dap2_fs_pa2",
+ "dap2_sclk_pa3";
+ nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- dvfs_clk_px2 {
- nvidia,pins = "dvfs_clk_px2";
+ dvfs_pwm_px0 {
+ nvidia,pins = "dvfs_pwm_px0",
+ "dvfs_clk_px2";
nvidia,function = "cldvfs";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
@@ -58,12 +64,18 @@
};
ulpi_clk_py0 {
nvidia,pins = "ulpi_clk_py0",
- "ulpi_dir_py1",
"ulpi_nxt_py2",
"ulpi_stp_py3";
nvidia,function = "spi1";
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ ulpi_dir_py1 {
+ nvidia,pins = "ulpi_dir_py1";
+ nvidia,function = "spi1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
cam_i2c_scl_pbb1 {
@@ -90,19 +102,18 @@
nvidia,pins = "pg4",
"pg5",
"pg6",
- "pg7",
"pi3";
nvidia,function = "spi4";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- ph0 {
- nvidia,pins = "ph0";
- nvidia,function = "pwm0";
+ pg7 {
+ nvidia,pins = "pg7";
+ nvidia,function = "spi4";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ph1 {
nvidia,pins = "ph1";
@@ -111,12 +122,14 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- ph2 {
- nvidia,pins = "ph2";
- nvidia,function = "gmi";
- nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ pk0 {
+ nvidia,pins = "pk0",
+ "kb_row15_ps7",
+ "clk_32k_out_pa0";
+ nvidia,function = "soc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc1_clk_pz0 {
nvidia,pins = "sdmmc1_clk_pz0",
@@ -130,6 +143,17 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ sdmmc1_cmd_pz1 {
+ nvidia,pins = "sdmmc1_cmd_pz1",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat3_py4";
+ nvidia,function = "sdmmc1";
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6";
nvidia,function = "sdmmc3";
@@ -179,6 +203,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
jtag_rtck {
@@ -231,12 +256,18 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dap4_din_pp5 {
- nvidia,pins = "dap4_din_pp5",
- "dap4_dout_pp6",
+ nvidia,pins = "dap4_din_pp5";
+ nvidia,function = "i2s3";
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ dap4_dout_pp6 {
+ nvidia,pins = "dap4_dout_pp6",
"dap4_fs_pp4",
"dap4_sclk_pp7";
nvidia,function = "i2s3";
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
@@ -248,51 +279,67 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
- nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
- pu0 {
- nvidia,pins = "pu0",
- "pu1",
- "pu2",
- "pu3";
- nvidia,function = "uarta";
+ uart2_cts_n_pj5 {
+ nvidia,pins = "uart2_cts_n_pj5";
+ nvidia,function = "uartb";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- uart2_cts_n_pj5 {
- nvidia,pins = "uart2_cts_n_pj5",
- "uart2_rts_n_pj6";
+ uart2_rts_n_pj6 {
+ nvidia,pins = "uart2_rts_n_pj6";
nvidia,function = "uartb";
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_rxd_pc3 {
- nvidia,pins = "uart2_rxd_pc3",
- "uart2_txd_pc2";
+ nvidia,pins = "uart2_rxd_pc3";
nvidia,function = "irda";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ uart2_txd_pc2 {
+ nvidia,pins = "uart2_txd_pc2";
+ nvidia,function = "irda";
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
uart3_cts_n_pa1 {
nvidia,pins = "uart3_cts_n_pa1",
- "uart3_rts_n_pc0",
- "uart3_rxd_pw7",
- "uart3_txd_pw6";
+ "uart3_rxd_pw7";
nvidia,function = "uartc";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ uart3_rts_n_pc0 {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
hdmi_cec_pee3 {
nvidia,pins = "hdmi_cec_pee3";
nvidia,function = "cec";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ };
+ hdmi_int_pn7 {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "rsvd1";
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ddc_scl_pv4 {
nvidia,pins = "ddc_scl_pv4",
@@ -301,6 +348,52 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
+ };
+ pj7 {
+ nvidia,pins = "pj7",
+ "pk7";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pb0 {
+ nvidia,pins = "pb0",
+ "pb1";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ph0 {
+ nvidia,pins = "ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row10_ps2 {
+ nvidia,pins = "kb_row10_ps2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row9_ps1 {
+ nvidia,pins = "kb_row9_ps1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row6_pr6 {
+ nvidia,pins = "kb_row6_pr6";
+ nvidia,function = "displaya_alt";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
usb_vbus_en0_pn4 {
nvidia,pins = "usb_vbus_en0_pn4";
@@ -309,7 +402,7 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
- nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
usb_vbus_en1_pn5 {
nvidia,pins = "usb_vbus_en1_pn5";
@@ -318,7 +411,7 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
- nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
drive_sdio1 {
nvidia,pins = "drive_sdio1";
@@ -351,6 +444,125 @@
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
nvidia,drive-type = <1>;
};
+ als_irq_l {
+ nvidia,pins = "gpio_x3_aud_px3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ codec_irq_l {
+ nvidia,pins = "ph4";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_bl_en {
+ nvidia,pins = "ph2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ touch_irq_l {
+ nvidia,pins = "gpio_w3_aud_pw3";
+ nvidia,function = "spi6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ tpm_davint_l {
+ nvidia,pins = "ph6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ts_irq_l {
+ nvidia,pins = "pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ts_reset_l {
+ nvidia,pins = "pk4";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ts_shdn_l {
+ nvidia,pins = "pk1";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ph7 {
+ nvidia,pins = "ph7";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_col0_ap {
+ nvidia,pins = "kb_col0_pq0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lid_open {
+ nvidia,pins = "kb_row4_pr4";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ en_vdd_sd {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ac_ok {
+ nvidia,pins = "pj0";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sensor_irq_l {
+ nvidia,pins = "pi6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ wifi_en {
+ nvidia,pins = "gpio_x7_aud_px7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ wifi_rst_l {
+ nvidia,pins = "clk2_req_pcc5";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ hp_det_l {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
};
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-18 12:52 [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Laxman Dewangan
@ 2013-12-18 12:52 ` Laxman Dewangan
2013-12-18 20:55 ` Stephen Warren
2013-12-18 20:56 ` [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Stephen Warren
1 sibling, 1 reply; 9+ messages in thread
From: Laxman Dewangan @ 2013-12-18 12:52 UTC (permalink / raw)
To: linux-arm-kernel
Add ams AS3722 entry for gpio/pincontrol and regulators
to venice2 DT.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Changes fome V1:
- Separte the pinmux change on different patch.
- Compare the conifguration with chorme internal branch for Venice2.
arch/arm/boot/dts/tegra124-venice2.dts | 297 +++++++++++++++++++++++++++++++-
1 file changed, 296 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 6bc4e07..a9f0df9 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -603,7 +603,201 @@
i2c at 7000d000 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
+
+ as3722: as3722 at 40 {
+ compatible = "ams,as3722";
+ reg = <0x40>;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&as3722_default>;
+
+ as3722_default: pinmux {
+ gpio0 {
+ pins = "gpio0";
+ function = "gpio";
+ bias-pull-down;
+ };
+
+ gpio1_2_4_7 {
+ pins = "gpio1", "gpio2", "gpio4", "gpio7";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ gpio3_6 {
+ pins = "gpio3", "gpio6";
+ bias-high-impedance;
+ };
+
+ gpio5 {
+ pins = "gpio5";
+ function = "clk32k-out";
+ };
+ };
+
+ regulators {
+ vsup-sd2-supply = <&vdd_ac_bat_reg>;
+ vsup-sd3-supply = <&vdd_ac_bat_reg>;
+ vsup-sd4-supply = <&vdd_ac_bat_reg>;
+ vsup-sd5-supply = <&vdd_ac_bat_reg>;
+ vin-ldo0-supply = <&as3722_sd2>;
+ vin-ldo1-6-supply = <&vdd_ac_bat_reg>;
+ vin-ldo2-5-7-supply = <&as3722_sd5>;
+ vin-ldo3-4-supply = <&vdd_ac_bat_reg>;
+ vin-ldo9-10-supply = <&vdd_ac_bat_reg>;
+ vin-ldo11-supply = <&vdd_ac_bat_reg>;
+
+ sd0 {
+ regulator-name = "vdd-cpu";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-min-microamp = <3500000>;
+ regulator-max-microamp = <3500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ams,external-control = <2>;
+ };
+
+ sd1 {
+ regulator-name = "vdd-core";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-min-microamp = <2500000>;
+ regulator-max-microamp = <2500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ams,external-control = <1>;
+ };
+
+ as3722_sd2: sd2 {
+ regulator-name = "vddio-ddr";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ sd3 {
+ regulator-name = "vddio-ddr-2phase";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ sd4 {
+ regulator-name = "avdd-pex-sata";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ as3722_sd5: sd5 {
+ regulator-name = "vddio-sys";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sd6 {
+ regulator-name = "vdd-gpu";
+ regulator-min-microvolt = <650000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-min-microamp = <3500000>;
+ regulator-max-microamp = <3500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo0 {
+ regulator-name = "avdd_pll";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-boot-on;
+ regulator-always-on;
+ ams,external-control = <1>;
+ };
+
+ ldo1 {
+ regulator-name = "run-cam-1.8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo2 {
+ regulator-name = "gen-avdd,vddio-hsic";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3 {
+ regulator-name = "vdd-rtc";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ ams,enable-tracking;
+ };
+
+ ldo4 {
+ regulator-name = "vdd-cam";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5 {
+ regulator-name = "vdd-cam-front";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo6 {
+ regulator-name = "vddio-sdmmc3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo7 {
+ regulator-name = "vdd-cam-rear";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ };
+
+ ldo9 {
+ regulator-name = "vdd-touch";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo10 {
+ regulator-name = "vdd-cam-af";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo11 {
+ regulator-name = "vpp-fuse";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+ };
};
pmc at 7000e400 {
@@ -648,6 +842,107 @@
};
};
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vdd_ac_bat_reg: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "vdd_ac_bat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vdd_3v3_reg: regulator at 1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "vdd_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_3v3_modem_reg: regulator at 2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "vdd-modem-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_hdmi_5v0_reg: regulator at 3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "vdd-hdmi-5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_bl_reg: regulator at 4 {
+ compatible = "regulator-fixed";
+ reg = <4>;
+ regulator-name = "vdd-bl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ vdd_ts_sw_5v0: regulator at 5 {
+ compatible = "regulator-fixed";
+ reg = <5>;
+ regulator-name = "vdd_ts_sw";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-boot-on;
+ gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_LOW>;
+ };
+
+ usb1_vbus_reg: regulator at 6 {
+ compatible = "regulator-fixed";
+ reg = <6>;
+ regulator-name = "usb1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
+ gpio-open-drain;
+ };
+
+ usb3_vbus_reg: regulator at 7 {
+ compatible = "regulator-fixed";
+ reg = <7>;
+ regulator-name = "usb3_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
+ gpio-open-drain;
+ };
+
+ panel_3v3_reg: regulator at 8 {
+ compatible = "regulator-fixed";
+ reg = <8>;
+ regulator-name = "panel_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
sound {
compatible = "nvidia,tegra-audio-max98090-venice2",
"nvidia,tegra-audio-max98090";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-18 12:52 ` [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT Laxman Dewangan
@ 2013-12-18 20:55 ` Stephen Warren
2013-12-19 7:28 ` Laxman Dewangan
0 siblings, 1 reply; 9+ messages in thread
From: Stephen Warren @ 2013-12-18 20:55 UTC (permalink / raw)
To: linux-arm-kernel
On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
> Add ams AS3722 entry for gpio/pincontrol and regulators
> to venice2 DT.
This patch still causes:
> [ 0.726545] as3722-pinctrl as3722-pinctrl: pin gpio0 already requested by as3722-pinctrl; cannot claim for as3722-regulator
> [ 0.737681] as3722-pinctrl as3722-pinctrl: pin-0 (as3722-regulator) status -22
> [ 0.744895] as3722-pinctrl as3722-pinctrl: could not request pin 0 (gpio0) from group gpio0 on device as3722-pinctrl
> [ 0.755500] as3722-regulator as3722-regulator: Error applying setting, reverse things back
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2
2013-12-18 12:52 [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Laxman Dewangan
2013-12-18 12:52 ` [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT Laxman Dewangan
@ 2013-12-18 20:56 ` Stephen Warren
2013-12-19 7:14 ` Laxman Dewangan
1 sibling, 1 reply; 9+ messages in thread
From: Stephen Warren @ 2013-12-18 20:56 UTC (permalink / raw)
To: linux-arm-kernel
On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
> Compare the initial population of default pinmux configuration of Venice2
> with the chrome branch and add/fix the missing configurations.
Wow, that's a big chunk of changes. Are you sure this is correct? Why
was the original patch (which added the pinctrl nodes) so incorrect?
Thierry, I thought you had mentioned comparing the pinctrl setup in
linux-next with the downstream kernel for Venice2 and only found a
difference in the PWM settings, which you sent a patch for. However,
this patch is much larger than that. Where's the disconnect?
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2
2013-12-18 20:56 ` [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Stephen Warren
@ 2013-12-19 7:14 ` Laxman Dewangan
0 siblings, 0 replies; 9+ messages in thread
From: Laxman Dewangan @ 2013-12-19 7:14 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 19 December 2013 02:26 AM, Stephen Warren wrote:
> On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
>> Compare the initial population of default pinmux configuration of Venice2
>> with the chrome branch and add/fix the missing configurations.
> Wow, that's a big chunk of changes. Are you sure this is correct? Why
> was the original patch (which added the pinctrl nodes) so incorrect?
The pinmux which got added is based on the venice2 pinmux spreadsheet
where I covered only the SFIO pin groups.
https://wiki.nvidia.com/engwiki/index.php/Platform_Design_Center/Projects_Archive/PM371#pinmux
After comparing with the chrome, I also added the pinmux for all pins
which are used as GPIO and hence the change is big.
This is complete pinmux based on chrome kernel-next.
I booted chrome with this pinmux and not observe any behavioral change.
> Thierry, I thought you had mentioned comparing the pinctrl setup in
> linux-next with the downstream kernel for Venice2 and only found a
> difference in the PWM settings, which you sent a patch for. However,
> this patch is much larger than that. Where's the disconnect?
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-18 20:55 ` Stephen Warren
@ 2013-12-19 7:28 ` Laxman Dewangan
2013-12-19 17:24 ` Stephen Warren
2013-12-19 18:23 ` Stephen Warren
0 siblings, 2 replies; 9+ messages in thread
From: Laxman Dewangan @ 2013-12-19 7:28 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 19 December 2013 02:25 AM, Stephen Warren wrote:
> On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
>> Add ams AS3722 entry for gpio/pincontrol and regulators
>> to venice2 DT.
> This patch still causes:
>
>> [ 0.726545] as3722-pinctrl as3722-pinctrl: pin gpio0 already requested by as3722-pinctrl; cannot claim for as3722-regulator
>> [ 0.737681] as3722-pinctrl as3722-pinctrl: pin-0 (as3722-regulator) status -22
>> [ 0.744895] as3722-pinctrl as3722-pinctrl: could not request pin 0 (gpio0) from group gpio0 on device as3722-pinctrl
>> [ 0.755500] as3722-regulator as3722-regulator: Error applying setting, reverse things back
This error is nothing related to the ams dt or driver. This came from
the framework from the driver/base for adding pinmux call before calling
any diver's probe.
Here is my finding:
Frameworks calls the pinctrl_bind_pins() before calls the driver's probe
(drivers/base/dd.c) and pinctrl_bind_pins() calls the pinmux mapping and
try to set the default (drvers/base/pinctrl.c).
AMS AS3722 DT is flat type on which all sub devices of AS3722 have the
property on parent node only, there is no subnode for each sub driver
like palmas. In this case all sub drivers of_node is initialized as
parent->of_node in mfd-core.c (mfd_add_devices).
mfd-core.c: mfd_add_device()
if (!pdev->dev.of_node)
pdev->dev.of_node = parent->of_node;
So all sub devices of AS3722 has the parent node.
This node has the default pinmux configuration and so it tries to set
the default pinmux before sud-driver's probe get called.
The first one (for pinmux driver) it is success but for regulator and
rtc, it is failed as pins are owned by the pinmux drivers.
This does not have any side impact as currently, pinctrl_bind_pins()
only return the success or ERPOBE_DEFER
I was testing the patch with linux-next-common of your branch and
chrome-os/kernel-next with linux-next's pinctrl/regulator/mfd and not
able to repro this because driver/base changes was not there.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-19 7:28 ` Laxman Dewangan
@ 2013-12-19 17:24 ` Stephen Warren
2013-12-19 18:23 ` Stephen Warren
1 sibling, 0 replies; 9+ messages in thread
From: Stephen Warren @ 2013-12-19 17:24 UTC (permalink / raw)
To: linux-arm-kernel
On 12/19/2013 12:28 AM, Laxman Dewangan wrote:
> On Thursday 19 December 2013 02:25 AM, Stephen Warren wrote:
>> On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
>>> Add ams AS3722 entry for gpio/pincontrol and regulators
>>> to venice2 DT.
>> This patch still causes:
>>
>>> [ 0.726545] as3722-pinctrl as3722-pinctrl: pin gpio0 already
>>> requested by as3722-pinctrl; cannot claim for as3722-regulator
>>> [ 0.737681] as3722-pinctrl as3722-pinctrl: pin-0
>>> (as3722-regulator) status -22
>>> [ 0.744895] as3722-pinctrl as3722-pinctrl: could not request pin 0
>>> (gpio0) from group gpio0 on device as3722-pinctrl
>>> [ 0.755500] as3722-regulator as3722-regulator: Error applying
>>> setting, reverse things back
>
> This error is nothing related to the ams dt or driver. This came from
> the framework from the driver/base for adding pinmux call before calling
> any diver's probe.
> Here is my finding:
> Frameworks calls the pinctrl_bind_pins() before calls the driver's probe
> (drivers/base/dd.c) and pinctrl_bind_pins() calls the pinmux mapping and
> try to set the default (drvers/base/pinctrl.c).
>
> AMS AS3722 DT is flat type on which all sub devices of AS3722 have the
> property on parent node only, there is no subnode for each sub driver
> like palmas. In this case all sub drivers of_node is initialized as
> parent->of_node in mfd-core.c (mfd_add_devices).
>
> mfd-core.c: mfd_add_device()
> if (!pdev->dev.of_node)
> pdev->dev.of_node = parent->of_node;
>
> So all sub devices of AS3722 has the parent node.
> This node has the default pinmux configuration and so it tries to set
> the default pinmux before sud-driver's probe get called.
> The first one (for pinmux driver) it is success but for regulator and
> rtc, it is failed as pins are owned by the pinmux drivers.
Ah. I guess we should drop/revert 1c79a8b9f4a7 "mfd: Always assign
of_node in mfd_add_device()" then. I guess I'll make the RTC core look
at dev->of_node, or dev->parent->of_node to search for aliases. That
should avoid the issue.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-19 7:28 ` Laxman Dewangan
2013-12-19 17:24 ` Stephen Warren
@ 2013-12-19 18:23 ` Stephen Warren
2013-12-20 6:32 ` Laxman Dewangan
1 sibling, 1 reply; 9+ messages in thread
From: Stephen Warren @ 2013-12-19 18:23 UTC (permalink / raw)
To: linux-arm-kernel
On 12/19/2013 12:28 AM, Laxman Dewangan wrote:
> On Thursday 19 December 2013 02:25 AM, Stephen Warren wrote:
>> On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
>>> Add ams AS3722 entry for gpio/pincontrol and regulators
>>> to venice2 DT.
>> This patch still causes:
>>
>>> [ 0.726545] as3722-pinctrl as3722-pinctrl: pin gpio0 already
>>> requested by as3722-pinctrl; cannot claim for as3722-regulator
>>> [ 0.737681] as3722-pinctrl as3722-pinctrl: pin-0
>>> (as3722-regulator) status -22
>>> [ 0.744895] as3722-pinctrl as3722-pinctrl: could not request pin 0
>>> (gpio0) from group gpio0 on device as3722-pinctrl
>>> [ 0.755500] as3722-regulator as3722-regulator: Error applying
>>> setting, reverse things back
>
> This error is nothing related to the ams dt or driver. This came from
> the framework from the driver/base for adding pinmux call before calling
> any diver's probe.
OK, after reverting the problematic MFD commit (which I assume will
happen upstream too), I see no errors caused by this patch.
As such, I've applied the series to Tegra's for-3.14/dt branch.
Note that I couldn't verify if the pinctrl setup in patch 1/2 matched
the ChromeOS kernel, since the node order is different there, and the
property values don't use named constants there. I'll have to trust you.
I'll be annoyed if it turns out we need to churn the pinctrl
configuration in the future...
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT
2013-12-19 18:23 ` Stephen Warren
@ 2013-12-20 6:32 ` Laxman Dewangan
0 siblings, 0 replies; 9+ messages in thread
From: Laxman Dewangan @ 2013-12-20 6:32 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 19 December 2013 11:53 PM, Stephen Warren wrote:
> On 12/19/2013 12:28 AM, Laxman Dewangan wrote:
>> On Thursday 19 December 2013 02:25 AM, Stephen Warren wrote:
>>> On 12/18/2013 05:52 AM, Laxman Dewangan wrote:
>>>> Add ams AS3722 entry for gpio/pincontrol and regulators
>>>> to venice2 DT.
>>> This patch still causes:
>>>
>>>> [ 0.726545] as3722-pinctrl as3722-pinctrl: pin gpio0 already
>>>> requested by as3722-pinctrl; cannot claim for as3722-regulator
>>>> [ 0.737681] as3722-pinctrl as3722-pinctrl: pin-0
>>>> (as3722-regulator) status -22
>>>> [ 0.744895] as3722-pinctrl as3722-pinctrl: could not request pin 0
>>>> (gpio0) from group gpio0 on device as3722-pinctrl
>>>> [ 0.755500] as3722-regulator as3722-regulator: Error applying
>>>> setting, reverse things back
>> This error is nothing related to the ams dt or driver. This came from
>> the framework from the driver/base for adding pinmux call before calling
>> any diver's probe.
> OK, after reverting the problematic MFD commit (which I assume will
> happen upstream too), I see no errors caused by this patch.
>
> As such, I've applied the series to Tegra's for-3.14/dt branch.
Thanks for taking care.
>
> Note that I couldn't verify if the pinctrl setup in patch 1/2 matched
> the ChromeOS kernel, since the node order is different there, and the
> property values don't use named constants there. I'll have to trust you.
> I'll be annoyed if it turns out we need to churn the pinctrl
> configuration in the future...
I referred the configuration from chrome branch. I assume that good
amount of testing has already been done on this configuration.
I manually check all configuration and run chrome on this change which
works properly. Did not see any abnormal behavior.
So if something missed then it is just human error which did not catch
on 2 level of self review.
Again any change on this configuration can be expected based on new
testing or bringung new modules.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2013-12-20 6:32 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-12-18 12:52 [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Laxman Dewangan
2013-12-18 12:52 ` [PATCH V2 2/2] ARM: tegra: add ams AS3722 device to Venice2 DT Laxman Dewangan
2013-12-18 20:55 ` Stephen Warren
2013-12-19 7:28 ` Laxman Dewangan
2013-12-19 17:24 ` Stephen Warren
2013-12-19 18:23 ` Stephen Warren
2013-12-20 6:32 ` Laxman Dewangan
2013-12-18 20:56 ` [PATCH 1/2] ARM: tegra: fix missing pincontrol configuration for Venice2 Stephen Warren
2013-12-19 7:14 ` Laxman Dewangan
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