* [PATCH 1/6] Basic Device Tree support for the at91sam9261
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2014-01-02 23:30 ` boris brezillon
2013-12-31 16:32 ` [PATCH 2/6] at91: dt: sam9261: Added support for the lcd display jjhiblot at traphandler.com
` (5 subsequent siblings)
6 siblings, 1 reply; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
This patch implements the basics to boot a at91sam9261ek with a dt-enabled
kernel (at91_dt_defconfig).
Only dbgu, nand and watchdog are described in the DT.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 476 +++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9261ek.dts | 75 +++++
arch/arm/mach-at91/at91sam9261.c | 15 +
arch/arm/mach-at91/at91sam9261_devices.c | 18 ++
4 files changed, 584 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
new file mode 100644
index 0000000..ce23d7d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -0,0 +1,476 @@
+/*
+ * at91sam9261.dtsi - Device Tree Include file for AT91SAM9263 family SoC
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Atmel AT91SAM9261 family SoC";
+ compatible = "atmel,at91sam9261";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ };
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ aic: interrupt-controller at fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
+ };
+
+ pmc: pmc at fffffc00 {
+ compatible = "atmel,at91rm9200-pmc";
+ reg = <0xfffffc00 0x100>;
+ };
+
+ ramc: ramc at ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ pit: timer at fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ };
+
+ tcb0: timer at fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0
+ >;
+ status = "disabled";
+ };
+
+ rstc at fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
+
+ shdwc at fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ };
+
+ pinctrl at fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0xa00>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xfffffff7 /* pioA */
+ 0xffffffff 0xfffffff4 /* pioB */
+ 0xffffffff 0xffffff07 /* pioC */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC8 periph A with pullup */
+ AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A */
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC10 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC11 periph A */
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A with pullup */
+ AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC13 periph A */
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA12 periph B */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA13 periph B */
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC14 periph A with pullup */
+ AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC15 periph A */
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA15 periph B */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA16 periph B */
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC15 gpio RDY pin pull_up*/
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B */
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
+ AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
+ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
+ AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA6 periph B with pullup */
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB21 periph A */
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB22 periph A */
+ AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
+ AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB25 periph A */
+ AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA17 periph B */
+ AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA18 periph B */
+ AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA19 periph B */
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA20 periph B */
+ AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B */
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B */
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A SPI1_MISO pin */
+ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB31 periph A SPI1_MOSI pin */
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A SPI1_SPCK pin */
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio at fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioB: gpio at fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioC: gpio at fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ dbgu: serial at fffff200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ status = "disabled";
+ };
+
+ usart0: serial at fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ status = "disabled";
+ };
+
+ usart1: serial at ffffb400 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ status = "disabled";
+ };
+
+ usart2: serial at fff94000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ status = "disabled";
+ };
+
+ ssc0: ssc at fffbc000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffbc000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ status = "disabled";
+ };
+
+ ssc1: ssc at fffc0000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc0000 0x4000>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ status = "disabled";
+ };
+
+ usb1: gadget at fffa4000 {
+ compatible = "atmel,at91rm9200-udc";
+ reg = <0xfffa4000 0x4000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at fffac000 {
+ compatible = "atmel,at91sam9261-i2c";
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ mmc0: mmc at fffa8000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa8000 0x600>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ watchdog at fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ status = "disabled";
+ };
+
+ spi0: spi at fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffc8000 0x200>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ status = "disabled";
+ };
+
+ spi1: spi at fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ status = "disabled";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000>;
+ atmel,nand-addr-offset = <22>;
+ atmel,nand-cmd-offset = <21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+
+ gpios = <&pioC 15 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+
+ usb0: ohci at 00500000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00500000 0x100000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ status = "disabled";
+ };
+ };
+
+ i2c at 0 {
+ compatible = "i2c-gpio";
+ gpios = <&pioA 7 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 8 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
new file mode 100644
index 0000000..f3d22a9
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -0,0 +1,75 @@
+/*
+ * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+/dts-v1/;
+#include "at91sam9261.dtsi"
+
+/ {
+ model = "Atmel at91sam9261ek";
+ compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "mem=64M console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ main_clock: clock at 0 {
+ compatible = "atmel,osc", "fixed-clock";
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ apb {
+ dbgu: serial at fffff200 {
+ status = "okay";
+ };
+
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt = <1>;
+ status = "okay";
+ at91bootstrap at 0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x20000>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ ds8 {
+ label = "ds8";
+ gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+ ds7 {
+ label = "ds7";
+ gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "nand-disk";
+ };
+ ds1 {
+ label = "ds1";
+ gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 6276b4c..200d17a 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -189,6 +189,21 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
+ /* more usart lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+ CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
+ /* more tc lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+ CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index b2a3474..2f926d9 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -599,8 +599,23 @@ static struct platform_device at91sam9261_tcb_device = {
.num_resources = ARRAY_SIZE(tcb_resources),
};
+#if defined(CONFIG_OF)
+static struct of_device_id tcb_ids[] = {
+ { .compatible = "atmel,at91rm9200-tcb" },
+ { /*sentinel*/ }
+};
+#endif
static void __init at91_add_device_tc(void)
{
+#if defined(CONFIG_OF)
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, tcb_ids);
+ if (np) {
+ of_node_put(np);
+ return;
+ }
+#endif
platform_device_register(&at91sam9261_tcb_device);
}
#else
@@ -1088,6 +1103,9 @@ void __init at91_add_device_serial(void) {}
*/
static int __init at91_add_standard_devices(void)
{
+ if (of_have_populated_dt())
+ return 0;
+
at91_add_device_rtt();
at91_add_device_watchdog();
at91_add_device_tc();
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 1/6] Basic Device Tree support for the at91sam9261
2013-12-31 16:32 ` [PATCH 1/6] Basic Device Tree support for the at91sam9261 jjhiblot at traphandler.com
@ 2014-01-02 23:30 ` boris brezillon
2014-01-03 9:52 ` Jean-Jacques Hiblot
0 siblings, 1 reply; 18+ messages in thread
From: boris brezillon @ 2014-01-02 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Hello JJ,
On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>
> This patch implements the basics to boot a at91sam9261ek with a dt-enabled
> kernel (at91_dt_defconfig).
> Only dbgu, nand and watchdog are described in the DT.
>
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> ---
> arch/arm/boot/dts/at91sam9261.dtsi | 476 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/at91sam9261ek.dts | 75 +++++
> arch/arm/mach-at91/at91sam9261.c | 15 +
> arch/arm/mach-at91/at91sam9261_devices.c | 18 ++
Just a nitpick, but I guess it would be cleaner to split this patch:
1) add a91sam9261 dt SoC support
2) move at91sam9261ek board to dt
> 4 files changed, 584 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
>
> diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
> new file mode 100644
> index 0000000..ce23d7d
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91sam9261.dtsi
> @@ -0,0 +1,476 @@
> +/*
> + * at91sam9261.dtsi - Device Tree Include file for AT91SAM9263 family SoC
> + *
> + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> + *
> + * Licensed under GPLv2 only.
> + */
> +
> +#include "skeleton.dtsi"
> +#include <dt-bindings/pinctrl/at91.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "Atmel AT91SAM9261 family SoC";
> + compatible = "atmel,at91sam9261";
> + interrupt-parent = <&aic>;
> +
> + aliases {
> + serial0 = &dbgu;
> + serial1 = &usart0;
> + serial2 = &usart1;
> + serial3 = &usart2;
> + gpio0 = &pioA;
> + gpio1 = &pioB;
> + gpio2 = &pioC;
> + tcb0 = &tcb0;
> + i2c0 = &i2c0;
> + ssc0 = &ssc0;
> + ssc1 = &ssc1;
> + };
> + cpus {
> + #address-cells = <0>;
> + #size-cells = <0>;
> +
> + cpu {
> + compatible = "arm,arm926ej-s";
> + device_type = "cpu";
> + };
> + };
> +
> + memory {
> + reg = <0x20000000 0x08000000>;
> + };
> +
> + ahb {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + apb {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + aic: interrupt-controller at fffff000 {
> + #interrupt-cells = <3>;
> + compatible = "atmel,at91rm9200-aic";
> + interrupt-controller;
> + reg = <0xfffff000 0x200>;
> + atmel,external-irqs = <29 30 31>;
> + };
> +
> + pmc: pmc at fffffc00 {
> + compatible = "atmel,at91rm9200-pmc";
> + reg = <0xfffffc00 0x100>;
> + };
> +
> + ramc: ramc at ffffea00 {
> + compatible = "atmel,at91sam9260-sdramc";
> + reg = <0xffffea00 0x200>;
> + };
> +
> + pit: timer at fffffd30 {
> + compatible = "atmel,at91sam9260-pit";
> + reg = <0xfffffd30 0xf>;
> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> + };
> +
> + tcb0: timer at fffa0000 {
> + compatible = "atmel,at91rm9200-tcb";
> + reg = <0xfffa0000 0x100>;
> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
> + 18 IRQ_TYPE_LEVEL_HIGH 0
> + 19 IRQ_TYPE_LEVEL_HIGH 0
> + >;
> + status = "disabled";
> + };
> +
> + rstc at fffffd00 {
> + compatible = "atmel,at91sam9260-rstc";
> + reg = <0xfffffd00 0x10>;
> + };
> +
> + shdwc at fffffd10 {
> + compatible = "atmel,at91sam9260-shdwc";
> + reg = <0xfffffd10 0x10>;
> + };
> +
> + pinctrl at fffff400 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> + ranges = <0xfffff400 0xfffff400 0xa00>;
> +
> + atmel,mux-mask = <
> + /* A B */
> + 0xffffffff 0xfffffff7 /* pioA */
> + 0xffffffff 0xfffffff4 /* pioB */
> + 0xffffffff 0xffffff07 /* pioC */
> + >;
> +
> + /* shared pinctrl settings */
> + dbgu {
> + pinctrl_dbgu: dbgu-0 {
> + atmel,pins =
> + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
> + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
> + };
> + };
> +
> + usart0 {
> + pinctrl_usart0: usart0-0 {
> + atmel,pins =
> + <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC8 periph A with pullup */
> + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A */
> + };
> +
> + pinctrl_usart0_rts: usart0_rts-0 {
> + atmel,pins =
> + <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC10 periph A */
> + };
> +
> + pinctrl_usart0_cts: usart0_cts-0 {
> + atmel,pins =
> + <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC11 periph A */
> + };
> + };
> +
> + usart1 {
> + pinctrl_usart1: usart1-0 {
> + atmel,pins =
> + <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A with pullup */
> + AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC13 periph A */
> + };
> +
> + pinctrl_usart1_rts: usart1_rts-0 {
> + atmel,pins =
> + <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA12 periph B */
> + };
> +
> + pinctrl_usart1_cts: usart1_cts-0 {
> + atmel,pins =
> + <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA13 periph B */
> + };
> + };
> +
> + usart2 {
> + pinctrl_usart2: usart2-0 {
> + atmel,pins =
> + <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC14 periph A with pullup */
> + AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC15 periph A */
> + };
> +
> + pinctrl_usart2_rts: usart2_rts-0 {
> + atmel,pins =
> + <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA15 periph B */
> + };
> +
> + pinctrl_usart2_cts: usart2_cts-0 {
> + atmel,pins =
> + <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA16 periph B */
> + };
> + };
> +
> + nand {
> + pinctrl_nand: nand-0 {
> + atmel,pins =
> + <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC15 gpio RDY pin pull_up*/
> + AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
> + };
> + };
> +
> + mmc0 {
> + pinctrl_mmc0_clk: mmc0_clk-0 {
> + atmel,pins =
> + <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B */
> + };
> +
> + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
> + atmel,pins =
> + <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
> + AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
> + };
> +
> + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
> + atmel,pins =
> + <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
> + AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
> + AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA6 periph B with pullup */
> + };
> + };
> +
> + ssc0 {
> + pinctrl_ssc0_tx: ssc0_tx-0 {
> + atmel,pins =
> + <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB21 periph A */
> + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB22 periph A */
> + AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
> + };
> +
> + pinctrl_ssc0_rx: ssc0_rx-0 {
> + atmel,pins =
> + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
> + AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB25 periph A */
> + AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
> + };
> + };
> +
> + ssc1 {
> + pinctrl_ssc1_tx: ssc1_tx-0 {
> + atmel,pins =
> + <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA17 periph B */
> + AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA18 periph B */
> + AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA19 periph B */
> + };
> +
> + pinctrl_ssc1_rx: ssc1_rx-0 {
> + atmel,pins =
> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA20 periph B */
> + AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B */
> + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B */
> + };
> + };
> +
> + spi0 {
> + pinctrl_spi0: spi0-0 {
> + atmel,pins =
> + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
> + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
> + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
> + };
> + };
> +
> + spi1 {
> + pinctrl_spi1: spi1-0 {
> + atmel,pins =
> + <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A SPI1_MISO pin */
> + AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB31 periph A SPI1_MOSI pin */
> + AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A SPI1_SPCK pin */
> + };
> + };
> +
> + tcb0 {
> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
> + atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
> + atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
> + atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
> + atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
> + atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
> + atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
> + atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
> + atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
> + atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + pioA: gpio at fffff400 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff400 0x200>;
> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pioB: gpio at fffff600 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff600 0x200>;
> + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pioC: gpio at fffff800 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff800 0x200>;
> + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + dbgu: serial at fffff200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffff200 0x200>;
> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dbgu>;
> + status = "disabled";
> + };
> +
> + usart0: serial at fffb0000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb0000 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart0>;
> + status = "disabled";
> + };
> +
> + usart1: serial at ffffb400 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb4000 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart1>;
> + status = "disabled";
> + };
> +
> + usart2: serial at fff94000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb8000 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart2>;
> + status = "disabled";
> + };
> +
> + ssc0: ssc at fffbc000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffbc000 0x4000>;
> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
> + status = "disabled";
> + };
> +
> + ssc1: ssc at fffc0000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffc0000 0x4000>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
> + status = "disabled";
> + };
> +
> + usb1: gadget at fffa4000 {
> + compatible = "atmel,at91rm9200-udc";
> + reg = <0xfffa4000 0x4000>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
> + status = "disabled";
> + };
> +
> + i2c0: i2c at fffac000 {
> + compatible = "atmel,at91sam9261-i2c";
> + reg = <0xfffac000 0x100>;
> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + mmc0: mmc at fffa8000 {
> + compatible = "atmel,hsmci";
> + reg = <0xfffa8000 0x600>;
> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + watchdog at fffffd40 {
> + compatible = "atmel,at91sam9260-wdt";
> + reg = <0xfffffd40 0x10>;
> + status = "disabled";
> + };
> +
> + spi0: spi at fffc8000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0xfffc8000 0x200>;
> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi0>;
> + status = "disabled";
> + };
> +
> + spi1: spi at fffcc000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0xfffcc000 0x200>;
> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1>;
> + status = "disabled";
> + };
> + };
> +
> + nand0: nand at 40000000 {
> + compatible = "atmel,at91rm9200-nand";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x40000000 0x10000000>;
> + atmel,nand-addr-offset = <22>;
> + atmel,nand-cmd-offset = <21>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nand>;
> +
> + gpios = <&pioC 15 GPIO_ACTIVE_HIGH
> + &pioC 14 GPIO_ACTIVE_HIGH
> + 0
> + >;
> + status = "disabled";
> + };
> +
> + usb0: ohci at 00500000 {
> + compatible = "atmel,at91rm9200-ohci", "usb-ohci";
> + reg = <0x00500000 0x100000>;
> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
> + status = "disabled";
> + };
> + };
> +
> + i2c at 0 {
> + compatible = "i2c-gpio";
> + gpios = <&pioA 7 GPIO_ACTIVE_HIGH /* sda */
> + &pioA 8 GPIO_ACTIVE_HIGH /* scl */
> + >;
> + i2c-gpio,sda-open-drain;
> + i2c-gpio,scl-open-drain;
> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +};
> diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
> new file mode 100644
> index 0000000..f3d22a9
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91sam9261ek.dts
> @@ -0,0 +1,75 @@
> +/*
> + * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
> + *
> + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> + *
> + * Licensed under GPLv2 only.
> + */
> +/dts-v1/;
> +#include "at91sam9261.dtsi"
> +
> +/ {
> + model = "Atmel at91sam9261ek";
> + compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
> +
> + chosen {
> + bootargs = "mem=64M console=ttyS0,115200";
> + };
> +
> + memory {
> + reg = <0x20000000 0x4000000>;
> + };
> +
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + main_clock: clock at 0 {
> + compatible = "atmel,osc", "fixed-clock";
> + clock-frequency = <18432000>;
> + };
> + };
> +
> + ahb {
> + apb {
> + dbgu: serial at fffff200 {
> + status = "okay";
> + };
> +
> + watchdog at fffffd40 {
> + status = "okay";
> + };
> + };
> +
> + nand0: nand at 40000000 {
> + nand-bus-width = <8>;
> + nand-ecc-mode = "soft";
> + nand-on-flash-bbt = <1>;
> + status = "okay";
> + at91bootstrap at 0 {
> + label = "at91bootstrap";
> + reg = <0x0 0x20000>;
> + };
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + ds8 {
> + label = "ds8";
> + gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "none";
> + };
> + ds7 {
> + label = "ds7";
> + gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "nand-disk";
> + };
> + ds1 {
> + label = "ds1";
> + gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
Didn't you forget the at91sam9261ek entry in arch/arm/boot/dts/Makefile ?
> diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
> index 6276b4c..200d17a 100644
> --- a/arch/arm/mach-at91/at91sam9261.c
> +++ b/arch/arm/mach-at91/at91sam9261.c
> @@ -189,6 +189,21 @@ static struct clk_lookup periph_clocks_lookups[] = {
> CLKDEV_CON_ID("pioA", &pioA_clk),
> CLKDEV_CON_ID("pioB", &pioB_clk),
> CLKDEV_CON_ID("pioC", &pioC_clk),
> + /* more usart lookup table for DT entries */
> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
> + CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
> + /* more tc lookup table for DT entries */
> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
> + CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
> + CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
> + CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
> + CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
> };
>
It would be great if you could add dt clk support to at91sam9261 SoC :)
(see
https://github.com/at91linux/linux-at91/blob/bbr/at91-3.14-clk/arch/arm/boot/dts/at91sam9x5.dtsi#L87).
But this is antoher story... ;)
> static struct clk_lookup usart_clocks_lookups[] = {
> diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
> index b2a3474..2f926d9 100644
> --- a/arch/arm/mach-at91/at91sam9261_devices.c
> +++ b/arch/arm/mach-at91/at91sam9261_devices.c
> @@ -599,8 +599,23 @@ static struct platform_device at91sam9261_tcb_device = {
> .num_resources = ARRAY_SIZE(tcb_resources),
> };
>
> +#if defined(CONFIG_OF)
> +static struct of_device_id tcb_ids[] = {
> + { .compatible = "atmel,at91rm9200-tcb" },
> + { /*sentinel*/ }
> +};
> +#endif
> static void __init at91_add_device_tc(void)
> {
> +#if defined(CONFIG_OF)
> + struct device_node *np;
> +
> + np = of_find_matching_node(NULL, tcb_ids);
> + if (np) {
> + of_node_put(np);
> + return;
> + }
> +#endif
Why do you need this ?
Isn't this already skipped by the following test
(if(of_have_populated_dt())) ?
> platform_device_register(&at91sam9261_tcb_device);
> }
> #else
> @@ -1088,6 +1103,9 @@ void __init at91_add_device_serial(void) {}
> */
> static int __init at91_add_standard_devices(void)
> {
> + if (of_have_populated_dt())
> + return 0;
> +
> at91_add_device_rtt();
> at91_add_device_watchdog();
> at91_add_device_tc();
>
Best Regards,
Boris
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 1/6] Basic Device Tree support for the at91sam9261
2014-01-02 23:30 ` boris brezillon
@ 2014-01-03 9:52 ` Jean-Jacques Hiblot
0 siblings, 0 replies; 18+ messages in thread
From: Jean-Jacques Hiblot @ 2014-01-03 9:52 UTC (permalink / raw)
To: linux-arm-kernel
2014/1/3 boris brezillon <b.brezillon@overkiz.com>:
> Hello JJ,
>
>
> On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
>>
>> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>>
>> This patch implements the basics to boot a at91sam9261ek with a dt-enabled
>> kernel (at91_dt_defconfig).
>> Only dbgu, nand and watchdog are described in the DT.
>>
>> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>> ---
>> arch/arm/boot/dts/at91sam9261.dtsi | 476
>> +++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/at91sam9261ek.dts | 75 +++++
>> arch/arm/mach-at91/at91sam9261.c | 15 +
>> arch/arm/mach-at91/at91sam9261_devices.c | 18 ++
>
>
> Just a nitpick, but I guess it would be cleaner to split this patch:
> 1) add a91sam9261 dt SoC support
> 2) move at91sam9261ek board to dt
I'll split this patch for the next round.
>
>
>> 4 files changed, 584 insertions(+)
>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
>>
>> diff --git a/arch/arm/boot/dts/at91sam9261.dtsi
>> b/arch/arm/boot/dts/at91sam9261.dtsi
>> new file mode 100644
>> index 0000000..ce23d7d
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91sam9261.dtsi
>> @@ -0,0 +1,476 @@
>> +/*
>> + * at91sam9261.dtsi - Device Tree Include file for AT91SAM9263 family SoC
>> + *
>> + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>> + *
>> + * Licensed under GPLv2 only.
>> + */
>> +
>> +#include "skeleton.dtsi"
>> +#include <dt-bindings/pinctrl/at91.h>
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/ {
>> + model = "Atmel AT91SAM9261 family SoC";
>> + compatible = "atmel,at91sam9261";
>> + interrupt-parent = <&aic>;
>> +
>> + aliases {
>> + serial0 = &dbgu;
>> + serial1 = &usart0;
>> + serial2 = &usart1;
>> + serial3 = &usart2;
>> + gpio0 = &pioA;
>> + gpio1 = &pioB;
>> + gpio2 = &pioC;
>> + tcb0 = &tcb0;
>> + i2c0 = &i2c0;
>> + ssc0 = &ssc0;
>> + ssc1 = &ssc1;
>> + };
>> + cpus {
>> + #address-cells = <0>;
>> + #size-cells = <0>;
>> +
>> + cpu {
>> + compatible = "arm,arm926ej-s";
>> + device_type = "cpu";
>> + };
>> + };
>> +
>> + memory {
>> + reg = <0x20000000 0x08000000>;
>> + };
>> +
>> + ahb {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + apb {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + aic: interrupt-controller at fffff000 {
>> + #interrupt-cells = <3>;
>> + compatible = "atmel,at91rm9200-aic";
>> + interrupt-controller;
>> + reg = <0xfffff000 0x200>;
>> + atmel,external-irqs = <29 30 31>;
>> + };
>> +
>> + pmc: pmc at fffffc00 {
>> + compatible = "atmel,at91rm9200-pmc";
>> + reg = <0xfffffc00 0x100>;
>> + };
>> +
>> + ramc: ramc at ffffea00 {
>> + compatible = "atmel,at91sam9260-sdramc";
>> + reg = <0xffffea00 0x200>;
>> + };
>> +
>> + pit: timer at fffffd30 {
>> + compatible = "atmel,at91sam9260-pit";
>> + reg = <0xfffffd30 0xf>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> + };
>> +
>> + tcb0: timer at fffa0000 {
>> + compatible = "atmel,at91rm9200-tcb";
>> + reg = <0xfffa0000 0x100>;
>> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
>> + 18 IRQ_TYPE_LEVEL_HIGH 0
>> + 19 IRQ_TYPE_LEVEL_HIGH 0
>> + >;
>> + status = "disabled";
>> + };
>> +
>> + rstc at fffffd00 {
>> + compatible = "atmel,at91sam9260-rstc";
>> + reg = <0xfffffd00 0x10>;
>> + };
>> +
>> + shdwc at fffffd10 {
>> + compatible = "atmel,at91sam9260-shdwc";
>> + reg = <0xfffffd10 0x10>;
>> + };
>> +
>> + pinctrl at fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl",
>> "simple-bus";
>> + ranges = <0xfffff400 0xfffff400 0xa00>;
>> +
>> + atmel,mux-mask = <
>> + /* A B */
>> + 0xffffffff 0xfffffff7 /* pioA */
>> + 0xffffffff 0xfffffff4 /* pioB */
>> + 0xffffffff 0xffffff07 /* pioC */
>> + >;
>> +
>> + /* shared pinctrl settings */
>> + dbgu {
>> + pinctrl_dbgu: dbgu-0 {
>> + atmel,pins =
>> + <AT91_PIOA 9
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
>> + AT91_PIOA 10
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
>> + };
>> + };
>> +
>> + usart0 {
>> + pinctrl_usart0: usart0-0 {
>> + atmel,pins =
>> + <AT91_PIOC 8
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC8 periph A with pullup */
>> + AT91_PIOC 9
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A */
>> + };
>> +
>> + pinctrl_usart0_rts: usart0_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOC 10
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC10 periph A */
>> + };
>> +
>> + pinctrl_usart0_cts: usart0_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOC 11
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC11 periph A */
>> + };
>> + };
>> +
>> + usart1 {
>> + pinctrl_usart1: usart1-0 {
>> + atmel,pins =
>> + <AT91_PIOC 12
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A with pullup */
>> + AT91_PIOC 13
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC13 periph A */
>> + };
>> +
>> + pinctrl_usart1_rts: usart1_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 12
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA12 periph B */
>> + };
>> +
>> + pinctrl_usart1_cts: usart1_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 13
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA13 periph B */
>> + };
>> + };
>> +
>> + usart2 {
>> + pinctrl_usart2: usart2-0 {
>> + atmel,pins =
>> + <AT91_PIOC 14
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC14 periph A with pullup */
>> + AT91_PIOC 15
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC15 periph A */
>> + };
>> +
>> + pinctrl_usart2_rts: usart2_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 15
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA15 periph B */
>> + };
>> +
>> + pinctrl_usart2_cts: usart2_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 16
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA16 periph B */
>> + };
>> + };
>> +
>> + nand {
>> + pinctrl_nand: nand-0 {
>> + atmel,pins =
>> + <AT91_PIOC 15
>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC15 gpio RDY pin pull_up*/
>> + AT91_PIOC 14
>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
>> + };
>> + };
>> +
>> + mmc0 {
>> + pinctrl_mmc0_clk: mmc0_clk-0 {
>> + atmel,pins =
>> + <AT91_PIOA 2
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B */
>> + };
>> +
>> + pinctrl_mmc0_slot0_cmd_dat0:
>> mmc0_slot0_cmd_dat0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 1
>> AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
>> + AT91_PIOA 0
>> AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
>> + };
>> +
>> + pinctrl_mmc0_slot0_dat1_3:
>> mmc0_slot0_dat1_3-0 {
>> + atmel,pins =
>> + <AT91_PIOA 4
>> AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
>> + AT91_PIOA 5
>> AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
>> + AT91_PIOA 6
>> AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA6 periph B with pullup */
>> + };
>> + };
>> +
>> + ssc0 {
>> + pinctrl_ssc0_tx: ssc0_tx-0 {
>> + atmel,pins =
>> + <AT91_PIOB 21
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB21 periph A */
>> + AT91_PIOB 22
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB22 periph A */
>> + AT91_PIOB 23
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
>> + };
>> +
>> + pinctrl_ssc0_rx: ssc0_rx-0 {
>> + atmel,pins =
>> + <AT91_PIOB 24
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
>> + AT91_PIOB 25
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB25 periph A */
>> + AT91_PIOB 26
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
>> + };
>> + };
>> +
>> + ssc1 {
>> + pinctrl_ssc1_tx: ssc1_tx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 17
>> AT91_PERIPH_B AT91_PINCTRL_NONE /* PA17 periph B */
>> + AT91_PIOA 18
>> AT91_PERIPH_B AT91_PINCTRL_NONE /* PA18 periph B */
>> + AT91_PIOA 19
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA19 periph B */
>> + };
>> +
>> + pinctrl_ssc1_rx: ssc1_rx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 20
>> AT91_PERIPH_B AT91_PINCTRL_NONE /* PA20 periph B */
>> + AT91_PIOA 21
>> AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B */
>> + AT91_PIOA 22
>> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B */
>> + };
>> + };
>> +
>> + spi0 {
>> + pinctrl_spi0: spi0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 0
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
>> + AT91_PIOA 1
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
>> + AT91_PIOA 2
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
>> + };
>> + };
>> +
>> + spi1 {
>> + pinctrl_spi1: spi1-0 {
>> + atmel,pins =
>> + <AT91_PIOB 30
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A SPI1_MISO pin */
>> + AT91_PIOB 31
>> AT91_PERIPH_A AT91_PINCTRL_NONE /* PB31 periph A SPI1_MOSI pin */
>> + AT91_PIOB 29
>> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A SPI1_SPCK pin */
>> + };
>> + };
>> +
>> + tcb0 {
>> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
>> + atmel,pins = <AT91_PIOC 16
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
>> + atmel,pins = <AT91_PIOC 17
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
>> + atmel,pins = <AT91_PIOC 18
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
>> + atmel,pins = <AT91_PIOC 19
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
>> + atmel,pins = <AT91_PIOC 21
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
>> + atmel,pins = <AT91_PIOC 23
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
>> + atmel,pins = <AT91_PIOC 20
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
>> + atmel,pins = <AT91_PIOC 22
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
>> + atmel,pins = <AT91_PIOC 24
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + pioA: gpio at fffff400 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff400 0x200>;
>> + interrupts = <2
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pioB: gpio at fffff600 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff600 0x200>;
>> + interrupts = <3
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pioC: gpio at fffff800 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff800 0x200>;
>> + interrupts = <4
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>> +
>> + dbgu: serial at fffff200 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffff200 0x200>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_dbgu>;
>> + status = "disabled";
>> + };
>> +
>> + usart0: serial at fffb0000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb0000 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart0>;
>> + status = "disabled";
>> + };
>> +
>> + usart1: serial at ffffb400 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb4000 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart1>;
>> + status = "disabled";
>> + };
>> +
>> + usart2: serial at fff94000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb8000 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart2>;
>> + status = "disabled";
>> + };
>> +
>> + ssc0: ssc at fffbc000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffbc000 0x4000>;
>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc0_tx
>> &pinctrl_ssc0_rx>;
>> + status = "disabled";
>> + };
>> +
>> + ssc1: ssc at fffc0000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffc0000 0x4000>;
>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc1_tx
>> &pinctrl_ssc1_rx>;
>> + status = "disabled";
>> + };
>> +
>> + usb1: gadget at fffa4000 {
>> + compatible = "atmel,at91rm9200-udc";
>> + reg = <0xfffa4000 0x4000>;
>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
>> + status = "disabled";
>> + };
>> +
>> + i2c0: i2c at fffac000 {
>> + compatible = "atmel,at91sam9261-i2c";
>> + reg = <0xfffac000 0x100>;
>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + mmc0: mmc at fffa8000 {
>> + compatible = "atmel,hsmci";
>> + reg = <0xfffa8000 0x600>;
>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog at fffffd40 {
>> + compatible = "atmel,at91sam9260-wdt";
>> + reg = <0xfffffd40 0x10>;
>> + status = "disabled";
>> + };
>> +
>> + spi0: spi at fffc8000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "atmel,at91rm9200-spi";
>> + reg = <0xfffc8000 0x200>;
>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi0>;
>> + status = "disabled";
>> + };
>> +
>> + spi1: spi at fffcc000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "atmel,at91rm9200-spi";
>> + reg = <0xfffcc000 0x200>;
>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi1>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + nand0: nand at 40000000 {
>> + compatible = "atmel,at91rm9200-nand";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + reg = <0x40000000 0x10000000>;
>> + atmel,nand-addr-offset = <22>;
>> + atmel,nand-cmd-offset = <21>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_nand>;
>> +
>> + gpios = <&pioC 15 GPIO_ACTIVE_HIGH
>> + &pioC 14 GPIO_ACTIVE_HIGH
>> + 0
>> + >;
>> + status = "disabled";
>> + };
>> +
>> + usb0: ohci at 00500000 {
>> + compatible = "atmel,at91rm9200-ohci", "usb-ohci";
>> + reg = <0x00500000 0x100000>;
>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + i2c at 0 {
>> + compatible = "i2c-gpio";
>> + gpios = <&pioA 7 GPIO_ACTIVE_HIGH /* sda */
>> + &pioA 8 GPIO_ACTIVE_HIGH /* scl */
>> + >;
>> + i2c-gpio,sda-open-drain;
>> + i2c-gpio,scl-open-drain;
>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +};
>> diff --git a/arch/arm/boot/dts/at91sam9261ek.dts
>> b/arch/arm/boot/dts/at91sam9261ek.dts
>> new file mode 100644
>> index 0000000..f3d22a9
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91sam9261ek.dts
>> @@ -0,0 +1,75 @@
>> +/*
>> + * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference
>> board
>> + *
>> + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>> + *
>> + * Licensed under GPLv2 only.
>> + */
>> +/dts-v1/;
>> +#include "at91sam9261.dtsi"
>> +
>> +/ {
>> + model = "Atmel at91sam9261ek";
>> + compatible = "atmel,at91sam9261ek", "atmel,at91sam9261",
>> "atmel,at91sam9";
>> +
>> + chosen {
>> + bootargs = "mem=64M console=ttyS0,115200";
>> + };
>> +
>> + memory {
>> + reg = <0x20000000 0x4000000>;
>> + };
>> +
>> + clocks {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + main_clock: clock at 0 {
>> + compatible = "atmel,osc", "fixed-clock";
>> + clock-frequency = <18432000>;
>> + };
>> + };
>> +
>> + ahb {
>> + apb {
>> + dbgu: serial at fffff200 {
>> + status = "okay";
>> + };
>> +
>> + watchdog at fffffd40 {
>> + status = "okay";
>> + };
>> + };
>> +
>> + nand0: nand at 40000000 {
>> + nand-bus-width = <8>;
>> + nand-ecc-mode = "soft";
>> + nand-on-flash-bbt = <1>;
>> + status = "okay";
>> + at91bootstrap at 0 {
>> + label = "at91bootstrap";
>> + reg = <0x0 0x20000>;
>> + };
>> + };
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> + ds8 {
>> + label = "ds8";
>> + gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
>> + linux,default-trigger = "none";
>> + };
>> + ds7 {
>> + label = "ds7";
>> + gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
>> + linux,default-trigger = "nand-disk";
>> + };
>> + ds1 {
>> + label = "ds1";
>> + gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
>> + linux,default-trigger = "heartbeat";
>> + };
>> + };
>> +};
>
>
> Didn't you forget the at91sam9261ek entry in arch/arm/boot/dts/Makefile ?
Indeed I did forget
>
>
>> diff --git a/arch/arm/mach-at91/at91sam9261.c
>> b/arch/arm/mach-at91/at91sam9261.c
>> index 6276b4c..200d17a 100644
>> --- a/arch/arm/mach-at91/at91sam9261.c
>> +++ b/arch/arm/mach-at91/at91sam9261.c
>> @@ -189,6 +189,21 @@ static struct clk_lookup periph_clocks_lookups[] = {
>> CLKDEV_CON_ID("pioA", &pioA_clk),
>> CLKDEV_CON_ID("pioB", &pioB_clk),
>> CLKDEV_CON_ID("pioC", &pioC_clk),
>> + /* more usart lookup table for DT entries */
>> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
>> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
>> + CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
>> + /* more tc lookup table for DT entries */
>> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
>> + CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
>> + CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
>> + CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
>> + CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
>> };
>>
>
> It would be great if you could add dt clk support to at91sam9261 SoC :) (see
> https://github.com/at91linux/linux-at91/blob/bbr/at91-3.14-clk/arch/arm/boot/dts/at91sam9x5.dtsi#L87).
> But this is antoher story... ;)
This is just a start :o) There is a lot of room for improvement.
>
>
>> static struct clk_lookup usart_clocks_lookups[] = {
>> diff --git a/arch/arm/mach-at91/at91sam9261_devices.c
>> b/arch/arm/mach-at91/at91sam9261_devices.c
>> index b2a3474..2f926d9 100644
>> --- a/arch/arm/mach-at91/at91sam9261_devices.c
>> +++ b/arch/arm/mach-at91/at91sam9261_devices.c
>> @@ -599,8 +599,23 @@ static struct platform_device at91sam9261_tcb_device
>> = {
>> .num_resources = ARRAY_SIZE(tcb_resources),
>> };
>>
>> +#if defined(CONFIG_OF)
>> +static struct of_device_id tcb_ids[] = {
>> + { .compatible = "atmel,at91rm9200-tcb" },
>> + { /*sentinel*/ }
>> +};
>> +#endif
>> static void __init at91_add_device_tc(void)
>> {
>> +#if defined(CONFIG_OF)
>> + struct device_node *np;
>> +
>> + np = of_find_matching_node(NULL, tcb_ids);
>> + if (np) {
>> + of_node_put(np);
>> + return;
>> + }
>> +#endif
>
>
> Why do you need this ?
> Isn't this already skipped by the following test
> (if(of_have_populated_dt())) ?
>
Actually I tried to match closely the 9263 and this part comes from
the 9263 code. This comes from
4abb367722c2dc06972658c8fad5b4763114477c which brings dt support to
the 9263. I didn't undertsand it, but include it anyway. I'll remove
this.
>
>> platform_device_register(&at91sam9261_tcb_device);
>> }
>> #else
>> @@ -1088,6 +1103,9 @@ void __init at91_add_device_serial(void) {}
>> */
>> static int __init at91_add_standard_devices(void)
>> {
>> + if (of_have_populated_dt())
>> + return 0;
>> +
>> at91_add_device_rtt();
>> at91_add_device_watchdog();
>> at91_add_device_tc();
>>
>
> Best Regards,
>
> Boris
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/6] at91: dt: sam9261: Added support for the lcd display
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 1/6] Basic Device Tree support for the at91sam9261 jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 3/6] At91: dt: Added smc bus driver jjhiblot at traphandler.com
` (4 subsequent siblings)
6 siblings, 0 replies; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 37 ++++++++++++++++++++++++++++++++++++-
arch/arm/boot/dts/at91sam9261ek.dts | 31 +++++++++++++++++++++++++++++++
arch/arm/mach-at91/at91sam9261.c | 1 +
3 files changed, 68 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index ce23d7d..7ee0fff 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -290,7 +290,33 @@
atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
-
+ fb {
+ pinctrl_fb: fb-0 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
+ AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB18 periph A */
+ AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
+ AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B */
+ AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B */
+ AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B */
+ AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB26 periph B */
+ AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB27 periph B */
+ AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB28 periph B */
+ >;
+ };
+ };
pioA: gpio at fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
@@ -436,6 +462,15 @@
};
};
+ fb0: fb at 0x00600000 {
+ compatible = "atmel,at91sam9261-lcdc";
+ reg = <0x00600000 0x1000>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fb>;
+ status = "disabled";
+ };
+
nand0: nand at 40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index f3d22a9..03c05fc 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -52,6 +52,37 @@
reg = <0x0 0x20000>;
};
};
+
+ fb0: fb at 0x00600000 {
+ display = <&display0>;
+ status = "okay";
+ atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
+ display0: display {
+ bits-per-pixel = <16>;
+ atmel,lcdcon-backlight;
+ atmel,dmacon = <0x1>;
+ atmel,lcdcon2 = <0x80008002>;
+ atmel,guard-time = <1>;
+ atmel,lcd-wiring-mode = "BRG";
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <4965000>;
+ hactive = <240>;
+ vactive = <320>;
+ hback-porch = <1>;
+ hfront-porch = <33>;
+ vback-porch = <1>;
+ vfront-porch = <0>;
+ hsync-len = <5>;
+ vsync-len = <1>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+ };
};
leds {
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 200d17a..a67bfe6 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -197,6 +197,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
/* more tc lookup table for DT entries */
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
+ CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 3/6] At91: dt: Added smc bus driver
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 1/6] Basic Device Tree support for the at91sam9261 jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 2/6] at91: dt: sam9261: Added support for the lcd display jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2013-12-31 18:03 ` boris brezillon
2014-01-03 0:24 ` boris brezillon
2013-12-31 16:32 ` [PATCH 4/6] at91: dt: sam9261: Pinmux DT entries for the SMC/EBI interface jjhiblot at traphandler.com
` (3 subsequent siblings)
6 siblings, 2 replies; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
The EBI/SMC external interface is used to access external peripherals (NAND
and Ethernet controller in the case of sam9261ek). Different configurations and
timings are required for those peripherals. This bus driver can be used to
setup the bus timings/configuration from the device tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
drivers/bus/Kconfig | 9 +++
drivers/bus/Makefile | 1 +
drivers/bus/atmel-smc.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 192 insertions(+)
create mode 100644 drivers/bus/atmel-smc.c
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 552373c..8c944db5 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -12,6 +12,15 @@ config IMX_WEIM
The WEIM(Wireless External Interface Module) works like a bus.
You can attach many different devices on it, such as NOR, onenand.
+config ATMEL_SMC
+ bool "Atmel SMC/EBI driver"
+ depends on SOC_AT91SAM9 && OF
+ help
+ Driver for Atmel SMC/EBI controller.
+ Used to configure the EBI (external bus interface) when the device-
+ tree is used. This bus supports NANDs, external ethernet controller,
+ SRAMs, ATA devices.
+
config MVEBU_MBUS
bool
depends on PLAT_ORION
diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
index 8947bdd..4364003 100644
--- a/drivers/bus/Makefile
+++ b/drivers/bus/Makefile
@@ -2,6 +2,7 @@
# Makefile for the bus drivers.
#
+obj-$(CONFIG_ATMEL_SMC) += atmel-smc.o
obj-$(CONFIG_IMX_WEIM) += imx-weim.o
obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
diff --git a/drivers/bus/atmel-smc.c b/drivers/bus/atmel-smc.c
new file mode 100644
index 0000000..06e530d
--- /dev/null
+++ b/drivers/bus/atmel-smc.c
@@ -0,0 +1,182 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/of_device.h>
+#include <mach/at91sam9_smc.h>
+
+struct at91_smc_devtype {
+ unsigned int cs_count;
+};
+
+static const struct at91_smc_devtype sam9261_smc_devtype = {
+ .cs_count = 6,
+};
+
+static const struct of_device_id smc_id_table[] = {
+ { .compatible = "atmel,at91sam9261-smc", .data = &sam9261_smc_devtype},
+ { }
+};
+MODULE_DEVICE_TABLE(of, smc_id_table);
+
+struct smc_parameters_type {
+ const char *name;
+ u16 reg;
+ u16 width;
+ u16 shift;
+};
+
+#define SETUP 0
+#define PULSE 1
+#define CYCLE 2
+#define MODE 3
+static const struct smc_parameters_type smc_parameters[] = {
+ {"smc,ncs_read_setup", SETUP, 6, 24},
+ {"smc,nrd_setup", SETUP, 6, 16},
+ {"smc,ncs_write_setup", SETUP, 6, 8},
+ {"smc,nwe_setup", SETUP, 6, 0},
+ {"smc,ncs_read_pulse", PULSE, 6, 24},
+ {"smc,nrd_pulse", PULSE, 6, 16},
+ {"smc,ncs_write_pulse", PULSE, 6, 8},
+ {"smc,nwe_pulse", PULSE, 6, 0},
+ {"smc,read_cycle", CYCLE, 9, 16},
+ {"smc,write_cycle", CYCLE, 9, 0},
+ {"smc,burst_size", MODE, 2, 28},
+ {"smc,burst_enabled", MODE, 1, 24},
+ {"smc,tdf_mode", MODE, 1, 20},
+ {"smc,tdf_cycles", MODE, 4, 16},
+ {"smc,bus_width", MODE, 2, 12},
+ {"smc,byte_access_type", MODE, 1, 8},
+ {"smc,nwait_mode", MODE, 2, 4},
+ {"smc,write_mode", MODE, 1, 0},
+ {"smc,read_mode", MODE, 1, 1},
+ {NULL}
+};
+
+/* Parse and set the timing for this device. */
+static int __init smc_timing_setup(struct device *dev, struct device_node *np,
+ void __iomem *base, const struct at91_smc_devtype *devtype)
+{
+ u32 val;
+ int ret;
+ u32 cs;
+ const struct smc_parameters_type *p = smc_parameters;
+ u32 shadow_smc_regs[5];
+
+ ret = of_property_read_u32(np, "smc,cs" , &cs);
+ if (ret < 0) {
+ dev_err(dev, "missing mandatory property : smc,cs\n");
+ return ret;
+ }
+ if (val >= devtype->cs_count) {
+ dev_err(dev, "invalid value for property smc,cs (=%d)."
+ "Must be in range 0 to %d\n", cs, devtype->cs_count-1);
+ return -EINVAL;
+ }
+
+ /* set the timing for EBI */
+ base += (0x10 * cs);
+ shadow_smc_regs[SETUP] = readl_relaxed(base + AT91_SMC_SETUP);
+ shadow_smc_regs[PULSE] = readl_relaxed(base + AT91_SMC_PULSE);
+ shadow_smc_regs[CYCLE] = readl_relaxed(base + AT91_SMC_CYCLE);
+ shadow_smc_regs[MODE] = readl_relaxed(base + AT91_SMC_MODE);
+
+ while (p->name) {
+ ret = of_property_read_u32(np, p->name , &val);
+ if (ret == -EINVAL) {
+ dev_dbg(dev, "cs %d: property %s not set.\n", cs,
+ p->name);
+ p++;
+ continue;
+ } else if (ret) {
+ dev_err(dev, "cs %d: can't get property %s.\n", cs,
+ p->name);
+ return ret;
+ }
+ if (val >= (1<<p->width)) {
+ dev_err(dev, "cs %d: property %s out of range.\n", cs,
+ p->name);
+ return -ERANGE;
+ }
+ shadow_smc_regs[p->reg] &= ~(((1<<p->width)-1) << p->shift);
+ shadow_smc_regs[p->reg] |= (val << p->shift);
+ p++;
+ }
+ writel_relaxed(shadow_smc_regs[SETUP], base + AT91_SMC_SETUP);
+ writel_relaxed(shadow_smc_regs[PULSE], base + AT91_SMC_PULSE);
+ writel_relaxed(shadow_smc_regs[CYCLE], base + AT91_SMC_CYCLE);
+ writel_relaxed(shadow_smc_regs[MODE], base + AT91_SMC_MODE);
+ return 0;
+}
+
+static int __init smc_parse_dt(struct platform_device *pdev,
+ void __iomem *base)
+{
+ struct device *dev = &pdev->dev;
+ const struct of_device_id *of_id = of_match_device(smc_id_table, dev);
+ const struct at91_smc_devtype *devtype = of_id->data;
+ struct device_node *child;
+ int ret;
+
+ for_each_child_of_node(dev->of_node, child) {
+ if (!child->name)
+ continue;
+
+ ret = smc_timing_setup(dev, child, base, devtype);
+ if (ret) {
+ dev_err(dev, "%s set timing failed.\n",
+ child->full_name);
+ return ret;
+ }
+ }
+
+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
+ if (ret)
+ dev_err(dev, "%s fail to create devices.\n",
+ dev->of_node->full_name);
+ return ret;
+}
+
+static int __init smc_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ void __iomem *base;
+ int ret;
+
+ /* get the resource */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_request_and_ioremap(&pdev->dev, res);
+ if (IS_ERR(base)) {
+ dev_err(&pdev->dev, "can't map SMC base address\n");
+ return PTR_ERR(base);
+ }
+
+ /* parse the device node */
+ ret = smc_parse_dt(pdev, base);
+ if (!ret)
+ dev_info(&pdev->dev, "Driver registered.\n");
+
+ return ret;
+}
+
+static struct platform_driver smc_driver = {
+ .driver = {
+ .name = "atmel-smc",
+ .owner = THIS_MODULE,
+ .of_match_table = smc_id_table,
+ },
+};
+module_platform_driver_probe(smc_driver, smc_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's SMC/EBI driver");
+MODULE_LICENSE("GPL");
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 3/6] At91: dt: Added smc bus driver
2013-12-31 16:32 ` [PATCH 3/6] At91: dt: Added smc bus driver jjhiblot at traphandler.com
@ 2013-12-31 18:03 ` boris brezillon
2014-01-03 0:24 ` boris brezillon
1 sibling, 0 replies; 18+ messages in thread
From: boris brezillon @ 2013-12-31 18:03 UTC (permalink / raw)
To: linux-arm-kernel
On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>
> The EBI/SMC external interface is used to access external peripherals (NAND
> and Ethernet controller in the case of sam9261ek). Different configurations and
> timings are required for those peripherals. This bus driver can be used to
> setup the bus timings/configuration from the device tree.
>
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> ---
> drivers/bus/Kconfig | 9 +++
> drivers/bus/Makefile | 1 +
> drivers/bus/atmel-smc.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++++
IMHO this driver should be placed in drivers/memory: the mvebu-devbus
driver provides the same kind of functionnalities.
BTW, I recently had a talk with Nicolas regarding this SMC/EBI driver
and he was about to repost an old patch providing this driver:
http://www.spinics.net/lists/arm-kernel/msg144838.html
I'll take a closer look at your code later ;).
> 3 files changed, 192 insertions(+)
> create mode 100644 drivers/bus/atmel-smc.c
>
> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
> index 552373c..8c944db5 100644
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@ -12,6 +12,15 @@ config IMX_WEIM
> The WEIM(Wireless External Interface Module) works like a bus.
> You can attach many different devices on it, such as NOR, onenand.
>
> +config ATMEL_SMC
> + bool "Atmel SMC/EBI driver"
> + depends on SOC_AT91SAM9 && OF
> + help
> + Driver for Atmel SMC/EBI controller.
> + Used to configure the EBI (external bus interface) when the device-
> + tree is used. This bus supports NANDs, external ethernet controller,
> + SRAMs, ATA devices.
> +
> config MVEBU_MBUS
> bool
> depends on PLAT_ORION
> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
> index 8947bdd..4364003 100644
> --- a/drivers/bus/Makefile
> +++ b/drivers/bus/Makefile
> @@ -2,6 +2,7 @@
> # Makefile for the bus drivers.
> #
>
> +obj-$(CONFIG_ATMEL_SMC) += atmel-smc.o
> obj-$(CONFIG_IMX_WEIM) += imx-weim.o
> obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
> obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
> diff --git a/drivers/bus/atmel-smc.c b/drivers/bus/atmel-smc.c
> new file mode 100644
> index 0000000..06e530d
> --- /dev/null
> +++ b/drivers/bus/atmel-smc.c
> @@ -0,0 +1,182 @@
> +/*
> + * EBI driver for Atmel SAM9 chips
> + * inspired by the fsl weim bus driver
> + *
> + * Copyright (C) 2013 JJ Hiblot.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +#include <linux/module.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/of_device.h>
> +#include <mach/at91sam9_smc.h>
> +
> +struct at91_smc_devtype {
> + unsigned int cs_count;
> +};
> +
> +static const struct at91_smc_devtype sam9261_smc_devtype = {
> + .cs_count = 6,
> +};
> +
> +static const struct of_device_id smc_id_table[] = {
> + { .compatible = "atmel,at91sam9261-smc", .data = &sam9261_smc_devtype},
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, smc_id_table);
> +
> +struct smc_parameters_type {
> + const char *name;
> + u16 reg;
> + u16 width;
> + u16 shift;
> +};
> +
> +#define SETUP 0
> +#define PULSE 1
> +#define CYCLE 2
> +#define MODE 3
> +static const struct smc_parameters_type smc_parameters[] = {
> + {"smc,ncs_read_setup", SETUP, 6, 24},
> + {"smc,nrd_setup", SETUP, 6, 16},
> + {"smc,ncs_write_setup", SETUP, 6, 8},
> + {"smc,nwe_setup", SETUP, 6, 0},
> + {"smc,ncs_read_pulse", PULSE, 6, 24},
> + {"smc,nrd_pulse", PULSE, 6, 16},
> + {"smc,ncs_write_pulse", PULSE, 6, 8},
> + {"smc,nwe_pulse", PULSE, 6, 0},
> + {"smc,read_cycle", CYCLE, 9, 16},
> + {"smc,write_cycle", CYCLE, 9, 0},
> + {"smc,burst_size", MODE, 2, 28},
> + {"smc,burst_enabled", MODE, 1, 24},
> + {"smc,tdf_mode", MODE, 1, 20},
> + {"smc,tdf_cycles", MODE, 4, 16},
> + {"smc,bus_width", MODE, 2, 12},
> + {"smc,byte_access_type", MODE, 1, 8},
> + {"smc,nwait_mode", MODE, 2, 4},
> + {"smc,write_mode", MODE, 1, 0},
> + {"smc,read_mode", MODE, 1, 1},
> + {NULL}
> +};
> +
> +/* Parse and set the timing for this device. */
> +static int __init smc_timing_setup(struct device *dev, struct device_node *np,
> + void __iomem *base, const struct at91_smc_devtype *devtype)
> +{
> + u32 val;
> + int ret;
> + u32 cs;
> + const struct smc_parameters_type *p = smc_parameters;
> + u32 shadow_smc_regs[5];
> +
> + ret = of_property_read_u32(np, "smc,cs" , &cs);
> + if (ret < 0) {
> + dev_err(dev, "missing mandatory property : smc,cs\n");
> + return ret;
> + }
> + if (val >= devtype->cs_count) {
> + dev_err(dev, "invalid value for property smc,cs (=%d)."
> + "Must be in range 0 to %d\n", cs, devtype->cs_count-1);
> + return -EINVAL;
> + }
> +
> + /* set the timing for EBI */
> + base += (0x10 * cs);
> + shadow_smc_regs[SETUP] = readl_relaxed(base + AT91_SMC_SETUP);
> + shadow_smc_regs[PULSE] = readl_relaxed(base + AT91_SMC_PULSE);
> + shadow_smc_regs[CYCLE] = readl_relaxed(base + AT91_SMC_CYCLE);
> + shadow_smc_regs[MODE] = readl_relaxed(base + AT91_SMC_MODE);
> +
> + while (p->name) {
> + ret = of_property_read_u32(np, p->name , &val);
> + if (ret == -EINVAL) {
> + dev_dbg(dev, "cs %d: property %s not set.\n", cs,
> + p->name);
> + p++;
> + continue;
> + } else if (ret) {
> + dev_err(dev, "cs %d: can't get property %s.\n", cs,
> + p->name);
> + return ret;
> + }
> + if (val >= (1<<p->width)) {
> + dev_err(dev, "cs %d: property %s out of range.\n", cs,
> + p->name);
> + return -ERANGE;
> + }
> + shadow_smc_regs[p->reg] &= ~(((1<<p->width)-1) << p->shift);
> + shadow_smc_regs[p->reg] |= (val << p->shift);
> + p++;
> + }
> + writel_relaxed(shadow_smc_regs[SETUP], base + AT91_SMC_SETUP);
> + writel_relaxed(shadow_smc_regs[PULSE], base + AT91_SMC_PULSE);
> + writel_relaxed(shadow_smc_regs[CYCLE], base + AT91_SMC_CYCLE);
> + writel_relaxed(shadow_smc_regs[MODE], base + AT91_SMC_MODE);
> + return 0;
> +}
> +
> +static int __init smc_parse_dt(struct platform_device *pdev,
> + void __iomem *base)
> +{
> + struct device *dev = &pdev->dev;
> + const struct of_device_id *of_id = of_match_device(smc_id_table, dev);
> + const struct at91_smc_devtype *devtype = of_id->data;
> + struct device_node *child;
> + int ret;
> +
> + for_each_child_of_node(dev->of_node, child) {
> + if (!child->name)
> + continue;
> +
> + ret = smc_timing_setup(dev, child, base, devtype);
> + if (ret) {
> + dev_err(dev, "%s set timing failed.\n",
> + child->full_name);
> + return ret;
> + }
> + }
> +
> + ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
> + if (ret)
> + dev_err(dev, "%s fail to create devices.\n",
> + dev->of_node->full_name);
> + return ret;
> +}
> +
> +static int __init smc_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + void __iomem *base;
> + int ret;
> +
> + /* get the resource */
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = devm_request_and_ioremap(&pdev->dev, res);
> + if (IS_ERR(base)) {
> + dev_err(&pdev->dev, "can't map SMC base address\n");
> + return PTR_ERR(base);
> + }
> +
> + /* parse the device node */
> + ret = smc_parse_dt(pdev, base);
> + if (!ret)
> + dev_info(&pdev->dev, "Driver registered.\n");
> +
> + return ret;
> +}
> +
> +static struct platform_driver smc_driver = {
> + .driver = {
> + .name = "atmel-smc",
> + .owner = THIS_MODULE,
> + .of_match_table = smc_id_table,
> + },
> +};
> +module_platform_driver_probe(smc_driver, smc_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's SMC/EBI driver");
> +MODULE_LICENSE("GPL");
>
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 3/6] At91: dt: Added smc bus driver
2013-12-31 16:32 ` [PATCH 3/6] At91: dt: Added smc bus driver jjhiblot at traphandler.com
2013-12-31 18:03 ` boris brezillon
@ 2014-01-03 0:24 ` boris brezillon
2014-01-03 9:42 ` Jean-Jacques Hiblot
1 sibling, 1 reply; 18+ messages in thread
From: boris brezillon @ 2014-01-03 0:24 UTC (permalink / raw)
To: linux-arm-kernel
On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>
> The EBI/SMC external interface is used to access external peripherals (NAND
> and Ethernet controller in the case of sam9261ek). Different configurations and
> timings are required for those peripherals. This bus driver can be used to
> setup the bus timings/configuration from the device tree.
>
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> ---
> drivers/bus/Kconfig | 9 +++
> drivers/bus/Makefile | 1 +
> drivers/bus/atmel-smc.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 192 insertions(+)
> create mode 100644 drivers/bus/atmel-smc.c
>
> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
> index 552373c..8c944db5 100644
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@ -12,6 +12,15 @@ config IMX_WEIM
> The WEIM(Wireless External Interface Module) works like a bus.
> You can attach many different devices on it, such as NOR, onenand.
>
> +config ATMEL_SMC
> + bool "Atmel SMC/EBI driver"
> + depends on SOC_AT91SAM9 && OF
> + help
> + Driver for Atmel SMC/EBI controller.
> + Used to configure the EBI (external bus interface) when the device-
> + tree is used. This bus supports NANDs, external ethernet controller,
> + SRAMs, ATA devices.
> +
> config MVEBU_MBUS
> bool
> depends on PLAT_ORION
> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
> index 8947bdd..4364003 100644
> --- a/drivers/bus/Makefile
> +++ b/drivers/bus/Makefile
> @@ -2,6 +2,7 @@
> # Makefile for the bus drivers.
> #
>
> +obj-$(CONFIG_ATMEL_SMC) += atmel-smc.o
> obj-$(CONFIG_IMX_WEIM) += imx-weim.o
> obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
> obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
> diff --git a/drivers/bus/atmel-smc.c b/drivers/bus/atmel-smc.c
> new file mode 100644
> index 0000000..06e530d
> --- /dev/null
> +++ b/drivers/bus/atmel-smc.c
> @@ -0,0 +1,182 @@
> +/*
> + * EBI driver for Atmel SAM9 chips
> + * inspired by the fsl weim bus driver
> + *
> + * Copyright (C) 2013 JJ Hiblot.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +#include <linux/module.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/of_device.h>
> +#include <mach/at91sam9_smc.h>
> +
> +struct at91_smc_devtype {
> + unsigned int cs_count;
> +};
> +
> +static const struct at91_smc_devtype sam9261_smc_devtype = {
> + .cs_count = 6,
> +};
> +
> +static const struct of_device_id smc_id_table[] = {
> + { .compatible = "atmel,at91sam9261-smc", .data = &sam9261_smc_devtype},
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, smc_id_table);
> +
> +struct smc_parameters_type {
> + const char *name;
> + u16 reg;
> + u16 width;
> + u16 shift;
> +};
> +
> +#define SETUP 0
> +#define PULSE 1
> +#define CYCLE 2
> +#define MODE 3
> +static const struct smc_parameters_type smc_parameters[] = {
> + {"smc,ncs_read_setup", SETUP, 6, 24},
> + {"smc,nrd_setup", SETUP, 6, 16},
> + {"smc,ncs_write_setup", SETUP, 6, 8},
> + {"smc,nwe_setup", SETUP, 6, 0},
> + {"smc,ncs_read_pulse", PULSE, 6, 24},
> + {"smc,nrd_pulse", PULSE, 6, 16},
> + {"smc,ncs_write_pulse", PULSE, 6, 8},
> + {"smc,nwe_pulse", PULSE, 6, 0},
> + {"smc,read_cycle", CYCLE, 9, 16},
> + {"smc,write_cycle", CYCLE, 9, 0},
> + {"smc,burst_size", MODE, 2, 28},
> + {"smc,burst_enabled", MODE, 1, 24},
> + {"smc,tdf_mode", MODE, 1, 20},
> + {"smc,tdf_cycles", MODE, 4, 16},
> + {"smc,bus_width", MODE, 2, 12},
> + {"smc,byte_access_type", MODE, 1, 8},
> + {"smc,nwait_mode", MODE, 2, 4},
> + {"smc,write_mode", MODE, 1, 0},
> + {"smc,read_mode", MODE, 1, 1},
> + {NULL}
> +};
> +
> +/* Parse and set the timing for this device. */
> +static int __init smc_timing_setup(struct device *dev, struct device_node *np,
> + void __iomem *base, const struct at91_smc_devtype *devtype)
> +{
> + u32 val;
> + int ret;
> + u32 cs;
> + const struct smc_parameters_type *p = smc_parameters;
> + u32 shadow_smc_regs[5];
> +
> + ret = of_property_read_u32(np, "smc,cs" , &cs);
> + if (ret < 0) {
> + dev_err(dev, "missing mandatory property : smc,cs\n");
> + return ret;
> + }
> + if (val >= devtype->cs_count) {
> + dev_err(dev, "invalid value for property smc,cs (=%d)."
> + "Must be in range 0 to %d\n", cs, devtype->cs_count-1);
> + return -EINVAL;
> + }
> +
> + /* set the timing for EBI */
> + base += (0x10 * cs);
> + shadow_smc_regs[SETUP] = readl_relaxed(base + AT91_SMC_SETUP);
> + shadow_smc_regs[PULSE] = readl_relaxed(base + AT91_SMC_PULSE);
> + shadow_smc_regs[CYCLE] = readl_relaxed(base + AT91_SMC_CYCLE);
> + shadow_smc_regs[MODE] = readl_relaxed(base + AT91_SMC_MODE);
> +
> + while (p->name) {
> + ret = of_property_read_u32(np, p->name , &val);
> + if (ret == -EINVAL) {
> + dev_dbg(dev, "cs %d: property %s not set.\n", cs,
> + p->name);
> + p++;
> + continue;
> + } else if (ret) {
> + dev_err(dev, "cs %d: can't get property %s.\n", cs,
> + p->name);
> + return ret;
> + }
> + if (val >= (1<<p->width)) {
> + dev_err(dev, "cs %d: property %s out of range.\n", cs,
> + p->name);
> + return -ERANGE;
> + }
> + shadow_smc_regs[p->reg] &= ~(((1<<p->width)-1) << p->shift);
> + shadow_smc_regs[p->reg] |= (val << p->shift);
> + p++;
> + }
> + writel_relaxed(shadow_smc_regs[SETUP], base + AT91_SMC_SETUP);
> + writel_relaxed(shadow_smc_regs[PULSE], base + AT91_SMC_PULSE);
> + writel_relaxed(shadow_smc_regs[CYCLE], base + AT91_SMC_CYCLE);
> + writel_relaxed(shadow_smc_regs[MODE], base + AT91_SMC_MODE);
> + return 0;
> +}
I think we should consider defining timings in nanoseconds instead of
clk (actually master clk) cycles, because if we ever support master clk
rate change (I hope so :)), then we won't be able to recalculate the
appropriate timings (in cycles).
Moreover this ease dt writer's work.
tcycle calulation :
mck_rate = clk_get_rate(mck);
tcycle = (tns * 10^9) / mck_rate;
dt binding:
smc at xxx {
clocks = <&mck>;
dev at zz {
smc,ncs_read_setup = <y>; /* in nsecs */
...
};
}
And what about defining a mechanism capable of handling several
converter types (not just the generic one you described with the
ncs, nrd, ... timings) ?
For example NAND chip vendors use a common timing naming convention
(tCLS, tCS, ...), and this is sometime annoying (and error-prone) to
convert these timings into the SMC model.
It would be great if we could define specific converters for these
standardized protocols (NAND, NOR, ???).
dt binding example:
smc at xxx {
clocks = <&mck>;
...
dev at cs,offset {
compatible = "atmel,at91-smc-generic-converter";
smc,ncs_read_setup = <y>; /* in nsecs */
...
};
nand at cs,offset {
compatible = "atmel,at91-smc-nand-converter";
nand-chip {
/* see atmel-nand dt binding */
timings {
tCLS = <..>;
...
};
/*
* these timings are contained by the nand-chip
* node because they describe the NAND timings
* (as defined in many nand datasheets).
*/
};
};
}
These are just some thoughts, feel free to argue ;).
Best Regards,
Boris
> +
> +static int __init smc_parse_dt(struct platform_device *pdev,
> + void __iomem *base)
> +{
> + struct device *dev = &pdev->dev;
> + const struct of_device_id *of_id = of_match_device(smc_id_table, dev);
> + const struct at91_smc_devtype *devtype = of_id->data;
> + struct device_node *child;
> + int ret;
> +
> + for_each_child_of_node(dev->of_node, child) {
> + if (!child->name)
> + continue;
> +
> + ret = smc_timing_setup(dev, child, base, devtype);
> + if (ret) {
> + dev_err(dev, "%s set timing failed.\n",
> + child->full_name);
> + return ret;
> + }
> + }
> +
> + ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
> + if (ret)
> + dev_err(dev, "%s fail to create devices.\n",
> + dev->of_node->full_name);
> + return ret;
> +}
> +
> +static int __init smc_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + void __iomem *base;
> + int ret;
> +
> + /* get the resource */
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = devm_request_and_ioremap(&pdev->dev, res);
> + if (IS_ERR(base)) {
> + dev_err(&pdev->dev, "can't map SMC base address\n");
> + return PTR_ERR(base);
> + }
> +
> + /* parse the device node */
> + ret = smc_parse_dt(pdev, base);
> + if (!ret)
> + dev_info(&pdev->dev, "Driver registered.\n");
> +
> + return ret;
> +}
> +
> +static struct platform_driver smc_driver = {
> + .driver = {
> + .name = "atmel-smc",
> + .owner = THIS_MODULE,
> + .of_match_table = smc_id_table,
> + },
> +};
> +module_platform_driver_probe(smc_driver, smc_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's SMC/EBI driver");
> +MODULE_LICENSE("GPL");
>
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 3/6] At91: dt: Added smc bus driver
2014-01-03 0:24 ` boris brezillon
@ 2014-01-03 9:42 ` Jean-Jacques Hiblot
2014-01-03 10:19 ` boris brezillon
0 siblings, 1 reply; 18+ messages in thread
From: Jean-Jacques Hiblot @ 2014-01-03 9:42 UTC (permalink / raw)
To: linux-arm-kernel
2014/1/3 boris brezillon <b.brezillon@overkiz.com>:
> On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
>>
>> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>>
>> The EBI/SMC external interface is used to access external peripherals
>> (NAND
>> and Ethernet controller in the case of sam9261ek). Different
>> configurations and
>> timings are required for those peripherals. This bus driver can be used
>> to
>> setup the bus timings/configuration from the device tree.
>>
>> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>> ---
>> drivers/bus/Kconfig | 9 +++
>> drivers/bus/Makefile | 1 +
>> drivers/bus/atmel-smc.c | 182
>> ++++++++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 192 insertions(+)
>> create mode 100644 drivers/bus/atmel-smc.c
>>
>> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
>> index 552373c..8c944db5 100644
>> --- a/drivers/bus/Kconfig
>> +++ b/drivers/bus/Kconfig
>> @@ -12,6 +12,15 @@ config IMX_WEIM
>> The WEIM(Wireless External Interface Module) works like a bus.
>> You can attach many different devices on it, such as NOR,
>> onenand.
>>
>> +config ATMEL_SMC
>> + bool "Atmel SMC/EBI driver"
>> + depends on SOC_AT91SAM9 && OF
>> + help
>> + Driver for Atmel SMC/EBI controller.
>> + Used to configure the EBI (external bus interface) when the
>> device-
>> + tree is used. This bus supports NANDs, external ethernet
>> controller,
>> + SRAMs, ATA devices.
>> +
>> config MVEBU_MBUS
>> bool
>> depends on PLAT_ORION
>> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
>> index 8947bdd..4364003 100644
>> --- a/drivers/bus/Makefile
>> +++ b/drivers/bus/Makefile
>> @@ -2,6 +2,7 @@
>> # Makefile for the bus drivers.
>> #
>>
>> +obj-$(CONFIG_ATMEL_SMC) += atmel-smc.o
>> obj-$(CONFIG_IMX_WEIM) += imx-weim.o
>> obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
>> obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
>> diff --git a/drivers/bus/atmel-smc.c b/drivers/bus/atmel-smc.c
>> new file mode 100644
>> index 0000000..06e530d
>> --- /dev/null
>> +++ b/drivers/bus/atmel-smc.c
>> @@ -0,0 +1,182 @@
>> +/*
>> + * EBI driver for Atmel SAM9 chips
>> + * inspired by the fsl weim bus driver
>> + *
>> + * Copyright (C) 2013 JJ Hiblot.
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + */
>> +#include <linux/module.h>
>> +#include <linux/clk.h>
>> +#include <linux/io.h>
>> +#include <linux/of_device.h>
>> +#include <mach/at91sam9_smc.h>
>> +
>> +struct at91_smc_devtype {
>> + unsigned int cs_count;
>> +};
>> +
>> +static const struct at91_smc_devtype sam9261_smc_devtype = {
>> + .cs_count = 6,
>> +};
>> +
>> +static const struct of_device_id smc_id_table[] = {
>> + { .compatible = "atmel,at91sam9261-smc", .data =
>> &sam9261_smc_devtype},
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, smc_id_table);
>> +
>> +struct smc_parameters_type {
>> + const char *name;
>> + u16 reg;
>> + u16 width;
>> + u16 shift;
>> +};
>> +
>> +#define SETUP 0
>> +#define PULSE 1
>> +#define CYCLE 2
>> +#define MODE 3
>> +static const struct smc_parameters_type smc_parameters[] = {
>> + {"smc,ncs_read_setup", SETUP, 6, 24},
>> + {"smc,nrd_setup", SETUP, 6, 16},
>> + {"smc,ncs_write_setup", SETUP, 6, 8},
>> + {"smc,nwe_setup", SETUP, 6, 0},
>> + {"smc,ncs_read_pulse", PULSE, 6, 24},
>> + {"smc,nrd_pulse", PULSE, 6, 16},
>> + {"smc,ncs_write_pulse", PULSE, 6, 8},
>> + {"smc,nwe_pulse", PULSE, 6, 0},
>> + {"smc,read_cycle", CYCLE, 9, 16},
>> + {"smc,write_cycle", CYCLE, 9, 0},
>> + {"smc,burst_size", MODE, 2, 28},
>> + {"smc,burst_enabled", MODE, 1, 24},
>> + {"smc,tdf_mode", MODE, 1, 20},
>> + {"smc,tdf_cycles", MODE, 4, 16},
>> + {"smc,bus_width", MODE, 2, 12},
>> + {"smc,byte_access_type", MODE, 1, 8},
>> + {"smc,nwait_mode", MODE, 2, 4},
>> + {"smc,write_mode", MODE, 1, 0},
>> + {"smc,read_mode", MODE, 1, 1},
>> + {NULL}
>> +};
>> +
>> +/* Parse and set the timing for this device. */
>> +static int __init smc_timing_setup(struct device *dev, struct device_node
>> *np,
>> + void __iomem *base, const struct at91_smc_devtype
>> *devtype)
>> +{
>> + u32 val;
>> + int ret;
>> + u32 cs;
>> + const struct smc_parameters_type *p = smc_parameters;
>> + u32 shadow_smc_regs[5];
>> +
>> + ret = of_property_read_u32(np, "smc,cs" , &cs);
>> + if (ret < 0) {
>> + dev_err(dev, "missing mandatory property : smc,cs\n");
>> + return ret;
>> + }
>> + if (val >= devtype->cs_count) {
>> + dev_err(dev, "invalid value for property smc,cs (=%d)."
>> + "Must be in range 0 to %d\n", cs, devtype->cs_count-1);
>> + return -EINVAL;
>> + }
>> +
>> + /* set the timing for EBI */
>> + base += (0x10 * cs);
>> + shadow_smc_regs[SETUP] = readl_relaxed(base + AT91_SMC_SETUP);
>> + shadow_smc_regs[PULSE] = readl_relaxed(base + AT91_SMC_PULSE);
>> + shadow_smc_regs[CYCLE] = readl_relaxed(base + AT91_SMC_CYCLE);
>> + shadow_smc_regs[MODE] = readl_relaxed(base + AT91_SMC_MODE);
>> +
>> + while (p->name) {
>> + ret = of_property_read_u32(np, p->name , &val);
>> + if (ret == -EINVAL) {
>> + dev_dbg(dev, "cs %d: property %s not set.\n", cs,
>> + p->name);
>> + p++;
>> + continue;
>> + } else if (ret) {
>> + dev_err(dev, "cs %d: can't get property %s.\n",
>> cs,
>> + p->name);
>> + return ret;
>> + }
>> + if (val >= (1<<p->width)) {
>> + dev_err(dev, "cs %d: property %s out of range.\n",
>> cs,
>> + p->name);
>> + return -ERANGE;
>> + }
>> + shadow_smc_regs[p->reg] &= ~(((1<<p->width)-1) <<
>> p->shift);
>> + shadow_smc_regs[p->reg] |= (val << p->shift);
>> + p++;
>> + }
>> + writel_relaxed(shadow_smc_regs[SETUP], base + AT91_SMC_SETUP);
>> + writel_relaxed(shadow_smc_regs[PULSE], base + AT91_SMC_PULSE);
>> + writel_relaxed(shadow_smc_regs[CYCLE], base + AT91_SMC_CYCLE);
>> + writel_relaxed(shadow_smc_regs[MODE], base + AT91_SMC_MODE);
>> + return 0;
>> +}
>
>
> I think we should consider defining timings in nanoseconds instead of
> clk (actually master clk) cycles, because if we ever support master clk
> rate change (I hope so :)), then we won't be able to recalculate the
> appropriate timings (in cycles).
> Moreover this ease dt writer's work.
>
> tcycle calulation :
> mck_rate = clk_get_rate(mck);
> tcycle = (tns * 10^9) / mck_rate;
>
> dt binding:
>
> smc at xxx {
> clocks = <&mck>;
> dev at zz {
> smc,ncs_read_setup = <y>; /* in nsecs */
> ...
> };
> }
>
This is indeed something that could be done easily.
However I did this a few years ago for the EBI (and for another OS,
not linux) and it turned out to be not so magical. There were a lot of
side effects because most of the times the timings are defined (or at
least amended) empirically. There are also some cases when it's
easier to have the value in clock cycle (FPGA with synchronous IF)
I would be interested in the opinion of Nicolas in this matter.
>
> And what about defining a mechanism capable of handling several
> converter types (not just the generic one you described with the
> ncs, nrd, ... timings) ?
> For example NAND chip vendors use a common timing naming convention (tCLS,
> tCS, ...), and this is sometime annoying (and error-prone) to
> convert these timings into the SMC model.
>
> It would be great if we could define specific converters for these
> standardized protocols (NAND, NOR, ???).
>
> dt binding example:
>
> smc at xxx {
> clocks = <&mck>;
> ...
> dev at cs,offset {
> compatible = "atmel,at91-smc-generic-converter";
> smc,ncs_read_setup = <y>; /* in nsecs */
> ...
> };
>
> nand at cs,offset {
> compatible = "atmel,at91-smc-nand-converter";
> nand-chip {
> /* see atmel-nand dt binding */
> timings {
> tCLS = <..>;
> ...
> };
> /*
> * these timings are contained by the nand-chip
> * node because they describe the NAND timings
> * (as defined in many nand datasheets).
> */
> };
> };
> }
>
>
> These are just some thoughts, feel free to argue ;).
The idea is appealing. It could be done for NAND but I wonder if it
makes sense for the rest of the devices.
>
> Best Regards,
>
> Boris
>
>
>> +
>> +static int __init smc_parse_dt(struct platform_device *pdev,
>> + void __iomem *base)
>> +{
>> + struct device *dev = &pdev->dev;
>> + const struct of_device_id *of_id = of_match_device(smc_id_table,
>> dev);
>> + const struct at91_smc_devtype *devtype = of_id->data;
>> + struct device_node *child;
>> + int ret;
>> +
>> + for_each_child_of_node(dev->of_node, child) {
>> + if (!child->name)
>> + continue;
>> +
>> + ret = smc_timing_setup(dev, child, base, devtype);
>> + if (ret) {
>> + dev_err(dev, "%s set timing failed.\n",
>> + child->full_name);
>> + return ret;
>> + }
>> + }
>> +
>> + ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
>> + if (ret)
>> + dev_err(dev, "%s fail to create devices.\n",
>> + dev->of_node->full_name);
>> + return ret;
>> +}
>> +
>> +static int __init smc_probe(struct platform_device *pdev)
>> +{
>> + struct resource *res;
>> + void __iomem *base;
>> + int ret;
>> +
>> + /* get the resource */
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + base = devm_request_and_ioremap(&pdev->dev, res);
>> + if (IS_ERR(base)) {
>> + dev_err(&pdev->dev, "can't map SMC base address\n");
>> + return PTR_ERR(base);
>> + }
>> +
>> + /* parse the device node */
>> + ret = smc_parse_dt(pdev, base);
>> + if (!ret)
>> + dev_info(&pdev->dev, "Driver registered.\n");
>> +
>> + return ret;
>> +}
>> +
>> +static struct platform_driver smc_driver = {
>> + .driver = {
>> + .name = "atmel-smc",
>> + .owner = THIS_MODULE,
>> + .of_match_table = smc_id_table,
>> + },
>> +};
>> +module_platform_driver_probe(smc_driver, smc_probe);
>> +
>> +MODULE_AUTHOR("JJ Hiblot");
>> +MODULE_DESCRIPTION("Atmel's SMC/EBI driver");
>> +MODULE_LICENSE("GPL");
>>
>
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 3/6] At91: dt: Added smc bus driver
2014-01-03 9:42 ` Jean-Jacques Hiblot
@ 2014-01-03 10:19 ` boris brezillon
0 siblings, 0 replies; 18+ messages in thread
From: boris brezillon @ 2014-01-03 10:19 UTC (permalink / raw)
To: linux-arm-kernel
On 03/01/2014 10:42, Jean-Jacques Hiblot wrote:
> 2014/1/3 boris brezillon <b.brezillon@overkiz.com>:
>> On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
>>> From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
>>>
>>> The EBI/SMC external interface is used to access external peripherals
>>> (NAND
>>> and Ethernet controller in the case of sam9261ek). Different
>>> configurations and
>>> timings are required for those peripherals. This bus driver can be used
>>> to
>>> setup the bus timings/configuration from the device tree.
>>>
>>> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>>> ---
>>> drivers/bus/Kconfig | 9 +++
>>> drivers/bus/Makefile | 1 +
>>> drivers/bus/atmel-smc.c | 182
>>> ++++++++++++++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 192 insertions(+)
>>> create mode 100644 drivers/bus/atmel-smc.c
>>>
>>> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
>>> index 552373c..8c944db5 100644
>>> --- a/drivers/bus/Kconfig
>>> +++ b/drivers/bus/Kconfig
>>> @@ -12,6 +12,15 @@ config IMX_WEIM
>>> The WEIM(Wireless External Interface Module) works like a bus.
>>> You can attach many different devices on it, such as NOR,
>>> onenand.
>>>
>>> +config ATMEL_SMC
>>> + bool "Atmel SMC/EBI driver"
>>> + depends on SOC_AT91SAM9 && OF
>>> + help
>>> + Driver for Atmel SMC/EBI controller.
>>> + Used to configure the EBI (external bus interface) when the
>>> device-
>>> + tree is used. This bus supports NANDs, external ethernet
>>> controller,
>>> + SRAMs, ATA devices.
>>> +
>>> config MVEBU_MBUS
>>> bool
>>> depends on PLAT_ORION
>>> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
>>> index 8947bdd..4364003 100644
>>> --- a/drivers/bus/Makefile
>>> +++ b/drivers/bus/Makefile
>>> @@ -2,6 +2,7 @@
>>> # Makefile for the bus drivers.
>>> #
>>>
>>> +obj-$(CONFIG_ATMEL_SMC) += atmel-smc.o
>>> obj-$(CONFIG_IMX_WEIM) += imx-weim.o
>>> obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
>>> obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
>>> diff --git a/drivers/bus/atmel-smc.c b/drivers/bus/atmel-smc.c
>>> new file mode 100644
>>> index 0000000..06e530d
>>> --- /dev/null
>>> +++ b/drivers/bus/atmel-smc.c
>>> @@ -0,0 +1,182 @@
>>> +/*
>>> + * EBI driver for Atmel SAM9 chips
>>> + * inspired by the fsl weim bus driver
>>> + *
>>> + * Copyright (C) 2013 JJ Hiblot.
>>> + *
>>> + * This file is licensed under the terms of the GNU General Public
>>> + * License version 2. This program is licensed "as is" without any
>>> + * warranty of any kind, whether express or implied.
>>> + */
>>> +#include <linux/module.h>
>>> +#include <linux/clk.h>
>>> +#include <linux/io.h>
>>> +#include <linux/of_device.h>
>>> +#include <mach/at91sam9_smc.h>
>>> +
>>> +struct at91_smc_devtype {
>>> + unsigned int cs_count;
>>> +};
>>> +
>>> +static const struct at91_smc_devtype sam9261_smc_devtype = {
>>> + .cs_count = 6,
>>> +};
>>> +
>>> +static const struct of_device_id smc_id_table[] = {
>>> + { .compatible = "atmel,at91sam9261-smc", .data =
>>> &sam9261_smc_devtype},
>>> + { }
>>> +};
>>> +MODULE_DEVICE_TABLE(of, smc_id_table);
>>> +
>>> +struct smc_parameters_type {
>>> + const char *name;
>>> + u16 reg;
>>> + u16 width;
>>> + u16 shift;
>>> +};
>>> +
>>> +#define SETUP 0
>>> +#define PULSE 1
>>> +#define CYCLE 2
>>> +#define MODE 3
>>> +static const struct smc_parameters_type smc_parameters[] = {
>>> + {"smc,ncs_read_setup", SETUP, 6, 24},
>>> + {"smc,nrd_setup", SETUP, 6, 16},
>>> + {"smc,ncs_write_setup", SETUP, 6, 8},
>>> + {"smc,nwe_setup", SETUP, 6, 0},
>>> + {"smc,ncs_read_pulse", PULSE, 6, 24},
>>> + {"smc,nrd_pulse", PULSE, 6, 16},
>>> + {"smc,ncs_write_pulse", PULSE, 6, 8},
>>> + {"smc,nwe_pulse", PULSE, 6, 0},
>>> + {"smc,read_cycle", CYCLE, 9, 16},
>>> + {"smc,write_cycle", CYCLE, 9, 0},
>>> + {"smc,burst_size", MODE, 2, 28},
>>> + {"smc,burst_enabled", MODE, 1, 24},
>>> + {"smc,tdf_mode", MODE, 1, 20},
>>> + {"smc,tdf_cycles", MODE, 4, 16},
>>> + {"smc,bus_width", MODE, 2, 12},
>>> + {"smc,byte_access_type", MODE, 1, 8},
>>> + {"smc,nwait_mode", MODE, 2, 4},
>>> + {"smc,write_mode", MODE, 1, 0},
>>> + {"smc,read_mode", MODE, 1, 1},
>>> + {NULL}
>>> +};
>>> +
>>> +/* Parse and set the timing for this device. */
>>> +static int __init smc_timing_setup(struct device *dev, struct device_node
>>> *np,
>>> + void __iomem *base, const struct at91_smc_devtype
>>> *devtype)
>>> +{
>>> + u32 val;
>>> + int ret;
>>> + u32 cs;
>>> + const struct smc_parameters_type *p = smc_parameters;
>>> + u32 shadow_smc_regs[5];
>>> +
>>> + ret = of_property_read_u32(np, "smc,cs" , &cs);
>>> + if (ret < 0) {
>>> + dev_err(dev, "missing mandatory property : smc,cs\n");
>>> + return ret;
>>> + }
>>> + if (val >= devtype->cs_count) {
>>> + dev_err(dev, "invalid value for property smc,cs (=%d)."
>>> + "Must be in range 0 to %d\n", cs, devtype->cs_count-1);
>>> + return -EINVAL;
>>> + }
>>> +
>>> + /* set the timing for EBI */
>>> + base += (0x10 * cs);
>>> + shadow_smc_regs[SETUP] = readl_relaxed(base + AT91_SMC_SETUP);
>>> + shadow_smc_regs[PULSE] = readl_relaxed(base + AT91_SMC_PULSE);
>>> + shadow_smc_regs[CYCLE] = readl_relaxed(base + AT91_SMC_CYCLE);
>>> + shadow_smc_regs[MODE] = readl_relaxed(base + AT91_SMC_MODE);
>>> +
>>> + while (p->name) {
>>> + ret = of_property_read_u32(np, p->name , &val);
>>> + if (ret == -EINVAL) {
>>> + dev_dbg(dev, "cs %d: property %s not set.\n", cs,
>>> + p->name);
>>> + p++;
>>> + continue;
>>> + } else if (ret) {
>>> + dev_err(dev, "cs %d: can't get property %s.\n",
>>> cs,
>>> + p->name);
>>> + return ret;
>>> + }
>>> + if (val >= (1<<p->width)) {
>>> + dev_err(dev, "cs %d: property %s out of range.\n",
>>> cs,
>>> + p->name);
>>> + return -ERANGE;
>>> + }
>>> + shadow_smc_regs[p->reg] &= ~(((1<<p->width)-1) <<
>>> p->shift);
>>> + shadow_smc_regs[p->reg] |= (val << p->shift);
>>> + p++;
>>> + }
>>> + writel_relaxed(shadow_smc_regs[SETUP], base + AT91_SMC_SETUP);
>>> + writel_relaxed(shadow_smc_regs[PULSE], base + AT91_SMC_PULSE);
>>> + writel_relaxed(shadow_smc_regs[CYCLE], base + AT91_SMC_CYCLE);
>>> + writel_relaxed(shadow_smc_regs[MODE], base + AT91_SMC_MODE);
>>> + return 0;
>>> +}
>>
>> I think we should consider defining timings in nanoseconds instead of
>> clk (actually master clk) cycles, because if we ever support master clk
>> rate change (I hope so :)), then we won't be able to recalculate the
>> appropriate timings (in cycles).
>> Moreover this ease dt writer's work.
>>
>> tcycle calulation :
>> mck_rate = clk_get_rate(mck);
>> tcycle = (tns * 10^9) / mck_rate;
>>
>> dt binding:
>>
>> smc at xxx {
>> clocks = <&mck>;
>> dev at zz {
>> smc,ncs_read_setup = <y>; /* in nsecs */
>> ...
>> };
>> }
>>
> This is indeed something that could be done easily.
> However I did this a few years ago for the EBI (and for another OS,
> not linux) and it turned out to be not so magical. There were a lot of
> side effects because most of the times the timings are defined (or at
> least amended) empirically. There are also some cases when it's
> easier to have the value in clock cycle (FPGA with synchronous IF)
> I would be interested in the opinion of Nicolas in this matter.
>
>> And what about defining a mechanism capable of handling several
>> converter types (not just the generic one you described with the
>> ncs, nrd, ... timings) ?
>> For example NAND chip vendors use a common timing naming convention (tCLS,
>> tCS, ...), and this is sometime annoying (and error-prone) to
>> convert these timings into the SMC model.
>>
>> It would be great if we could define specific converters for these
>> standardized protocols (NAND, NOR, ???).
>>
>> dt binding example:
>>
>> smc at xxx {
>> clocks = <&mck>;
>> ...
>> dev at cs,offset {
>> compatible = "atmel,at91-smc-generic-converter";
>> smc,ncs_read_setup = <y>; /* in nsecs */
>> ...
>> };
>>
>> nand at cs,offset {
>> compatible = "atmel,at91-smc-nand-converter";
>> nand-chip {
>> /* see atmel-nand dt binding */
>> timings {
>> tCLS = <..>;
>> ...
>> };
>> /*
>> * these timings are contained by the nand-chip
>> * node because they describe the NAND timings
>> * (as defined in many nand datasheets).
>> */
>> };
>> };
>> }
>>
>>
>> These are just some thoughts, feel free to argue ;).
> The idea is appealing. It could be done for NAND but I wonder if it
> makes sense for the rest of the devices.
NOR flashes seems to have a standard naming convention too...
Anyway, I think you should first implement the mechanism to support several
converters and the generic converter.
This way we can have a working version of the SMC driver and we'll be
able to
add new converters later.
>> Best Regards,
>>
>> Boris
>>
>>
>>> +
>>> +static int __init smc_parse_dt(struct platform_device *pdev,
>>> + void __iomem *base)
>>> +{
>>> + struct device *dev = &pdev->dev;
>>> + const struct of_device_id *of_id = of_match_device(smc_id_table,
>>> dev);
>>> + const struct at91_smc_devtype *devtype = of_id->data;
>>> + struct device_node *child;
>>> + int ret;
>>> +
>>> + for_each_child_of_node(dev->of_node, child) {
>>> + if (!child->name)
>>> + continue;
>>> +
>>> + ret = smc_timing_setup(dev, child, base, devtype);
>>> + if (ret) {
>>> + dev_err(dev, "%s set timing failed.\n",
>>> + child->full_name);
>>> + return ret;
>>> + }
>>> + }
>>> +
>>> + ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
>>> + if (ret)
>>> + dev_err(dev, "%s fail to create devices.\n",
>>> + dev->of_node->full_name);
>>> + return ret;
>>> +}
>>> +
>>> +static int __init smc_probe(struct platform_device *pdev)
>>> +{
>>> + struct resource *res;
>>> + void __iomem *base;
>>> + int ret;
>>> +
>>> + /* get the resource */
>>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + base = devm_request_and_ioremap(&pdev->dev, res);
>>> + if (IS_ERR(base)) {
>>> + dev_err(&pdev->dev, "can't map SMC base address\n");
>>> + return PTR_ERR(base);
>>> + }
>>> +
>>> + /* parse the device node */
>>> + ret = smc_parse_dt(pdev, base);
>>> + if (!ret)
>>> + dev_info(&pdev->dev, "Driver registered.\n");
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static struct platform_driver smc_driver = {
>>> + .driver = {
>>> + .name = "atmel-smc",
>>> + .owner = THIS_MODULE,
>>> + .of_match_table = smc_id_table,
>>> + },
>>> +};
>>> +module_platform_driver_probe(smc_driver, smc_probe);
>>> +
>>> +MODULE_AUTHOR("JJ Hiblot");
>>> +MODULE_DESCRIPTION("Atmel's SMC/EBI driver");
>>> +MODULE_LICENSE("GPL");
>>>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 4/6] at91: dt: sam9261: Pinmux DT entries for the SMC/EBI interface
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
` (2 preceding siblings ...)
2013-12-31 16:32 ` [PATCH 3/6] At91: dt: Added smc bus driver jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 5/6] at91: dt: sam9261: Add an entry in the DT for the SMC/EBI bus driver jjhiblot at traphandler.com
` (2 subsequent siblings)
6 siblings, 0 replies; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 54 ++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 7ee0fff..925f9ad 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -317,6 +317,60 @@
>;
};
};
+ smc {
+ pinctrl_smc_nwait: smc_nwait-0 {
+ atmel,pins = <AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_a23_a25: smc_a23_a25-0 {
+ atmel,pins =
+ <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_d16_d31: smc_d16_d31-0 {
+ atmel,pins =
+ <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_ncs4: smc_ncs4-0 {
+ atmel,pins = <AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_ncs5: smc_ncs5-0 {
+ atmel,pins = <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_nandoe: smc_nandoe-0 {
+ atmel,pins = <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_ncs6: smc_ncs6-0 {
+ atmel,pins = <AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_nandwe: smc_nandwe-0 {
+ atmel,pins = <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_ncs7: smc_ncs7-0 {
+ atmel,pins = <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_cfce1: smc_cfce1-0 {
+ atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_smc_cfce2: smc_cfce2-0 {
+ atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
pioA: gpio at fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 5/6] at91: dt: sam9261: Add an entry in the DT for the SMC/EBI bus driver.
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
` (3 preceding siblings ...)
2013-12-31 16:32 ` [PATCH 4/6] at91: dt: sam9261: Pinmux DT entries for the SMC/EBI interface jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2013-12-31 16:32 ` [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree jjhiblot at traphandler.com
2013-12-31 17:48 ` [PATCH 0/6] Device Tree support for the at91sam9261ek boris brezillon
6 siblings, 0 replies; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
This patch creates a new entry in the device tree for the 9261 under which
should be the devices attached to the EBI.
It also moves the NAND DT entries under this new bus.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261.dtsi | 32 +++++++++++++++++---------
arch/arm/boot/dts/at91sam9261ek.dts | 46 ++++++++++++++++++++++++++++---------
2 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 925f9ad..acd19b4 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -525,21 +525,31 @@
status = "disabled";
};
- nand0: nand at 40000000 {
- compatible = "atmel,at91rm9200-nand";
+ smc: smc at ffffec00 {
#address-cells = <1>;
#size-cells = <1>;
- reg = <0x40000000 0x10000000>;
- atmel,nand-addr-offset = <22>;
- atmel,nand-cmd-offset = <21>;
+ compatible = "atmel,at91sam9261-smc";
+ reg = <0xffffec00 0x80>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_nand>;
-
- gpios = <&pioC 15 GPIO_ACTIVE_HIGH
- &pioC 14 GPIO_ACTIVE_HIGH
- 0
- >;
status = "disabled";
+ ranges = < >;
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000>;
+ atmel,nand-addr-offset = <22>;
+ atmel,nand-cmd-offset = <21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>, <&pinctrl_smc_nandoe>, <&pinctrl_smc_nandwe>;
+ smc,cs = <3>;
+
+ gpios = <&pioC 15 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
};
usb0: ohci at 00500000 {
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 03c05fc..11cf619 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -42,17 +42,6 @@
};
};
- nand0: nand at 40000000 {
- nand-bus-width = <8>;
- nand-ecc-mode = "soft";
- nand-on-flash-bbt = <1>;
- status = "okay";
- at91bootstrap at 0 {
- label = "at91bootstrap";
- reg = <0x0 0x20000>;
- };
- };
-
fb0: fb at 0x00600000 {
display = <&display0>;
status = "okay";
@@ -83,6 +72,41 @@
};
};
};
+
+ smc: smc at ffffec00 {
+ status = "okay";
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt = <1>;
+ status = "okay";
+
+ smc,ncs_read_setup = <0>;
+ smc,nrd_setup = <1>;
+ smc,ncs_write_setup = <0>;
+ smc,nwe_setup = <1>;
+ smc,ncs_read_pulse = <3>;
+ smc,nrd_pulse = <3>;
+ smc,ncs_write_pulse = <3>;
+ smc,nwe_pulse = <3>;
+ smc,read_cycle = <5>;
+ smc,write_cycle = <5>;
+ smc,tdf_cycles = <2>;
+ smc,tdf_optimized = <0>;
+ smc,page_size = <0>;
+ smc,byte_access_type = <0>;
+ smc,bus_width = <0>;
+ smc,nwait_mode = <0>;
+ smc,read_mode = <1>;
+ smc,write_mode = <1>;
+
+ at91bootstrap at 0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x20000>;
+ };
+ };
+ };
};
leds {
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
` (4 preceding siblings ...)
2013-12-31 16:32 ` [PATCH 5/6] at91: dt: sam9261: Add an entry in the DT for the SMC/EBI bus driver jjhiblot at traphandler.com
@ 2013-12-31 16:32 ` jjhiblot at traphandler.com
2013-12-31 19:19 ` Arnd Bergmann
2013-12-31 17:48 ` [PATCH 0/6] Device Tree support for the at91sam9261ek boris brezillon
6 siblings, 1 reply; 18+ messages in thread
From: jjhiblot at traphandler.com @ 2013-12-31 16:32 UTC (permalink / raw)
To: linux-arm-kernel
From: jean-jacques hiblot <jean-jacques.hiblot@jdsu.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
---
arch/arm/boot/dts/at91sam9261ek.dts | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 11cf619..7a7997f 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -76,6 +76,35 @@
smc: smc at ffffec00 {
status = "okay";
+ ethernet at 30000000 {
+ compatible = "davicom,dm9000";
+ reg = <0x30000000 0x2 0x30000004 0x2>;
+ interrupt-parent = <&pioC>;
+ interrupts = <11 IRQ_TYPE_EDGE_BOTH>;
+ local-mac-address = [00 00 de ad be ef];
+ davicom,no-eeprom;
+
+ smc,cs = <2>;
+ smc,ncs_read_setup = <0>;
+ smc,nrd_setup = <2>;
+ smc,ncs_write_setup = <0>;
+ smc,nwe_setup = <2>;
+ smc,ncs_read_pulse = <8>;
+ smc,nrd_pulse = <4>;
+ smc,ncs_write_pulse = <8>;
+ smc,nwe_pulse = <4>;
+ smc,read_cycle = <16>;
+ smc,write_cycle = <16>;
+ smc,tdf_cycles = <1>;
+ smc,tdf_optimized = <0>;
+ smc,page_size = <0>;
+ smc,byte_access_type = <1>;
+ smc,bus_width = <1>;
+ smc,nwait_mode = <0>;
+ smc,read_mode = <1>;
+ smc,write_mode = <1>;
+ };
+
nand0: nand at 40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
--
1.8.4.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree
2013-12-31 16:32 ` [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree jjhiblot at traphandler.com
@ 2013-12-31 19:19 ` Arnd Bergmann
2014-01-02 19:31 ` Jean-Jacques Hiblot
0 siblings, 1 reply; 18+ messages in thread
From: Arnd Bergmann @ 2013-12-31 19:19 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 31 December 2013 17:32:14 jjhiblot at traphandler.com wrote:
>
> + ethernet at 30000000 {
> + compatible = "davicom,dm9000";
> + reg = <0x30000000 0x2 0x30000004 0x2>;
> + interrupt-parent = <&pioC>;
> + interrupts = <11 IRQ_TYPE_EDGE_BOTH>;
> + local-mac-address = [00 00 de ad be ef];
> + davicom,no-eeprom;
> +
> + smc,cs = <2>;
> + smc,ncs_read_setup = <0>;
> + smc,nrd_setup = <2>;
> + smc,ncs_write_setup = <0>;
> + smc,nwe_setup = <2>;
> + smc,ncs_read_pulse = <8>;
> + smc,nrd_pulse = <4>;
> + smc,ncs_write_pulse = <8>;
> + smc,nwe_pulse = <4>;
> + smc,read_cycle = <16>;
> + smc,write_cycle = <16>;
> + smc,tdf_cycles = <1>;
> + smc,tdf_optimized = <0>;
> + smc,page_size = <0>;
> + smc,byte_access_type = <1>;
> + smc,bus_width = <1>;
> + smc,nwait_mode = <0>;
> + smc,read_mode = <1>;
> + smc,write_mode = <1>;
> + };
I don't like how this forces you to mix the properties
of the ethernet device with the properties of the smc
port. I would also like to see the address translation
reflected in the DT nodes. This should probably just work
out if you restructure the DT representation, and won't need
changes in the driver.
How about this:
smc: smc at ffffec00 {
#address-cells = <2>; /* cs, address */
#size-cells = <1>;
ranges = <2 0 0x30000000 0x10000000>
<3 0 0x40000000 0x10000000>;
extbus at 2.0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 2 0 0x10000000>;
smc,ncs_read_setup = <0>;
smc,nrd_setup = <2>;
smc,...
ethernet at 0 {
compatible = "davicom,dm9000";
reg = <0x0 0x2> <0x4 0x2>;
};
};
};
If each bus interface has a fixed range of registers, you can actually
collapse the upper two nodes again and just have one device per
chipselect.
Arnd
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree
2013-12-31 19:19 ` Arnd Bergmann
@ 2014-01-02 19:31 ` Jean-Jacques Hiblot
2014-01-02 20:00 ` Arnd Bergmann
0 siblings, 1 reply; 18+ messages in thread
From: Jean-Jacques Hiblot @ 2014-01-02 19:31 UTC (permalink / raw)
To: linux-arm-kernel
2013/12/31 Arnd Bergmann <arnd@arndb.de>:
> On Tuesday 31 December 2013 17:32:14 jjhiblot at traphandler.com wrote:
>>
>> + ethernet at 30000000 {
>> + compatible = "davicom,dm9000";
>> + reg = <0x30000000 0x2 0x30000004 0x2>;
>> + interrupt-parent = <&pioC>;
>> + interrupts = <11 IRQ_TYPE_EDGE_BOTH>;
>> + local-mac-address = [00 00 de ad be ef];
>> + davicom,no-eeprom;
>> +
>> + smc,cs = <2>;
>> + smc,ncs_read_setup = <0>;
>> + smc,nrd_setup = <2>;
>> + smc,ncs_write_setup = <0>;
>> + smc,nwe_setup = <2>;
>> + smc,ncs_read_pulse = <8>;
>> + smc,nrd_pulse = <4>;
>> + smc,ncs_write_pulse = <8>;
>> + smc,nwe_pulse = <4>;
>> + smc,read_cycle = <16>;
>> + smc,write_cycle = <16>;
>> + smc,tdf_cycles = <1>;
>> + smc,tdf_optimized = <0>;
>> + smc,page_size = <0>;
>> + smc,byte_access_type = <1>;
>> + smc,bus_width = <1>;
>> + smc,nwait_mode = <0>;
>> + smc,read_mode = <1>;
>> + smc,write_mode = <1>;
>> + };
>
> I don't like how this forces you to mix the properties
> of the ethernet device with the properties of the smc
> port. I would also like to see the address translation
> reflected in the DT nodes. This should probably just work
> out if you restructure the DT representation, and won't need
> changes in the driver.
>
> How about this:
>
> smc: smc at ffffec00 {
> #address-cells = <2>; /* cs, address */
> #size-cells = <1>;
> ranges = <2 0 0x30000000 0x10000000>
> <3 0 0x40000000 0x10000000>;
>
> extbus at 2.0 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 2 0 0x10000000>;
> smc,ncs_read_setup = <0>;
> smc,nrd_setup = <2>;
> smc,...
>
> ethernet at 0 {
> compatible = "davicom,dm9000";
> reg = <0x0 0x2> <0x4 0x2>;
> };
> };
> };
I'm okay with this. I'll do something along those lines in the next
round of the patch set.
>
> If each bus interface has a fixed range of registers, you can actually
> collapse the upper two nodes again and just have one device per
> chipselect.
This is indeed the case, but I'd rather keep the top node to highlight
the fact that all the devices are physically tied to the same bus.
Jean-Jacques
>
> Arnd
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree
2014-01-02 19:31 ` Jean-Jacques Hiblot
@ 2014-01-02 20:00 ` Arnd Bergmann
2014-01-06 18:13 ` Jean-Jacques Hiblot
0 siblings, 1 reply; 18+ messages in thread
From: Arnd Bergmann @ 2014-01-02 20:00 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 02 January 2014 20:31:00 Jean-Jacques Hiblot wrote:
> > If each bus interface has a fixed range of registers, you can actually
> > collapse the upper two nodes again and just have one device per
> > chipselect.
> This is indeed the case, but I'd rather keep the top node to highlight
> the fact that all the devices are physically tied to the same bus.
How about using a top-level "simple-bus" node with the complex ranges
property but making the driver match the sub-devices with the smaller
register range then?
Arnd
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree
2014-01-02 20:00 ` Arnd Bergmann
@ 2014-01-06 18:13 ` Jean-Jacques Hiblot
0 siblings, 0 replies; 18+ messages in thread
From: Jean-Jacques Hiblot @ 2014-01-06 18:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd,
sorry for the delay. I'll rework the driver to include some ideas
proposed by you and Boris. Boris proposed to have several timing
decoders (a generic one, one for NAND and so on). I plan to use the
compatibility name to select the decoder.and use the DT representation
you proposed last : one top "simple-bus" and one sub-node "atmel,smc"
per chip-select with one (or more) sub-device per chip-select.
Jean-Jacques
2014/1/2 Arnd Bergmann <arnd@arndb.de>:
> On Thursday 02 January 2014 20:31:00 Jean-Jacques Hiblot wrote:
>> > If each bus interface has a fixed range of registers, you can actually
>> > collapse the upper two nodes again and just have one device per
>> > chipselect.
>> This is indeed the case, but I'd rather keep the top node to highlight
>> the fact that all the devices are physically tied to the same bus.
>
> How about using a top-level "simple-bus" node with the complex ranges
> property but making the driver match the sub-devices with the smaller
> register range then?
>
> Arnd
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/6] Device Tree support for the at91sam9261ek
2013-12-31 16:32 [PATCH 0/6] Device Tree support for the at91sam9261ek jjhiblot at traphandler.com
` (5 preceding siblings ...)
2013-12-31 16:32 ` [PATCH 6/6] at91: dt: sam9261: Added DM9000 in the device tree jjhiblot at traphandler.com
@ 2013-12-31 17:48 ` boris brezillon
6 siblings, 0 replies; 18+ messages in thread
From: boris brezillon @ 2013-12-31 17:48 UTC (permalink / raw)
To: linux-arm-kernel
Hello Jean-Jacques
On 31/12/2013 17:32, jjhiblot at traphandler.com wrote:
> From: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
>
> Hi Nicolas,
>
> This patch set aims at bringing a basic device tree support for the sam9261.
> It's mostly based on the sam9263 stuff.
> The only new thing here is the smc bus driver. It's a very simple bus driver
> used to configure the EBI from the DT. I haven't documented its DT bindings yet
>
> supported features:
> * dbgu
> * nand
> * lcd
> * ethernet
> * leds
>
Cool, one step forward to the removal of at91 board files ;).
I'll try to review this series before the end of the week.
Best Regards,
Boris
> Jean-Jacques
>
> jean-jacques hiblot (6):
> Basic Device Tree support for the at91sam9261
> at91: dt: sam9261: Added support for the lcd display
> At91: dt: Added smc bus driver
> at91: dt: sam9261: Pinmux DT entries for the SMC/EBI interface
> at91: dt: sam9261: Add an entry in the DT for the SMC/EBI bus driver.
> at91: dt: sam9261: Added DM9000 in the device tree
>
> jean-jacques hiblot (6):
> Basic Device Tree support for the at91sam9261
> at91: dt: sam9261: Added support for the lcd display
> At91: dt: Added smc bus driver
> at91: dt: sam9261: Pinmux DT entries for the SMC/EBI interface
> at91: dt: sam9261: Add an entry in the DT for the SMC/EBI bus driver.
> at91: dt: sam9261: Added DM9000 in the device tree
>
> arch/arm/boot/dts/at91sam9261.dtsi | 575 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/at91sam9261ek.dts | 159 +++++++++
> arch/arm/mach-at91/at91sam9261.c | 16 +
> arch/arm/mach-at91/at91sam9261_devices.c | 18 +
> drivers/bus/Kconfig | 9 +
> drivers/bus/Makefile | 1 +
> drivers/bus/atmel-smc.c | 182 ++++++++++
> 7 files changed, 960 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
> create mode 100644 drivers/bus/atmel-smc.c
>
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