From mboxrd@z Thu Jan 1 00:00:00 1970 From: santosh.shilimkar@ti.com (Santosh Shilimkar) Date: Tue, 4 Feb 2014 17:15:39 -0500 Subject: [PATCH v4 1/3] clocksource: timer-keystone: introduce clocksource driver for Keystone In-Reply-To: References: <1391513453-21140-1-git-send-email-ivan.khoronzhuk@ti.com> <1391513453-21140-2-git-send-email-ivan.khoronzhuk@ti.com> <52F11B5C.40407@ti.com> Message-ID: <52F1668B.9040507@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tuesday 04 February 2014 03:17 PM, Thomas Gleixner wrote: > On Tue, 4 Feb 2014, Ivan Khoronzhuk wrote: > > Please do not top post. > >> It was so in v1. But it was decided to use explicit memory barriers, >> because we're always sure the memory barriers are there and that >> they're properly documented. Also in this case I don't need to add >> keystone readl/writel relaxed function variants and to use mixed calls of >> writel/writel_relaxed functions. >> >> See: >> http://www.spinics.net/lists/arm-kernel/msg294941.html > > Fair enough, but we want a proper explanation for explicit barriers in > the code and not in some random discussion of patch version X on some > random mailing list. > > Aside of that it should be iowmb(), but I might miss something ... > Agree. __iowmb() seems to be more appropriate. Regards, Santosh