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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/18] arm64: GICv3 device tree binding documentation
Date: Thu, 13 Feb 2014 12:59:46 +0000	[thread overview]
Message-ID: <52FCC1C2.1020203@arm.com> (raw)
In-Reply-To: <loom.20140207T062553-254@post.gmane.org>

Hi Arnab,

On 07/02/14 05:41, Arnab Basu wrote:
> Hi Marc
> 
> Marc Zyngier <marc.zyngier <at> arm.com> writes:
> 
>> +
>> +AArch64 SMP cores are often associated with a GICv3, providing private
>> +peripheral interrupts (PPI), shared peripheral interrupts (SPI),
>> +software generated interrupts (SGI), and locality-specific peripheral
>> +Interrupts (LPI).
>> +
>> +Main node required properties:
>> +
>> +- compatible : should at least contain  "arm,gic-v3".
>> +- interrupt-controller : Identifies the node as an interrupt controller
>> +- #interrupt-cells : Specifies the number of cells needed to encode an
>> +  interrupt source. Must be a single cell with a value of at least 3.
>> +
>> +  The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
>> +  interrupts. Other values are reserved for future use.
> 
> These values are defined in
> "include/dt-bindings/interrupt-controller/arm-gic.h" maybe we should start
> mentioning that here and encourage future device treese to use those defines
> to improve readability.

It may improve readability, but it makes the definition rely on
something else. Definition and usage are two different things, and I
want the definition to be completely self-contained and non ambiguous.

In DTS files, people can use whatever macro they decide, and it is their
problem. They will even have out of tree DTS files, for which the
include file is not available.

> 
>> +
>> +  The 2nd cell contains the interrupt number for the interrupt type.
>> +  SPI interrupts are in the range [0-987]. PPI interrupts are in the
>> +  range [0-15].
>> +
>> +  The 3rd cell is the flags, encoded as follows:
>> +	bits[3:0] trigger type and level flags.
>> +		1 = edge triggered
>> +		2 = edge triggered (deprecated, for compatibility with GICv2)
>> +		4 = level triggered
>> +		8 = level triggered (deprecated, for compatibility with GICv2)
> 
> Similar to the above comment
> "include/dt-bindings/interrupt-controller/irq.h" defines the trigger type
> and level flags. Although this file currently contains the GICv2 bindings,
> we could update them.

Same as above.

Thanks for the review!

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2014-02-13 12:59 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-05 13:30 [PATCH 00/18] arm64: GICv3 support Marc Zyngier
2014-02-05 13:30 ` [PATCH 01/18] arm64: initial support for GICv3 Marc Zyngier
2014-02-07  8:59   ` Arnab Basu
2014-02-07 13:52     ` Christopher Covington
2014-02-13 15:28     ` Marc Zyngier
2014-02-17  1:19   ` Christoffer Dall
2014-02-17 16:41     ` Marc Zyngier
2014-02-17 18:10       ` Christoffer Dall
2014-02-25 18:06   ` Will Deacon
2014-02-26 12:53     ` Marc Zyngier
2014-02-27 12:07       ` Will Deacon
2014-03-15 15:22         ` Radha Mohan
2014-02-05 13:30 ` [PATCH 02/18] arm64: GICv3 device tree binding documentation Marc Zyngier
2014-02-07  5:41   ` Arnab Basu
2014-02-13 12:59     ` Marc Zyngier [this message]
2014-02-13 13:27       ` Rob Herring
2014-02-13 13:26   ` Rob Herring
2014-02-13 14:00     ` Marc Zyngier
2014-02-17  1:21   ` Christoffer Dall
2014-02-17 16:57     ` Marc Zyngier
2014-02-05 13:30 ` [PATCH 03/18] arm64: boot protocol documentation update for GICv3 Marc Zyngier
2014-02-05 15:03   ` Catalin Marinas
2014-02-25 18:06   ` Will Deacon
2014-02-26 14:37     ` Marc Zyngier
2014-02-26 15:31       ` Will Deacon
2014-02-26 15:59         ` Marc Zyngier
2014-02-26 16:01           ` Will Deacon
2014-02-05 13:30 ` [PATCH 04/18] KVM: arm/arm64: vgic: move GICv2 registers to their own structure Marc Zyngier
2014-03-04  3:32   ` Christoffer Dall
2014-02-05 13:30 ` [PATCH 05/18] KVM: ARM: vgic: introduce vgic_ops and LR manipulation primitives Marc Zyngier
2014-02-05 13:30 ` [PATCH 06/18] KVM: ARM: vgic: abstract access to the ELRSR bitmap Marc Zyngier
2014-02-05 13:30 ` [PATCH 07/18] KVM: ARM: vgic: abstract EISR bitmap access Marc Zyngier
2014-02-05 13:30 ` [PATCH 08/18] KVM: ARM: vgic: abstract MISR decoding Marc Zyngier
2014-02-05 13:30 ` [PATCH 09/18] KVM: ARM: vgic: move underflow handling to vgic_ops Marc Zyngier
2014-02-05 13:30 ` [PATCH 10/18] KVM: ARM: vgic: abstract VMCR access Marc Zyngier
2014-02-05 13:30 ` [PATCH 11/18] KVM: ARM: vgic: introduce vgic_enable Marc Zyngier
2014-02-05 13:30 ` [PATCH 12/18] KVM: ARM: introduce vgic_params structure Marc Zyngier
2014-02-05 13:30 ` [PATCH 13/18] KVM: ARM: vgic: split GICv2 backend from the main vgic code Marc Zyngier
2014-02-05 13:30 ` [PATCH 14/18] arm64: KVM: remove __kvm_hyp_code_{start, end} from hyp.S Marc Zyngier
2014-02-05 13:30 ` [PATCH 15/18] arm64: KVM: split GICv2 world switch from hyp code Marc Zyngier
2014-02-25 18:07   ` Will Deacon
2014-02-05 13:30 ` [PATCH 16/18] arm64: KVM: move hcr_el2 setting into vgic-v2-switch.S Marc Zyngier
2014-02-05 13:30 ` [PATCH 17/18] KVM: ARM: vgic: add the GICv3 backend Marc Zyngier
2014-02-25 18:07   ` Will Deacon
2014-02-26 18:18     ` Marc Zyngier
2014-02-27 12:12       ` Will Deacon
2014-02-05 13:30 ` [PATCH 18/18] arm64: KVM: vgic: add GICv3 world switch Marc Zyngier
2014-02-25 18:08   ` Will Deacon
2014-02-26 18:06     ` Marc Zyngier

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