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From: hdegoede@redhat.com (Hans de Goede)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] [PATCH v2 2/5] clk: sun6i: Reparent AHB clock on PLL6
Date: Sat, 01 Mar 2014 17:32:40 +0100	[thread overview]
Message-ID: <53120BA8.3000508@redhat.com> (raw)
In-Reply-To: <1393605440-14643-3-git-send-email-maxime.ripard@free-electrons.com>

Hi,

On 02/28/2014 05:37 PM, Maxime Ripard wrote:
> In order for the DMA controller to work for SDRAM to devices transfers, the AHB
> clock should be reparented on the PLL6.
> 
> Force that parenting in the clock driver.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  drivers/clk/sunxi/clk-sunxi.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index f6f61cc..a5c5882 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -1286,7 +1286,7 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
>   */
>  static void __init sunxi_clock_protect(void)
>  {
> -	struct clk *clk;
> +	struct clk *clk, *parent;
>  
>  	/* memory bus clock - sun5i+ */
>  	clk = clk_get(NULL, "mbus");
> @@ -1307,6 +1307,22 @@ static void __init sunxi_clock_protect(void)
>  	if (!IS_ERR(clk))
>  		clk_prepare_enable(clk);
>  
> +	clk = clk_get(NULL, "ahb1_mux");
> +	if (IS_ERR(clk)) {
> +		pr_err("Couldn't get AHB1 Mux\n");
> +		return;
> +	}

I think Emilio already made a similar remark for v1, but since this
is still here in v2, ahb1_mux is only available on sun6i, so
at a minimum the pr_err should be dropped. Preferably I would like
to see this changed to something like:

	clk = clk_get(NULL, "ahb1_mux");
	parent = clk_get(NULL, "pll6");
	if (!IS_ERR(clk) && !IS_ERR(parent))
		clk_set_parent(clk, parent);
	if (!IS_ERR(parent))
		clk_put(parent);
	if (!IS_ERR(clk))
		clk_put(clk);

> +
> +	parent = clk_get(NULL, "pll6");
> +	if (IS_ERR(clk)) {

Copy paste error should be IS_ERR(parent).

> +		pr_err("Couldn't get PLL6\n");

If we keep things this way this error path should do a clk_put(clk);

> +		return;
> +	}
> +
> +	clk_set_parent(clk, parent);
> +
> +	clk_put(clk);
> +	clk_put(parent);
>  }
>  
>  static void __init sunxi_init_clocks(void)
> 

Regards,

Hans

p.s.

Given Russell's remarks it would also be good to have a
patch in this set dropping the clk_put calls of the existing
enables / protections.

  parent reply	other threads:[~2014-03-01 16:32 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-28 16:37 [PATCH v2 0/5] Add support for the Allwinner A31 DMA Controller Maxime Ripard
2014-02-28 16:37 ` [PATCH v2 1/5] clk: sun6i: Protect CPU clock Maxime Ripard
2014-02-28 16:37 ` [PATCH v2 2/5] clk: sun6i: Reparent AHB clock on PLL6 Maxime Ripard
2014-02-28 17:16   ` Emilio López
2014-03-01 16:32   ` Hans de Goede [this message]
2014-03-03 13:26     ` [linux-sunxi] " Maxime Ripard
2014-02-28 16:37 ` [PATCH v2 3/5] clk: sun6i: Protect SDRAM gating bit Maxime Ripard
2014-02-28 16:37 ` [PATCH v2 4/5] DMA: sun6i: Add driver for the Allwinner A31 DMA controller Maxime Ripard
2014-02-28 17:30   ` Shevchenko, Andriy
2014-03-03 13:18     ` Maxime Ripard
2014-02-28 16:37 ` [PATCH v2 5/5] ARM: sun6i: dt: Add A31 DMA controller to DTSI Maxime Ripard

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