[PATCH v3 0/7] ARM: dts: Better support for Gumstix Overo (for 3.15?)

[PATCH v3 0/7] ARM: dts: Better support for Gumstix Overo (for 3.15?)

[Florian Vaussard]

Hello Tony, Benoit,

This is the third version of my Overo series. No major changes since v2,
I just dropped the patch related to the "ti,use_poweroff" binding, and
will address this issue later.

Most patches are pretty obvious. Patch 5 adds some specific timings for
LAN9221 into a generic file. By using shorter timing, it is possible to
double the Ethernet bandwidth. Thus is may interest people using a similar
chip.

I tested this series with both the OMAP35xx Overo and the OMAP36xx Overo.
Wifi is functional, HSUSB works.

Note: I hope that this can go into 3.15, since the patches were first
posted before the 3.14 merge window. They add a number of useful peripherals,
so this would be much appreciated.


Regards,
Florian


Florian Vaussard (7):
  ARM: dts: omap3-tobi: Add missing pinctrl
  ARM: dts: omap3-overo: Add missing pinctrl
  ARM: dts: omap3-overo: Enable WiFi/BT combo
  ARM: dts: omap3-overo: Add HSUSB PHY
  ARM: dts: omap: Add common file for SMSC9221
  ARM: dts: omap3-tobi: Use include file omap-gpmc-smsc9221
  ARM: dts: omap3-tobi: Add AT24C01 EEPROM

 arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi      |  58 +++++++++++
 arch/arm/boot/dts/omap3-overo-storm-tobi.dts   |  24 +++++
 arch/arm/boot/dts/omap3-overo-tobi-common.dtsi |  48 ++++-----
 arch/arm/boot/dts/omap3-overo-tobi.dts         |  24 +++++
 arch/arm/boot/dts/omap3-overo.dtsi             | 138 +++++++++++++++++++++++--
 5 files changed, 258 insertions(+), 34 deletions(-)
 create mode 100644 arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi

-- 
1.8.3.2

[PATCH v3 1/7] ARM: dts: omap3-tobi: Add missing pinctrl

[Florian Vaussard]

Add missing pinctrl entries:
- i2c3

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo-tobi-common.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
index 4edc013..da7d85b 100644
--- a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
@@ -35,6 +35,15 @@
 	};
 };
 
+&omap3_pmx_core {
+	i2c3_pins: pinmux_i2c3_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
+			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
+		>;
+	};
+};
+
 &gpmc {
 	ranges = <5 0 0x2c000000 0x1000000>;	/* CS5 */
 
@@ -72,6 +81,8 @@
 };
 
 &i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3_pins>;
 	clock-frequency = <100000>;
 };
 
-- 
1.8.3.2

[PATCH v3 2/7] ARM: dts: omap3-overo: Add missing pinctrl

[Florian Vaussard]

Add missing pinctrl entries for:
- i2c1
- mmc1

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo.dtsi | 40 +++++++++++++++++++++++++++++---------
 1 file changed, 31 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index 5970999..aea64c0 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -31,7 +31,36 @@
 	};
 };
 
+&omap3_pmx_core {
+	uart3_pins: pinmux_uart3_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
+			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
+		>;
+	};
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)		/* i2c1_scl.i2c1_scl */
+			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)		/* i2c1_sda.i2c1_sda */
+		>;
+	};
+
+	mmc1_pins: pinmux_mmc1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_clk.sdmmc1_clk */
+			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
+			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat0.sdmmc1_dat0 */
+			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat1.sdmmc1_dat1 */
+			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat2.sdmmc1_dat2 */
+			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
+		>;
+	};
+};
+
 &i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
 	clock-frequency = <2600000>;
 
 	twl: twl at 48 {
@@ -57,6 +86,8 @@
 
 /* on board microSD slot */
 &mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
 	vmmc-supply = <&vmmc1>;
 	bus-width = <4>;
 };
@@ -79,15 +110,6 @@
 	power = <50>;
 };
 
-&omap3_pmx_core {
-	uart3_pins: pinmux_uart3_pins {
-		pinctrl-single,pins = <
-			0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
-			0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
-		>;
-	};
-};
-
 &uart3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart3_pins>;
-- 
1.8.3.2

[PATCH v3 3/7] ARM: dts: omap3-overo: Enable WiFi/BT combo

[Florian Vaussard]

MMC2 is used by the on-board WiFi module populated on some boards
(based on Marvell Libertas 8688 SDIO). The Bluetooth is connected
to UART2.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo-storm-tobi.dts |  8 ++++
 arch/arm/boot/dts/omap3-overo-tobi.dts       |  8 ++++
 arch/arm/boot/dts/omap3-overo.dtsi           | 58 ++++++++++++++++++++++++++++
 3 files changed, 74 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
index 966b5c9..2033b52 100644
--- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
+++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
@@ -20,3 +20,11 @@
 	compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap36xx", "ti,omap3";
 };
 
+&omap3_pmx_core2 {
+	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
+		pinctrl-single,pins = <
+			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
+		>;
+	};
+};
+
diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
index de5653e..21de31d 100644
--- a/arch/arm/boot/dts/omap3-overo-tobi.dts
+++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
@@ -20,3 +20,11 @@
 	compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3";
 };
 
+&omap3_pmx_core2 {
+	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
+		pinctrl-single,pins = <
+			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
+		>;
+	};
+};
+
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index aea64c0..07467cc 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -29,6 +29,38 @@
 		ti,mcbsp = <&mcbsp2>;
 		ti,codec = <&twl_audio>;
 	};
+
+	/* Regulator to trigger the nPoweron signal of the Wifi module */
+	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-w3cbw003c-npoweron";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;		/* gpio_54: nPoweron */
+		enable-active-high;
+	};
+
+	/* Regulator to trigger the nReset signal of the Wifi module */
+	w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
+		pinctrl-names = "default";
+		pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-w3cbw003c-wifi-nreset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;		/* gpio_16: WiFi nReset */
+		startup-delay-us = <10000>;
+	};
+
+	/* Regulator to trigger the nReset signal of the Bluetooth module */
+	w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset {
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-w3cbw003c-bt-nreset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;		/* gpio_164: BT nReset */
+		startup-delay-us = <10000>;
+	};
 };
 
 &omap3_pmx_core {
@@ -56,6 +88,25 @@
 			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
 		>;
 	};
+
+	mmc2_pins: pinmux_mmc2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_clk.sdmmc2_clk */
+			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_cmd.sdmmc2_cmd */
+			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
+			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
+			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
+			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
+		>;
+	};
+
+	/* WiFi/BT combo */
+	w3cbw003c_pins: pinmux_w3cbw003c_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4)		/* gpmc_ncs3.gpio_54 */
+			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
+		>;
+	};
 };
 
 &i2c1 {
@@ -94,7 +145,14 @@
 
 /* optional on board WiFi */
 &mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_pins>;
+	vmmc-supply = <&w3cbw003c_npoweron>;
+	vqmmc-supply = <&w3cbw003c_bt_nreset>;
+	vmmc_aux-supply = <&w3cbw003c_wifi_nreset>;
 	bus-width = <4>;
+	cap-sdio-irq;
+	non-removable;
 };
 
 &twl_gpio {
-- 
1.8.3.2

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Florian Vaussard]

Add the High-Speed USB PHY.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
 arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
 arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
 3 files changed, 76 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
index 2033b52..eb93e3a 100644
--- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
+++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
@@ -21,6 +21,22 @@
 };
 
 &omap3_pmx_core2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&hsusb2_2_pins
+	>;
+
+	hsusb2_2_pins: pinmux_hsusb2_2_pins {
+		pinctrl-single,pins = <
+			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
+			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
+			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
+			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
+			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
+			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
+		>;
+	};
+
 	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
 		pinctrl-single,pins = <
 			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
index 21de31d..e77be26 100644
--- a/arch/arm/boot/dts/omap3-overo-tobi.dts
+++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
@@ -21,6 +21,22 @@
 };
 
 &omap3_pmx_core2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&hsusb2_2_pins
+	>;
+
+	hsusb2_2_pins: pinmux_hsusb2_2_pins {
+		pinctrl-single,pins = <
+			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
+			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
+			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
+			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
+			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
+			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
+		>;
+	};
+
 	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
 		pinctrl-single,pins = <
 			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index 07467cc..8f810db 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -30,6 +30,24 @@
 		ti,codec = <&twl_audio>;
 	};
 
+	/* HS USB Port 2 Power */
+	hsusb2_power: hsusb2_power_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb2_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 2 */
+	hsusb2_phy: hsusb2_phy {
+		compatible = "usb-nop-xceiv";
+		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
+		vcc-supply = <&hsusb2_power>;
+	};
+
 	/* Regulator to trigger the nPoweron signal of the Wifi module */
 	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
 		compatible = "regulator-fixed";
@@ -64,6 +82,11 @@
 };
 
 &omap3_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&hsusb2_pins
+	>;
+
 	uart3_pins: pinmux_uart3_pins {
 		pinctrl-single,pins = <
 			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
@@ -107,6 +130,19 @@
 			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
 		>;
 	};
+
+	hsusb2_pins: pinmux_hsusb2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
+			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
+			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
+			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
+			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
+			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
+			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
+			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
+		>;
+	};
 };
 
 &i2c1 {
@@ -168,6 +204,14 @@
 	power = <50>;
 };
 
+&usbhshost {
+	port2-mode = "ehci-phy";
+};
+
+&usbhsehci {
+	phys = <0 &hsusb2_phy>;
+};
+
 &uart3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart3_pins>;
-- 
1.8.3.2

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Roger Quadros]

Hi Florian,


On 03/03/2014 11:34 AM, Florian Vaussard wrote:
> Add the High-Speed USB PHY.
> 
> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
> ---
>  arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
>  arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
>  arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
>  3 files changed, 76 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
> index 2033b52..eb93e3a 100644
> --- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
> +++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
> @@ -21,6 +21,22 @@
>  };
>  
>  &omap3_pmx_core2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <
> +			&hsusb2_2_pins
> +	>;
> +
> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
> +		pinctrl-single,pins = <
> +			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
> +			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
> +			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
> +			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
> +			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
> +			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
> +		>;
> +	};
> +
>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>  		pinctrl-single,pins = <
>  			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
> diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
> index 21de31d..e77be26 100644
> --- a/arch/arm/boot/dts/omap3-overo-tobi.dts
> +++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
> @@ -21,6 +21,22 @@
>  };
>  
>  &omap3_pmx_core2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <
> +			&hsusb2_2_pins
> +	>;
> +
> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
> +		pinctrl-single,pins = <
> +			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
> +			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
> +			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
> +			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
> +			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
> +			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
> +		>;
> +	};
> +
>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>  		pinctrl-single,pins = <
>  			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
> diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
> index 07467cc..8f810db 100644
> --- a/arch/arm/boot/dts/omap3-overo.dtsi
> +++ b/arch/arm/boot/dts/omap3-overo.dtsi
> @@ -30,6 +30,24 @@
>  		ti,codec = <&twl_audio>;
>  	};
>  
> +	/* HS USB Port 2 Power */
> +	hsusb2_power: hsusb2_power_reg {
> +		compatible = "regulator-fixed";
> +		regulator-name = "hsusb2_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
> +		startup-delay-us = <70000>;
> +		enable-active-high;
> +	};
> +
> +	/* HS USB Host PHY on PORT 2 */
> +	hsusb2_phy: hsusb2_phy {
> +		compatible = "usb-nop-xceiv";
> +		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
> +		vcc-supply = <&hsusb2_power>;
> +	};
> +
>  	/* Regulator to trigger the nPoweron signal of the Wifi module */
>  	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
>  		compatible = "regulator-fixed";
> @@ -64,6 +82,11 @@
>  };
>  
>  &omap3_pmx_core {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <
> +			&hsusb2_pins
> +	>;
> +
>  	uart3_pins: pinmux_uart3_pins {
>  		pinctrl-single,pins = <
>  			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
> @@ -107,6 +130,19 @@
>  			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
>  		>;
>  	};
> +
> +	hsusb2_pins: pinmux_hsusb2_pins {
> +		pinctrl-single,pins = <
> +			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
> +			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
> +			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
> +			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
> +			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
> +			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
> +			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
> +			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
> +		>;
> +	};

Does this mean all overo variants use the USB host feature on hsusb2 pins? If not then this can't be here.

If yes then I didn't understand why the hsusb2 pinmux is split up half here and half in "omap3-overo-tobi.dts"
and "omap3-overo-storm-tobi.dts"

>  };
>  
>  &i2c1 {
> @@ -168,6 +204,14 @@
>  	power = <50>;
>  };
>  
> +&usbhshost {
> +	port2-mode = "ehci-phy";
> +};
> +
> +&usbhsehci {
> +	phys = <0 &hsusb2_phy>;
> +};
> +
>  &uart3 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&uart3_pins>;
> 

cheers,
-roger

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Florian Vaussard]

Hi Roger,

On 03/03/2014 12:03 PM, Roger Quadros wrote:
> Hi Florian,
> 
> 
> On 03/03/2014 11:34 AM, Florian Vaussard wrote:
>> Add the High-Speed USB PHY.
>>
>> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
>> ---
>>  arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
>>  arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
>>  arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
>>  3 files changed, 76 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>> index 2033b52..eb93e3a 100644
>> --- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>> +++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>> @@ -21,6 +21,22 @@
>>  };
>>  
>>  &omap3_pmx_core2 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <
>> +			&hsusb2_2_pins
>> +	>;
>> +
>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>> +		pinctrl-single,pins = <
>> +			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>> +			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>> +			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>> +			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>> +			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>> +			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>> +		>;
>> +	};
>> +
>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>  		pinctrl-single,pins = <
>>  			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>> diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
>> index 21de31d..e77be26 100644
>> --- a/arch/arm/boot/dts/omap3-overo-tobi.dts
>> +++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
>> @@ -21,6 +21,22 @@
>>  };
>>  
>>  &omap3_pmx_core2 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <
>> +			&hsusb2_2_pins
>> +	>;
>> +
>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>> +		pinctrl-single,pins = <
>> +			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>> +			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>> +			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>> +			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>> +			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>> +			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>> +		>;
>> +	};
>> +
>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>  		pinctrl-single,pins = <
>>  			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>> diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
>> index 07467cc..8f810db 100644
>> --- a/arch/arm/boot/dts/omap3-overo.dtsi
>> +++ b/arch/arm/boot/dts/omap3-overo.dtsi
>> @@ -30,6 +30,24 @@
>>  		ti,codec = <&twl_audio>;
>>  	};
>>  
>> +	/* HS USB Port 2 Power */
>> +	hsusb2_power: hsusb2_power_reg {
>> +		compatible = "regulator-fixed";
>> +		regulator-name = "hsusb2_vbus";
>> +		regulator-min-microvolt = <5000000>;
>> +		regulator-max-microvolt = <5000000>;
>> +		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
>> +		startup-delay-us = <70000>;
>> +		enable-active-high;
>> +	};
>> +
>> +	/* HS USB Host PHY on PORT 2 */
>> +	hsusb2_phy: hsusb2_phy {
>> +		compatible = "usb-nop-xceiv";
>> +		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
>> +		vcc-supply = <&hsusb2_power>;
>> +	};
>> +
>>  	/* Regulator to trigger the nPoweron signal of the Wifi module */
>>  	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
>>  		compatible = "regulator-fixed";
>> @@ -64,6 +82,11 @@
>>  };
>>  
>>  &omap3_pmx_core {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <
>> +			&hsusb2_pins
>> +	>;
>> +
>>  	uart3_pins: pinmux_uart3_pins {
>>  		pinctrl-single,pins = <
>>  			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
>> @@ -107,6 +130,19 @@
>>  			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
>>  		>;
>>  	};
>> +
>> +	hsusb2_pins: pinmux_hsusb2_pins {
>> +		pinctrl-single,pins = <
>> +			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
>> +			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
>> +			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
>> +			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
>> +			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
>> +			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
>> +			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
>> +			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
>> +		>;
>> +	};
> 
> Does this mean all overo variants use the USB host feature on hsusb2 pins? If not then this can't be here.
> 

Yes, they all does have USB host on hsusb2.

> If yes then I didn't understand why the hsusb2 pinmux is split up half here and half in "omap3-overo-tobi.dts"
> and "omap3-overo-storm-tobi.dts"
> 

Some of the pads are in the omap3_pmx_core2 domain. The exact offset of
the pin inside the pinctrl domain depends on the OMAP3 version, hence
the use of OMAP3430_CORE2_IOPAD and OMAP3630_CORE2_IOPAD macros.

Now some Overo depends on omap34xx (regular overo), others on omap36xx
(overo-storm). Commit f03ef09 "ARM: dts: Add support for both OMAP35xx
and OMAP36xx Overo/Tobi" made omap3-overo.dtsi independent from the
OMAP3 revision, and pushed these details down to the Tobi board files.
This is why the pinmux related to the omap3_pmx_core2 domain is there.

As long as we have only one expansion board, I think that this is ok. I
wanted to avoid an excessive fragmentation of the DTSI files. But when
adding new expansion boards, it will be necessary to create yet another
indirection layer to address this issue and avoid duplicated DT data.

Regards,
Florian

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Roger Quadros]

On 03/03/2014 02:48 PM, Florian Vaussard wrote:
> Hi Roger,
> 
> On 03/03/2014 12:03 PM, Roger Quadros wrote:
>> Hi Florian,
>>
>>
>> On 03/03/2014 11:34 AM, Florian Vaussard wrote:
>>> Add the High-Speed USB PHY.
>>>
>>> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
>>> ---
>>>  arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
>>>  arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
>>>  arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
>>>  3 files changed, 76 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>> index 2033b52..eb93e3a 100644
>>> --- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>> +++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>> @@ -21,6 +21,22 @@
>>>  };
>>>  
>>>  &omap3_pmx_core2 {
>>> +	pinctrl-names = "default";
>>> +	pinctrl-0 = <
>>> +			&hsusb2_2_pins
>>> +	>;
>>> +
>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>> +		pinctrl-single,pins = <
>>> +			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>> +			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>> +			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>> +			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>> +			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>> +			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>> +		>;
>>> +	};
>>> +
>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>  		pinctrl-single,pins = <
>>>  			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>> diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>> index 21de31d..e77be26 100644
>>> --- a/arch/arm/boot/dts/omap3-overo-tobi.dts
>>> +++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>> @@ -21,6 +21,22 @@
>>>  };
>>>  
>>>  &omap3_pmx_core2 {
>>> +	pinctrl-names = "default";
>>> +	pinctrl-0 = <
>>> +			&hsusb2_2_pins
>>> +	>;
>>> +
>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>> +		pinctrl-single,pins = <
>>> +			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>> +			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>> +			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>> +			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>> +			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>> +			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>> +		>;
>>> +	};
>>> +
>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>  		pinctrl-single,pins = <
>>>  			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>> diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
>>> index 07467cc..8f810db 100644
>>> --- a/arch/arm/boot/dts/omap3-overo.dtsi
>>> +++ b/arch/arm/boot/dts/omap3-overo.dtsi
>>> @@ -30,6 +30,24 @@
>>>  		ti,codec = <&twl_audio>;
>>>  	};
>>>  
>>> +	/* HS USB Port 2 Power */
>>> +	hsusb2_power: hsusb2_power_reg {
>>> +		compatible = "regulator-fixed";
>>> +		regulator-name = "hsusb2_vbus";
>>> +		regulator-min-microvolt = <5000000>;
>>> +		regulator-max-microvolt = <5000000>;
>>> +		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
>>> +		startup-delay-us = <70000>;
>>> +		enable-active-high;
>>> +	};
>>> +
>>> +	/* HS USB Host PHY on PORT 2 */
>>> +	hsusb2_phy: hsusb2_phy {
>>> +		compatible = "usb-nop-xceiv";
>>> +		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
>>> +		vcc-supply = <&hsusb2_power>;
>>> +	};
>>> +
>>>  	/* Regulator to trigger the nPoweron signal of the Wifi module */
>>>  	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
>>>  		compatible = "regulator-fixed";
>>> @@ -64,6 +82,11 @@
>>>  };
>>>  
>>>  &omap3_pmx_core {
>>> +	pinctrl-names = "default";
>>> +	pinctrl-0 = <
>>> +			&hsusb2_pins
>>> +	>;
>>> +
>>>  	uart3_pins: pinmux_uart3_pins {
>>>  		pinctrl-single,pins = <
>>>  			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
>>> @@ -107,6 +130,19 @@
>>>  			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
>>>  		>;
>>>  	};
>>> +
>>> +	hsusb2_pins: pinmux_hsusb2_pins {
>>> +		pinctrl-single,pins = <
>>> +			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
>>> +			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
>>> +			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
>>> +			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
>>> +			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
>>> +			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
>>> +			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
>>> +			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
>>> +		>;
>>> +	};
>>
>> Does this mean all overo variants use the USB host feature on hsusb2 pins? If not then this can't be here.
>>
> 
> Yes, they all does have USB host on hsusb2.
> 
>> If yes then I didn't understand why the hsusb2 pinmux is split up half here and half in "omap3-overo-tobi.dts"
>> and "omap3-overo-storm-tobi.dts"
>>
> 
> Some of the pads are in the omap3_pmx_core2 domain. The exact offset of
> the pin inside the pinctrl domain depends on the OMAP3 version, hence
> the use of OMAP3430_CORE2_IOPAD and OMAP3630_CORE2_IOPAD macros.
> 
> Now some Overo depends on omap34xx (regular overo), others on omap36xx
> (overo-storm). Commit f03ef09 "ARM: dts: Add support for both OMAP35xx
> and OMAP36xx Overo/Tobi" made omap3-overo.dtsi independent from the
> OMAP3 revision, and pushed these details down to the Tobi board files.
> This is why the pinmux related to the omap3_pmx_core2 domain is there.
> 

But we can still have the omap3_pmx_core2 part along with the omap3_pmx_core part
for hsusb pins in the omap3-overo-tobi-common.dtsi, right? That way we limit
usb host feature for TOBI variants only.

The tobi variant's dts file seems to include the right OMAP3430 vs 3630 SoC dtsi before the
omap3-overo-tobi-common.dtsi, so the pinctrl address will be taken care of there.

> As long as we have only one expansion board, I think that this is ok. I
> wanted to avoid an excessive fragmentation of the DTSI files. But when
> adding new expansion boards, it will be necessary to create yet another
> indirection layer to address this issue and avoid duplicated DT data.

Putting usb host pins in omap3-overo.dtsi implies that all Overo expansion boards will use it
but that is not always the case. Any expansion board vendor can decide not to use USB host feature.

cheers,
-roger

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Florian Vaussard]

On 03/03/2014 02:07 PM, Roger Quadros wrote:
> 
> On 03/03/2014 02:48 PM, Florian Vaussard wrote:
>> Hi Roger,
>>
>> On 03/03/2014 12:03 PM, Roger Quadros wrote:
>>> Hi Florian,
>>>
>>>
>>> On 03/03/2014 11:34 AM, Florian Vaussard wrote:
>>>> Add the High-Speed USB PHY.
>>>>
>>>> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
>>>> ---
>>>>  arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
>>>>  arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
>>>>  arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
>>>>  3 files changed, 76 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>> index 2033b52..eb93e3a 100644
>>>> --- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>> +++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>> @@ -21,6 +21,22 @@
>>>>  };
>>>>  
>>>>  &omap3_pmx_core2 {
>>>> +	pinctrl-names = "default";
>>>> +	pinctrl-0 = <
>>>> +			&hsusb2_2_pins
>>>> +	>;
>>>> +
>>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>>> +		pinctrl-single,pins = <
>>>> +			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>>> +			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>>> +			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>>> +			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>>> +			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>>> +			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>>> +		>;
>>>> +	};
>>>> +
>>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>>  		pinctrl-single,pins = <
>>>>  			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>>> diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>> index 21de31d..e77be26 100644
>>>> --- a/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>> +++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>> @@ -21,6 +21,22 @@
>>>>  };
>>>>  
>>>>  &omap3_pmx_core2 {
>>>> +	pinctrl-names = "default";
>>>> +	pinctrl-0 = <
>>>> +			&hsusb2_2_pins
>>>> +	>;
>>>> +
>>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>>> +		pinctrl-single,pins = <
>>>> +			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>>> +			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>>> +			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>>> +			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>>> +			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>>> +			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>>> +		>;
>>>> +	};
>>>> +
>>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>>  		pinctrl-single,pins = <
>>>>  			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>>> diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
>>>> index 07467cc..8f810db 100644
>>>> --- a/arch/arm/boot/dts/omap3-overo.dtsi
>>>> +++ b/arch/arm/boot/dts/omap3-overo.dtsi
>>>> @@ -30,6 +30,24 @@
>>>>  		ti,codec = <&twl_audio>;
>>>>  	};
>>>>  
>>>> +	/* HS USB Port 2 Power */
>>>> +	hsusb2_power: hsusb2_power_reg {
>>>> +		compatible = "regulator-fixed";
>>>> +		regulator-name = "hsusb2_vbus";
>>>> +		regulator-min-microvolt = <5000000>;
>>>> +		regulator-max-microvolt = <5000000>;
>>>> +		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
>>>> +		startup-delay-us = <70000>;
>>>> +		enable-active-high;
>>>> +	};
>>>> +
>>>> +	/* HS USB Host PHY on PORT 2 */
>>>> +	hsusb2_phy: hsusb2_phy {
>>>> +		compatible = "usb-nop-xceiv";
>>>> +		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
>>>> +		vcc-supply = <&hsusb2_power>;
>>>> +	};
>>>> +
>>>>  	/* Regulator to trigger the nPoweron signal of the Wifi module */
>>>>  	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
>>>>  		compatible = "regulator-fixed";
>>>> @@ -64,6 +82,11 @@
>>>>  };
>>>>  
>>>>  &omap3_pmx_core {
>>>> +	pinctrl-names = "default";
>>>> +	pinctrl-0 = <
>>>> +			&hsusb2_pins
>>>> +	>;
>>>> +
>>>>  	uart3_pins: pinmux_uart3_pins {
>>>>  		pinctrl-single,pins = <
>>>>  			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
>>>> @@ -107,6 +130,19 @@
>>>>  			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
>>>>  		>;
>>>>  	};
>>>> +
>>>> +	hsusb2_pins: pinmux_hsusb2_pins {
>>>> +		pinctrl-single,pins = <
>>>> +			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
>>>> +			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
>>>> +			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
>>>> +			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
>>>> +			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
>>>> +			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
>>>> +			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
>>>> +			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
>>>> +		>;
>>>> +	};
>>>
>>> Does this mean all overo variants use the USB host feature on hsusb2 pins? If not then this can't be here.
>>>
>>
>> Yes, they all does have USB host on hsusb2.
>>
>>> If yes then I didn't understand why the hsusb2 pinmux is split up half here and half in "omap3-overo-tobi.dts"
>>> and "omap3-overo-storm-tobi.dts"
>>>
>>
>> Some of the pads are in the omap3_pmx_core2 domain. The exact offset of
>> the pin inside the pinctrl domain depends on the OMAP3 version, hence
>> the use of OMAP3430_CORE2_IOPAD and OMAP3630_CORE2_IOPAD macros.
>>
>> Now some Overo depends on omap34xx (regular overo), others on omap36xx
>> (overo-storm). Commit f03ef09 "ARM: dts: Add support for both OMAP35xx
>> and OMAP36xx Overo/Tobi" made omap3-overo.dtsi independent from the
>> OMAP3 revision, and pushed these details down to the Tobi board files.
>> This is why the pinmux related to the omap3_pmx_core2 domain is there.
>>
> 
> But we can still have the omap3_pmx_core2 part along with the omap3_pmx_core part
> for hsusb pins in the omap3-overo-tobi-common.dtsi, right? That way we limit
> usb host feature for TOBI variants only.
> 
> The tobi variant's dts file seems to include the right OMAP3430 vs 3630 SoC dtsi before the
> omap3-overo-tobi-common.dtsi, so the pinctrl address will be taken care of there.
> 
>> As long as we have only one expansion board, I think that this is ok. I
>> wanted to avoid an excessive fragmentation of the DTSI files. But when
>> adding new expansion boards, it will be necessary to create yet another
>> indirection layer to address this issue and avoid duplicated DT data.
> 
> Putting usb host pins in omap3-overo.dtsi implies that all Overo expansion boards will use it
> but that is not always the case. Any expansion board vendor can decide not to use USB host feature.
> 

I do agree that this can be the case. So it makes sense to push the
USB host down to expansion boards.

Now how to do it? The omap3_pmx_core part can be put in
omap3-overo-tobi-common.dtsi. But unfortunately, the omap3_pmx_core2
part cannot
be factorized between the two variants, as one has to use a different
macro for each case (OMAP3430_CORE2_IOPAD vs. OMAP3630_CORE2_IOPAD).
Including the right .dtsi file is not enough.

As it can be seen from include/dt-bindings/pinctrl/omap.h, even if the
padconf register physical address is identical for both SoCs, the offset
inside omap3_pmx_core2 will be different (as the start of
omap3_pmx_core2 is 0x480025d8 for omap34xx and 0x480025a0 for omap36xx).

Thus the pins belonging to omap3_pmx_core2 must be in a SoC-dependent
.dtsi file.

I will post a v4 with a new proposition. Thanks for your inputs.

Regards,
Florian

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Tony Lindgren]

* Florian Vaussard <florian.vaussard@epfl.ch> [140305 00:04]:
> On 03/03/2014 02:07 PM, Roger Quadros wrote:
> > 
> > Putting usb host pins in omap3-overo.dtsi implies that all Overo expansion boards will use it
> > but that is not always the case. Any expansion board vendor can decide not to use USB host feature.
> > 
> 
> I do agree that this can be the case. So it makes sense to push the
> USB host down to expansion boards.
> 
> Now how to do it? The omap3_pmx_core part can be put in
> omap3-overo-tobi-common.dtsi. But unfortunately, the omap3_pmx_core2
> part cannot
> be factorized between the two variants, as one has to use a different
> macro for each case (OMAP3430_CORE2_IOPAD vs. OMAP3630_CORE2_IOPAD).
> Including the right .dtsi file is not enough.

FYI, it's best to have the mux registers board specific and separate
because the mux settings can depend on the SoC revision or even
packaging.
 
> As it can be seen from include/dt-bindings/pinctrl/omap.h, even if the
> padconf register physical address is identical for both SoCs, the offset
> inside omap3_pmx_core2 will be different (as the start of
> omap3_pmx_core2 is 0x480025d8 for omap34xx and 0x480025a0 for omap36xx).
> 
> Thus the pins belonging to omap3_pmx_core2 must be in a SoC-dependent
> .dtsi file.

It seems we need a top level .dts file incuding the right SoC and
pinconf settings.
 
> I will post a v4 with a new proposition. Thanks for your inputs.

OK as that might change the other patches too let's wait for that.

Regards,

Tony

[PATCH v3 4/7] ARM: dts: omap3-overo: Add HSUSB PHY

[Florian Vaussard]

On 03/05/2014 09:01 AM, Florian Vaussard wrote:
> 
> On 03/03/2014 02:07 PM, Roger Quadros wrote:
>>
>> On 03/03/2014 02:48 PM, Florian Vaussard wrote:
>>> Hi Roger,
>>>
>>> On 03/03/2014 12:03 PM, Roger Quadros wrote:
>>>> Hi Florian,
>>>>
>>>>
>>>> On 03/03/2014 11:34 AM, Florian Vaussard wrote:
>>>>> Add the High-Speed USB PHY.
>>>>>
>>>>> Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
>>>>> ---
>>>>>  arch/arm/boot/dts/omap3-overo-storm-tobi.dts | 16 ++++++++++
>>>>>  arch/arm/boot/dts/omap3-overo-tobi.dts       | 16 ++++++++++
>>>>>  arch/arm/boot/dts/omap3-overo.dtsi           | 44 ++++++++++++++++++++++++++++
>>>>>  3 files changed, 76 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>>> index 2033b52..eb93e3a 100644
>>>>> --- a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>>> +++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
>>>>> @@ -21,6 +21,22 @@
>>>>>  };
>>>>>  
>>>>>  &omap3_pmx_core2 {
>>>>> +	pinctrl-names = "default";
>>>>> +	pinctrl-0 = <
>>>>> +			&hsusb2_2_pins
>>>>> +	>;
>>>>> +
>>>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>>>> +		pinctrl-single,pins = <
>>>>> +			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>>>> +			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>>>> +			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>>>> +			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>>>> +			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>>>> +			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>>>> +		>;
>>>>> +	};
>>>>> +
>>>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>>>  		pinctrl-single,pins = <
>>>>>  			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>>>> diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>>> index 21de31d..e77be26 100644
>>>>> --- a/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>>> +++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
>>>>> @@ -21,6 +21,22 @@
>>>>>  };
>>>>>  
>>>>>  &omap3_pmx_core2 {
>>>>> +	pinctrl-names = "default";
>>>>> +	pinctrl-0 = <
>>>>> +			&hsusb2_2_pins
>>>>> +	>;
>>>>> +
>>>>> +	hsusb2_2_pins: pinmux_hsusb2_2_pins {
>>>>> +		pinctrl-single,pins = <
>>>>> +			OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
>>>>> +			OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
>>>>> +			OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
>>>>> +			OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
>>>>> +			OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
>>>>> +			OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
>>>>> +		>;
>>>>> +	};
>>>>> +
>>>>>  	w3cbw003c_2_pins: pinmux_w3cbw003c_2_pins {
>>>>>  		pinctrl-single,pins = <
>>>>>  			OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4)		/* etk_d2.gpio_16 */
>>>>> diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
>>>>> index 07467cc..8f810db 100644
>>>>> --- a/arch/arm/boot/dts/omap3-overo.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap3-overo.dtsi
>>>>> @@ -30,6 +30,24 @@
>>>>>  		ti,codec = <&twl_audio>;
>>>>>  	};
>>>>>  
>>>>> +	/* HS USB Port 2 Power */
>>>>> +	hsusb2_power: hsusb2_power_reg {
>>>>> +		compatible = "regulator-fixed";
>>>>> +		regulator-name = "hsusb2_vbus";
>>>>> +		regulator-min-microvolt = <5000000>;
>>>>> +		regulator-max-microvolt = <5000000>;
>>>>> +		gpio = <&gpio6 8 0>;				/* gpio_168: vbus enable */
>>>>> +		startup-delay-us = <70000>;
>>>>> +		enable-active-high;
>>>>> +	};
>>>>> +
>>>>> +	/* HS USB Host PHY on PORT 2 */
>>>>> +	hsusb2_phy: hsusb2_phy {
>>>>> +		compatible = "usb-nop-xceiv";
>>>>> +		reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;	/* gpio_183 */
>>>>> +		vcc-supply = <&hsusb2_power>;
>>>>> +	};
>>>>> +
>>>>>  	/* Regulator to trigger the nPoweron signal of the Wifi module */
>>>>>  	w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
>>>>>  		compatible = "regulator-fixed";
>>>>> @@ -64,6 +82,11 @@
>>>>>  };
>>>>>  
>>>>>  &omap3_pmx_core {
>>>>> +	pinctrl-names = "default";
>>>>> +	pinctrl-0 = <
>>>>> +			&hsusb2_pins
>>>>> +	>;
>>>>> +
>>>>>  	uart3_pins: pinmux_uart3_pins {
>>>>>  		pinctrl-single,pins = <
>>>>>  			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
>>>>> @@ -107,6 +130,19 @@
>>>>>  			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)		/* uart3_rts_sd.gpio_164 */
>>>>>  		>;
>>>>>  	};
>>>>> +
>>>>> +	hsusb2_pins: pinmux_hsusb2_pins {
>>>>> +		pinctrl-single,pins = <
>>>>> +			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)		/* i2c2_scl.gpio_168 */
>>>>> +			OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)		/* i2c2_sda.gpio_183 */
>>>>> +		>;
>>>>> +	};
>>>>
>>>> Does this mean all overo variants use the USB host feature on hsusb2 pins? If not then this can't be here.
>>>>
>>>
>>> Yes, they all does have USB host on hsusb2.
>>>
>>>> If yes then I didn't understand why the hsusb2 pinmux is split up half here and half in "omap3-overo-tobi.dts"
>>>> and "omap3-overo-storm-tobi.dts"
>>>>
>>>
>>> Some of the pads are in the omap3_pmx_core2 domain. The exact offset of
>>> the pin inside the pinctrl domain depends on the OMAP3 version, hence
>>> the use of OMAP3430_CORE2_IOPAD and OMAP3630_CORE2_IOPAD macros.
>>>
>>> Now some Overo depends on omap34xx (regular overo), others on omap36xx
>>> (overo-storm). Commit f03ef09 "ARM: dts: Add support for both OMAP35xx
>>> and OMAP36xx Overo/Tobi" made omap3-overo.dtsi independent from the
>>> OMAP3 revision, and pushed these details down to the Tobi board files.
>>> This is why the pinmux related to the omap3_pmx_core2 domain is there.
>>>
>>
>> But we can still have the omap3_pmx_core2 part along with the omap3_pmx_core part
>> for hsusb pins in the omap3-overo-tobi-common.dtsi, right? That way we limit
>> usb host feature for TOBI variants only.
>>
>> The tobi variant's dts file seems to include the right OMAP3430 vs 3630 SoC dtsi before the
>> omap3-overo-tobi-common.dtsi, so the pinctrl address will be taken care of there.
>>
>>> As long as we have only one expansion board, I think that this is ok. I
>>> wanted to avoid an excessive fragmentation of the DTSI files. But when
>>> adding new expansion boards, it will be necessary to create yet another
>>> indirection layer to address this issue and avoid duplicated DT data.
>>
>> Putting usb host pins in omap3-overo.dtsi implies that all Overo expansion boards will use it
>> but that is not always the case. Any expansion board vendor can decide not to use USB host feature.
>>
> 
> I do agree that this can be the case. So it makes sense to push the
> USB host down to expansion boards.
> 

In fact, I was wrong here, since the USB controller is embedded on the
processor board. The ULPI pins are not available to the expansion
boards, so disabling the host USB will make no difference on the
expansion connector.

Anyway, I have to reorganize a bit the pinmux definitions.

[PATCH v3 5/7] ARM: dts: omap: Add common file for SMSC9221

[Florian Vaussard]

Some devices (SMSC9217, SMSC9218 and SMSC9221 at least) have better
timings, allowing a higher transfer speed. Create a common file
with these timings.

Performance results with iperf:

- omap-gpmc-smsc911x.dtsi => 54.9 Mbps
- omap-gpmc-smsc9221.dtsi => 92.7 Mbps

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi | 58 +++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi

diff --git a/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
new file mode 100644
index 0000000..73e272f
--- /dev/null
+++ b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
@@ -0,0 +1,58 @@
+/*
+ * Common file for GPMC connected smsc9221 on omaps
+ *
+ * Compared to smsc911x, smsc9221 (and others like smsc9217
+ * or smsc 9218) has faster timings, leading to higher
+ * bandwidth.
+ *
+ * Note that the board specifc DTS file needs to specify
+ * ranges, pinctrl, reg, interrupt parent and interrupts.
+ */
+
+/ {
+	vddvario: regulator-vddvario {
+		  compatible = "regulator-fixed";
+		  regulator-name = "vddvario";
+		  regulator-always-on;
+	};
+
+	vdd33a: regulator-vdd33a {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd33a";
+		regulator-always-on;
+	};
+};
+
+&gpmc {
+	ethernet at gpmc {
+		compatible = "smsc,lan9221","smsc,lan9115";
+		bank-width = <2>;
+
+		gpmc,mux-add-data;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <42>;
+		gpmc,cs-wr-off-ns = <36>;
+		gpmc,adv-on-ns = <6>;
+		gpmc,adv-rd-off-ns = <12>;
+		gpmc,adv-wr-off-ns = <12>;
+		gpmc,oe-on-ns = <0>;
+		gpmc,oe-off-ns = <42>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <36>;
+		gpmc,rd-cycle-ns = <60>;
+		gpmc,wr-cycle-ns = <54>;
+		gpmc,access-ns = <36>;
+		gpmc,page-burst-access-ns = <0>;
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <0>;
+		gpmc,wr-data-mux-bus-ns = <18>;
+		gpmc,wr-access-ns = <42>;
+		gpmc,cycle2cycle-samecsen;
+		gpmc,cycle2cycle-diffcsen;
+
+		vddvario-supply = <&vddvario>;
+		vdd33a-supply = <&vdd33a>;
+		reg-io-width = <4>;
+		smsc,save-mac-address;
+	};
+};
-- 
1.8.3.2

[PATCH v3 6/7] ARM: dts: omap3-tobi: Use include file omap-gpmc-smsc9221

[Florian Vaussard]

Use the timings provided by omap-gpmc-smsc9221. This does not change
the timings, but it avoids code duplication.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo-tobi-common.dtsi | 30 +++-----------------------
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
index da7d85b..caddb8c 100644
--- a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
@@ -44,39 +44,15 @@
 	};
 };
 
+#include "omap-gpmc-smsc9221.dtsi"
+
 &gpmc {
 	ranges = <5 0 0x2c000000 0x1000000>;	/* CS5 */
 
-	ethernet at 5,0 {
-		compatible = "smsc,lan9221", "smsc,lan9115";
+	ethernet at gpmc {
 		reg = <5 0 0xff>;
-		bank-width = <2>;
-
-		gpmc,mux-add-data;
-		gpmc,cs-on-ns = <0>;
-		gpmc,cs-rd-off-ns = <42>;
-		gpmc,cs-wr-off-ns = <36>;
-		gpmc,adv-on-ns = <6>;
-		gpmc,adv-rd-off-ns = <12>;
-		gpmc,adv-wr-off-ns = <12>;
-		gpmc,oe-on-ns = <0>;
-		gpmc,oe-off-ns = <42>;
-		gpmc,we-on-ns = <0>;
-		gpmc,we-off-ns = <36>;
-		gpmc,rd-cycle-ns = <60>;
-		gpmc,wr-cycle-ns = <54>;
-		gpmc,access-ns = <36>;
-		gpmc,page-burst-access-ns = <0>;
-		gpmc,bus-turnaround-ns = <0>;
-		gpmc,cycle2cycle-delay-ns = <0>;
-		gpmc,wr-data-mux-bus-ns = <18>;
-		gpmc,wr-access-ns = <42>;
-		gpmc,cycle2cycle-samecsen;
-		gpmc,cycle2cycle-diffcsen;
-
 		interrupt-parent = <&gpio6>;
 		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;	/* GPIO 176 */
-		reg-io-width = <4>;
 	};
 };
 
-- 
1.8.3.2

[PATCH v3 7/7] ARM: dts: omap3-tobi: Add AT24C01 EEPROM

[Florian Vaussard]

Add the AT24C01 EEPROM node populated on most Gumstix expansion board.

Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
---
 arch/arm/boot/dts/omap3-overo-tobi-common.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
index caddb8c..b5e1b15 100644
--- a/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
@@ -60,6 +60,13 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c3_pins>;
 	clock-frequency = <100000>;
+
+	/* optional 1K EEPROM with revision information */
+	eeprom at 51 {
+		compatible = "atmel,24c01";
+		reg = <0x51>;
+		pagesize = <8>;
+	};
 };
 
 &mmc3 {
-- 
1.8.3.2