[PATCH] Disable Subpage nand write when using Atmel PMECC

[PATCH] Disable Subpage nand write when using Atmel PMECC

[Herve Codina]

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
(nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller.
As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
order to disable sub page access in nand_write_page.


Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
---
 drivers/mtd/nand/atmel_nand.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 1f719e0..4ce181a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
 		goto err;
 	}
 
+	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
 	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
 	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
 
-- 
1.7.9.5

[PATCH] Disable Subpage nand write when using Atmel PMECC

[Josh Wu]

Dear Herve

I add the Brian in the email, who is the maintainer of the mtd.

On 3/3/2014 7:15 PM, Herve Codina wrote:
> Crash detected on sam5d35 and its pmecc nand ecc controller.
>
> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> (nand_base.c) when we write a sub page.
> chip->ecc.hwctl function is not set when we are using PMECC controller.
> As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> order to disable sub page access in nand_write_page.
>
>
> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>

Acked-by: Josh Wu <josh.wu@atmel.com>

> ---
>   drivers/mtd/nand/atmel_nand.c |    1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 1f719e0..4ce181a 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
>   		goto err;
>   	}
>   
> +	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
>   	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
>   	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
>   

Best Regards,
Josh Wu

[PATCH] Disable Subpage nand write when using Atmel PMECC

[Brian Norris]

On Fri, Mar 07, 2014 at 11:59:46AM +0800, Josh Wu wrote:
> On 3/3/2014 7:15 PM, Herve Codina wrote:
> >Crash detected on sam5d35 and its pmecc nand ecc controller.
> >
> >The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> >(nand_base.c) when we write a sub page.
> >chip->ecc.hwctl function is not set when we are using PMECC controller.
> >As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> >order to disable sub page access in nand_write_page.
> >
> >
> >Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
> 
> Acked-by: Josh Wu <josh.wu@atmel.com>

Pushed to l2-mtd.git. Thanks!

Brian

[PATCH] Disable Subpage nand write when using Atmel PMECC

[Josh Wu]

Hi, Brian

On 3/7/2014 4:02 PM, Brian Norris wrote:
> On Fri, Mar 07, 2014 at 11:59:46AM +0800, Josh Wu wrote:
>> On 3/3/2014 7:15 PM, Herve Codina wrote:
>>> Crash detected on sam5d35 and its pmecc nand ecc controller.
>>>
>>> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
>>> (nand_base.c) when we write a sub page.
>>> chip->ecc.hwctl function is not set when we are using PMECC controller.
>>> As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
>>> order to disable sub page access in nand_write_page.
>>>
>>>
>>> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
>> Acked-by: Josh Wu <josh.wu@atmel.com>
> Pushed to l2-mtd.git. Thanks!

Sorry for the later thought. But I think this patch should go to the 
stable Linux branch
since any subpage write will cause crash in SAMA5D3 and AT91SAM9X5.
So is it possible to add a tag: "Cc: stable at vger.kernel.org" for this 
commit?

Best Regards,
Josh Wu

>
> Brian

[PATCH] Disable Subpage nand write when using Atmel PMECC

[Brian Norris]

On Tue, Mar 11, 2014 at 11:07:57AM +0800, Josh Wu wrote:
> On 3/7/2014 4:02 PM, Brian Norris wrote:
> >On Fri, Mar 07, 2014 at 11:59:46AM +0800, Josh Wu wrote:
> >>On 3/3/2014 7:15 PM, Herve Codina wrote:
> >>>Crash detected on sam5d35 and its pmecc nand ecc controller.
> >>>
> >>>The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> >>>(nand_base.c) when we write a sub page.
> >>>chip->ecc.hwctl function is not set when we are using PMECC controller.
> >>>As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> >>>order to disable sub page access in nand_write_page.
> >>>
> >>>
> >>>Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
> >>Acked-by: Josh Wu <josh.wu@atmel.com>
> >Pushed to l2-mtd.git. Thanks!
> 
> Sorry for the later thought. But I think this patch should go to the
> stable Linux branch
> since any subpage write will cause crash in SAMA5D3 and AT91SAM9X5.
> So is it possible to add a tag: "Cc: stable at vger.kernel.org" for
> this commit?

Done, thanks for mentioning it! I was thinking of this when I applied
it, actually.

Brian