[PATCH v2 0/3] ARM: add initial support for the Marvell BG2-Q DMP

[PATCH v2 0/3] ARM: add initial support for the Marvell BG2-Q DMP

[Antoine Ténart]

This serie adds the initial support for the Marvell BG2-Q DMP (part of the
Berlin family). SoC has nodes for cpu, l2 cache controller, interrupt
controllers, local timer, apb timers and uarts for now.

Homepage: http://www.marvell.com/digital-entertainment/armada-1500-pro/

Changes since v1:
        - removed duplicated label and hierarchy from the Marvell BG2-Q DMP
          device tree
        - updated the memory size
        - added more information in commit logs
        - shorted nodes by address
        - fixed clocks cells config
        - renamed the Marvell BG2-Q DMP device tree
        - moved documentation changes into a single patch
        - fixed documentation typo

Antoine T?nart (3):
  ARM: dts: berlin2q: add the Marvell Armada 1500 pro
  ARM: berlin2q: add the Marvell Armada 1500 pro in the documentation
  ARM: dts: berlin2q: add the Marvell BG2-Q DMP device tree

 Documentation/arm/Marvell/README                   |   5 +
 .../devicetree/bindings/arm/marvell,berlin.txt     |   1 +
 arch/arm/boot/dts/Makefile                         |   3 +-
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts         |  28 ++++
 arch/arm/boot/dts/berlin2q.dtsi                    | 167 +++++++++++++++++++++
 5 files changed, 203 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/berlin2q-marvell-dmp.dts
 create mode 100644 arch/arm/boot/dts/berlin2q.dtsi

-- 
1.8.3.2

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Antoine Ténart]

Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
 arch/arm/boot/dts/berlin2q.dtsi | 167 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 167 insertions(+)
 create mode 100644 arch/arm/boot/dts/berlin2q.dtsi

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
new file mode 100644
index 000000000000..1cb76031dfe6
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -0,0 +1,167 @@
+/*
+ * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "skeleton.dtsi"
+
+/ {
+	model = "Marvell Armada 1500 pro (BG2-Q) SoC";
+	compatible = "marvell,berlin2q", "marvell,berlin";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			next-level-cache = <&l2>;
+			reg = <0>;
+		};
+
+		cpu at 1 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			next-level-cache = <&l2>;
+			reg = <1>;
+		};
+
+		cpu at 2 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			next-level-cache = <&l2>;
+			reg = <2>;
+		};
+
+		cpu at 3 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			next-level-cache = <&l2>;
+			reg = <3>;
+		};
+	};
+
+	clocks {
+		#address-cells = <0>;
+		#size-cells = <0>;
+
+		smclk: sysmgr-clock {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <25000000>;
+		};
+
+		sysclk: system-clock {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <400000000>;
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0 0xf7000000 0x1000000>;
+		interrupt-parent = <&gic>;
+
+		l2: l2-cache-controller at ac0000 {
+			compatible = "arm,pl310-cache";
+			reg = <0xac0000 0x1000>;
+			cache-level = <2>;
+		};
+
+		local-timer at ad0600 {
+			compatible = "arm,cortex-a9-twd-timer";
+			reg = <0xad0600 0x20>;
+			clocks = <&sysclk>;
+			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
+		gic: interrupt-controller at ad1000 {
+			compatible = "arm,cortex-a9-gic";
+			reg = <0xad1000 0x1000>, <0xad0100 0x100>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		apb at e80000 {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ranges = <0 0xe80000 0x10000>;
+			interrupt-parent = <&aic>;
+
+			timer0: timer at 2c00 {
+				compatible = "snps,dw-apb-timer";
+				reg = <0x2c00 0x14>;
+				interrupts = <8>;
+				clock-freq = <100000000>;
+				status = "okay";
+			};
+
+			timer1: timer at 2c14 {
+				compatible = "snps,dw-apb-timer";
+				reg = <0x2c14 0x14>;
+				clock-freq = <100000000>;
+				status = "disabled";
+			};
+
+			aic: interrupt-controller at 3800 {
+				compatible = "snps,dw-apb-ictl";
+				reg = <0x3800 0x30>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupt-parent = <&gic>;
+				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			};
+		};
+
+		apb at fc0000 {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ranges = <0 0xfc0000 0x10000>;
+			interrupt-parent = <&sic>;
+
+			uart0: uart at 9000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0x9000 0x100>;
+				interrupt-parent = <&sic>;
+				interrupts = <8>;
+				clock-frequency = <25000000>;
+				reg-shift = <2>;
+				status = "disabled";
+			};
+
+			uart1: uart at a000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0xa000 0x100>;
+				interrupt-parent = <&sic>;
+				interrupts = <9>;
+				clock-frequency = <25000000>;
+				reg-shift = <2>;
+				status = "disabled";
+			};
+
+			sic: interrupt-controller at e000 {
+				compatible = "snps,dw-apb-ictl";
+				reg = <0xe000 0x30>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupt-parent = <&gic>;
+				interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+			};
+		};
+	};
+};
-- 
1.8.3.2

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Mark Rutland]

On Thu, Mar 13, 2014 at 02:06:45PM +0000, Antoine T?nart wrote:
> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
> The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
> timer, apb timers and uarts for now.
> 
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
>  arch/arm/boot/dts/berlin2q.dtsi | 167 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 167 insertions(+)
>  create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
> 
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> new file mode 100644
> index 000000000000..1cb76031dfe6
> --- /dev/null
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -0,0 +1,167 @@
> +/*
> + * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +#include "skeleton.dtsi"
> +
> +/ {
> +	model = "Marvell Armada 1500 pro (BG2-Q) SoC";
> +	compatible = "marvell,berlin2q", "marvell,berlin";
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu at 0 {
> +			compatible = "arm,cortex-a9";
> +			device_type = "cpu";
> +			next-level-cache = <&l2>;
> +			reg = <0>;
> +		};
> +
> +		cpu at 1 {
> +			compatible = "arm,cortex-a9";
> +			device_type = "cpu";
> +			next-level-cache = <&l2>;
> +			reg = <1>;
> +		};
> +
> +		cpu at 2 {
> +			compatible = "arm,cortex-a9";
> +			device_type = "cpu";
> +			next-level-cache = <&l2>;
> +			reg = <2>;
> +		};
> +
> +		cpu at 3 {
> +			compatible = "arm,cortex-a9";
> +			device_type = "cpu";
> +			next-level-cache = <&l2>;
> +			reg = <3>;
> +		};
> +	};
> +
> +	clocks {
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +
> +		smclk: sysmgr-clock {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <25000000>;
> +		};
> +
> +		sysclk: system-clock {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <400000000>;
> +		};
> +	};

I am very much not keen on having container nodes like this.

A "clocks" container is non-standard, and not guarantee to probe. The
fact these clocks probe currently is an artifact of the current
organisation of Linux rather than any conscious decision.

The #address-cells and #size-cells properties are useless, as no
address space is defined. The node is not a simple-bus, has no ranges,
and doesn't have a compatible string that implies an address space.

Is there any reason you need to use a clocks container here and can't
put these directly under the root?

> +
> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		ranges = <0 0xf7000000 0x1000000>;
> +		interrupt-parent = <&gic>;
> +
> +		l2: l2-cache-controller at ac0000 {
> +			compatible = "arm,pl310-cache";
> +			reg = <0xac0000 0x1000>;
> +			cache-level = <2>;
> +		};
> +
> +		local-timer at ad0600 {
> +			compatible = "arm,cortex-a9-twd-timer";
> +			reg = <0xad0600 0x20>;
> +			clocks = <&sysclk>;
> +			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "okay";

Given that nodes are assumed by default to be okay, this can be dropped.

I think it only makes sense to have a status property in a common dtsi
where the value is "disabled".

Otherwise, this dtsi looks sane to me.

Thanks,
Mark.

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Sebastian Hesselbarth]

On 03/13/2014 03:06 PM, Antoine T?nart wrote:
> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
> The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
> timer, apb timers and uarts for now.
>
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
>   arch/arm/boot/dts/berlin2q.dtsi | 167 ++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 167 insertions(+)
>   create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> new file mode 100644
> index 000000000000..1cb76031dfe6
> --- /dev/null
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
[...]
> +	clocks {
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +
> +		smclk: sysmgr-clock {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <25000000>;
> +		};
> +
> +		sysclk: system-clock {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <400000000>;
> +		};
> +	};
> +
> +	soc {
[...]
> +		local-timer at ad0600 {
> +			compatible = "arm,cortex-a9-twd-timer";
> +			reg = <0xad0600 0x20>;
> +			clocks = <&sysclk>;

If I understand Jisheng correctly, this should be cpuclk/3. When
removing the clocks {} container above, please also take care of
it.

You can do

cpuclk: cpu-clock {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <1200000000>; /* <- put correct freq here */
};

sysclk: system-clock {
	compatible = "fixed-factor-clock";
	#clock-cells = <0>;
	clocks = <&cpuclk>;
	clock-multi = <1>;
	clock-div = <3>;
};

Hopefully, we'll have proper clock drivers soon so we can just replace
referenced "fixed-*" clocks.

> +			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "okay";

As Mark Rutland mentioned, get rid of status = "okay" in dtsi.

> +		};
> +
[...]
> +		apb at e80000 {
> +			compatible = "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ranges = <0 0xe80000 0x10000>;
> +			interrupt-parent = <&aic>;
> +
> +			timer0: timer at 2c00 {
> +				compatible = "snps,dw-apb-timer";
> +				reg = <0x2c00 0x14>;
> +				interrupts = <8>;
> +				clock-freq = <100000000>;
> +				status = "okay";
> +			};
> +
> +			timer1: timer at 2c14 {
> +				compatible = "snps,dw-apb-timer";
> +				reg = <0x2c14 0x14>;
> +				clock-freq = <100000000>;
> +				status = "disabled";
> +			};

Please also add the remaining 6 apb timers.

Sebastian

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Antoine Ténart]

Sebastian,

On 14/03/2014 10:31, Sebastian Hesselbarth wrote:
> On 03/13/2014 03:06 PM, Antoine T?nart wrote:
>> +    clocks {
>> +        #address-cells = <0>;
>> +        #size-cells = <0>;
>> +
>> +        smclk: sysmgr-clock {
>> +            compatible = "fixed-clock";
>> +            #clock-cells = <0>;
>> +            clock-frequency = <25000000>;
>> +        };
>> +
>> +        sysclk: system-clock {
>> +            compatible = "fixed-clock";
>> +            #clock-cells = <0>;
>> +            clock-frequency = <400000000>;
>> +        };
>> +    };
>> +
>> +    soc {
> [...]
>> +        local-timer at ad0600 {
>> +            compatible = "arm,cortex-a9-twd-timer";
>> +            reg = <0xad0600 0x20>;
>> +            clocks = <&sysclk>;
>
> If I understand Jisheng correctly, this should be cpuclk/3. When
> removing the clocks {} container above, please also take care of
> it.
>
> You can do
>
> cpuclk: cpu-clock {
>      compatible = "fixed-clock";
>      #clock-cells = <0>;
>      clock-frequency = <1200000000>; /* <- put correct freq here */
> };
>
> sysclk: system-clock {
>      compatible = "fixed-factor-clock";
>      #clock-cells = <0>;
>      clocks = <&cpuclk>;
>      clock-multi = <1>;
>      clock-div = <3>;
> };
>
> Hopefully, we'll have proper clock drivers soon so we can just replace
> referenced "fixed-*" clocks.

Sure, this is why I only kept one fixed clock in this patch.

I'll add the cpuclk here then.

>> +            timer0: timer at 2c00 {
>> +                compatible = "snps,dw-apb-timer";
>> +                reg = <0x2c00 0x14>;
>> +                interrupts = <8>;
>> +                clock-freq = <100000000>;
>> +                status = "okay";
>> +            };
>> +
>> +            timer1: timer at 2c14 {
>> +                compatible = "snps,dw-apb-timer";
>> +                reg = <0x2c14 0x14>;
>> +                clock-freq = <100000000>;
>> +                status = "disabled";
>> +            };
>
> Please also add the remaining 6 apb timers.

I don't have any information about the remaining 6 apb timers. I'll ask 
Jisheng.


Antoine

-- 
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Sebastian Hesselbarth]

On 03/14/2014 10:48 AM, Antoine T?nart wrote:
> On 14/03/2014 10:31, Sebastian Hesselbarth wrote:
>> On 03/13/2014 03:06 PM, Antoine T?nart wrote:
>>> +    clocks {
>>> +        #address-cells = <0>;
>>> +        #size-cells = <0>;
>>> +
>>> +        smclk: sysmgr-clock {
>>> +            compatible = "fixed-clock";
>>> +            #clock-cells = <0>;
>>> +            clock-frequency = <25000000>;
>>> +        };
>>> +
>>> +        sysclk: system-clock {
>>> +            compatible = "fixed-clock";
>>> +            #clock-cells = <0>;
>>> +            clock-frequency = <400000000>;
>>> +        };
>>> +    };
>>> +
>>> +    soc {
>> [...]
>>> +        local-timer at ad0600 {
>>> +            compatible = "arm,cortex-a9-twd-timer";
>>> +            reg = <0xad0600 0x20>;
>>> +            clocks = <&sysclk>;
>>
>> If I understand Jisheng correctly, this should be cpuclk/3. When
>> removing the clocks {} container above, please also take care of
>> it.
>>
>> You can do
>>
>> cpuclk: cpu-clock {
>>      compatible = "fixed-clock";
>>      #clock-cells = <0>;
>>      clock-frequency = <1200000000>; /* <- put correct freq here */
>> };
>>
>> sysclk: system-clock {
>>      compatible = "fixed-factor-clock";
>>      #clock-cells = <0>;
>>      clocks = <&cpuclk>;
>>      clock-multi = <1>;
>>      clock-div = <3>;
>> };
>>
>> Hopefully, we'll have proper clock drivers soon so we can just replace
>> referenced "fixed-*" clocks.
>
> Sure, this is why I only kept one fixed clock in this patch.
>
> I'll add the cpuclk here then.
>
>>> +            timer0: timer at 2c00 {
>>> +                compatible = "snps,dw-apb-timer";
>>> +                reg = <0x2c00 0x14>;
>>> +                interrupts = <8>;
>>> +                clock-freq = <100000000>;
>>> +                status = "okay";
>>> +            };
>>> +
>>> +            timer1: timer at 2c14 {
>>> +                compatible = "snps,dw-apb-timer";
>>> +                reg = <0x2c14 0x14>;
>>> +                clock-freq = <100000000>;
>>> +                status = "disabled";
>>> +            };
>>
>> Please also add the remaining 6 apb timers.
>
> I don't have any information about the remaining 6 apb timers. I'll ask
> Jisheng.

He replied to v1 of this patch with

"We still have 8 apb timers"

Sebastian

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Alexandre Belloni]

On 14/03/2014 at 10:31:55 +0100, Sebastian Hesselbarth wrote :
> On 03/13/2014 03:06 PM, Antoine T?nart wrote:
> >+		local-timer at ad0600 {
> >+			compatible = "arm,cortex-a9-twd-timer";
> >+			reg = <0xad0600 0x20>;
> >+			clocks = <&sysclk>;
> 
> If I understand Jisheng correctly, this should be cpuclk/3. When
> removing the clocks {} container above, please also take care of
> it.
> 

You understood correctly

> You can do
> 
> cpuclk: cpu-clock {
> 	compatible = "fixed-clock";
> 	#clock-cells = <0>;
> 	clock-frequency = <1200000000>; /* <- put correct freq here */
> };
> 
> sysclk: system-clock {
> 	compatible = "fixed-factor-clock";
> 	#clock-cells = <0>;
> 	clocks = <&cpuclk>;
> 	clock-multi = <1>;
> 	clock-div = <3>;
> };
> 
> Hopefully, we'll have proper clock drivers soon so we can just replace
> referenced "fixed-*" clocks.
> 

I'm working on that, do you have some code that you can share right now ?

-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH v2 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro

[Sebastian Hesselbarth]

On 03/14/2014 12:32 PM, Alexandre Belloni wrote:
> On 14/03/2014 at 10:31:55 +0100, Sebastian Hesselbarth wrote :
>> On 03/13/2014 03:06 PM, Antoine T?nart wrote:
>>> +		local-timer at ad0600 {
>>> +			compatible = "arm,cortex-a9-twd-timer";
>>> +			reg = <0xad0600 0x20>;
>>> +			clocks = <&sysclk>;
>>
>> If I understand Jisheng correctly, this should be cpuclk/3. When
>> removing the clocks {} container above, please also take care of
>> it.
>>
>
> You understood correctly
>
>> You can do
>>
>> cpuclk: cpu-clock {
>> 	compatible = "fixed-clock";
>> 	#clock-cells = <0>;
>> 	clock-frequency = <1200000000>; /* <- put correct freq here */
>> };
>>
>> sysclk: system-clock {
>> 	compatible = "fixed-factor-clock";
>> 	#clock-cells = <0>;
>> 	clocks = <&cpuclk>;
>> 	clock-multi = <1>;
>> 	clock-div = <3>;
>> };
>>
>> Hopefully, we'll have proper clock drivers soon so we can just replace
>> referenced "fixed-*" clocks.
>>
>
> I'm working on that, do you have some code that you can share right now ?

No, nothing specific. You can have a look at drivers/clk/mvebu/ and see
how we deal with it on mvebu. For now, you can stick with bg2q and I'll
see how we extend that drivers for bg2/bg2cd then.

BTW: We really enjoy having a mvebu subfolder in drivers/clk as it makes
things easier. If you prepare any clk drivers for berlin, I'd suggest to
put them in drivers/clk/berlin from the beginning.

Sebastian

[PATCH v2 2/3] ARM: berlin2q: add the Marvell Armada 1500 pro in the documentation

[Antoine Ténart]

Adds basic informations about the Armada 1500 Pro in the Berlin family of the
Marvell ARM SoC documentation and the Armada 1500 Pro SoC compatible in the
related device tree documentation.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 Documentation/arm/Marvell/README                         | 5 +++++
 Documentation/devicetree/bindings/arm/marvell,berlin.txt | 1 +
 2 files changed, 6 insertions(+)

diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index 5a930c1528ad..eb6f212625f9 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -224,6 +224,11 @@ Berlin family (Digital Entertainment)
 		Core:		Marvell PJ4B (ARMv7), Tauros3 L2CC
 		Homepage:	http://www.marvell.com/digital-entertainment/armada-1500/
 		Product Brief:	http://www.marvell.com/digital-entertainment/armada-1500/assets/Marvell-ARMADA-1500-Product-Brief.pdf
+	88DE3114, Armada 1500 Pro
+		Design name:	BG2-Q
+		Core:		Quad Core ARM Cortex-A9, PL310 L2CC
+		Homepage:	http://www.marvell.com/digital-entertainment/armada-1500-pro/
+		Product Brief:	http://www.marvell.com/digital-entertainment/armada-1500-pro/assets/Marvell_ARMADA_1500_PRO-01_product_brief.pdf
 	88DE????
 		Design name:	BG3
 		Core:		ARM Cortex-A15, CA15 integrated L2CC
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
index 737afa5f8148..86b7f60c74fc 100644
--- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -11,6 +11,7 @@ In addition, the above compatible shall be extended with the specific
 SoC and board used. Currently known SoC compatibles are:
     "marvell,berlin2"      for Marvell Armada 1500 (BG2, 88DE3100),
     "marvell,berlin2cd"    for Marvell Armada 1500-mini (BG2CD, 88DE3005)
+    "marvell,berlin2q"     for Marvell Armada 1500-pro (BG2Q, 88DE3114)
     "marvell,berlin2ct"    for Marvell Armada ? (BG2CT, 88DE????)
     "marvell,berlin3"      for Marvell Armada ? (BG3, 88DE????)
 
-- 
1.8.3.2

[PATCH v2 3/3] ARM: dts: berlin2q: add the Marvell BG2-Q DMP device tree

[Antoine Ténart]

Adds initial support for the Marvell BG2-Q DMP. The board has 2GB of
memory, an uart activated and what's initially supported by the Marvell
Armada 1500 pro dtsi.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 arch/arm/boot/dts/Makefile                 |  3 ++-
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 28 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/berlin2q-marvell-dmp.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 032030361bef..4a1c0cf01b93 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -52,7 +52,8 @@ dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BERLIN) += \
 	berlin2-sony-nsz-gs7.dtb	\
-	berlin2cd-google-chromecast.dtb
+	berlin2cd-google-chromecast.dtb	\
+	berlin2q-marvell-dmp.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
 	da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
new file mode 100644
index 000000000000..2da9c41e29d8
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "berlin2q.dtsi"
+
+/ {
+	model = "Marvell BG2-Q DMP";
+	compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000>;
+	};
+
+	choosen {
+		bootargs = "console=ttyS0,115200 earlyprintk";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
1.8.3.2