From mboxrd@z Thu Jan 1 00:00:00 1970 From: santosh.shilimkar@ti.com (Santosh Shilimkar) Date: Thu, 20 Mar 2014 14:02:39 -0400 Subject: [PATCH 2/3] mtd: davinci-nand: add dts property for NAND_NO_SUBPAGE_WRITE option In-Reply-To: References: <1395335184-4745-1-git-send-email-ivan.khoronzhuk@ti.com> <1395335184-4745-3-git-send-email-ivan.khoronzhuk@ti.com> <532B2183.2080309@ti.com> <20140320172912.GW31517@norris-Latitude-E6410> <532B2766.6090506@ti.com> Message-ID: <532B2D3F.6050004@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thursday 20 March 2014 01:44 PM, Warner Losh wrote: > > On Mar 20, 2014, at 11:37 AM, Santosh Shilimkar wrote: > >> >> >> On Thursday 20 March 2014 01:29 PM, Brian Norris wrote: >>> On Thu, Mar 20, 2014 at 01:12:35PM -0400, Santosh Shilimkar wrote: >>>> Boris, >>> >>> Who's Boris? And why should Boris be taking this patch? It's an MTD >>> patch. >>> >> I got your name completely wrong. Sorry.... >> >>>> On Thursday 20 March 2014 01:06 PM, Ivan Khoronzhuk wrote: >>>>> From: Murali Karicheri >>>>> >>>>> After testing NAND flash with ubifs for k2hk-emv board were committed >>>>> that flash doesn't support subpage writing, so we can fix it by >>>>> adding a property to disable subpage write. >>> >>> What flash? We try to autodetect NAND as much as possible. Perhaps we >>> should be adding infrastructure support instead of hacking it with a DT >>> property. >>> >> We can't auto detect it and thats why the DT approach was taken. We >> will double check that. > > I though sub page writing was one of the fields in the onfi and/or jedec(toggle) meta data structures. Have you looked there? > Am not sure if I follow you. The limitation is from the TI NAND controller(AEMIF) and not the NAND memory. regards, Santosh