* [arm-platforms:irq/irqchip-next 5/28] drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'?
@ 2020-01-20 18:59 kbuild test robot
2020-01-20 19:09 ` Marc Zyngier
0 siblings, 1 reply; 3+ messages in thread
From: kbuild test robot @ 2020-01-20 18:59 UTC (permalink / raw)
To: Yash Shah
Cc: kbuild-all, Bartosz Golaszewski, Marc Zyngier, Linus Walleij,
Atish Patra, Wesley W. Terpstra, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 9059 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git irq/irqchip-next
head: c7f5b05c27a8501dc5a88bab49b6010e375e91f8
commit: cd2abc8e87fef699d0da106103b65f6ca8dcbfe7 [5/28] gpio/sifive: Add GPIO driver for SiFive SoCs
config: c6x-randconfig-a001-20200121 (attached as .config)
compiler: c6x-elf-gcc (GCC) 7.5.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout cd2abc8e87fef699d0da106103b65f6ca8dcbfe7
# save the attached .config to linux build tree
GCC_VERSION=7.5.0 make.cross ARCH=c6x
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpio/gpio-sifive.c: In function 'sifive_gpio_irq_enable':
>> drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'? [-Werror=implicit-function-declaration]
irq_chip_enable_parent(d);
^~~~~~~~~~~~~~~~~~~~~~
gpiochip_enable_irq
drivers/gpio/gpio-sifive.c: In function 'sifive_gpio_irq_disable':
>> drivers/gpio/gpio-sifive.c:109:2: error: implicit declaration of function 'irq_chip_disable_parent'; did you mean 'gpiochip_disable_irq'? [-Werror=implicit-function-declaration]
irq_chip_disable_parent(d);
^~~~~~~~~~~~~~~~~~~~~~~
gpiochip_disable_irq
drivers/gpio/gpio-sifive.c: In function 'sifive_gpio_irq_eoi':
>> drivers/gpio/gpio-sifive.c:128:2: error: implicit declaration of function 'irq_chip_eoi_parent'; did you mean 'irq_chip_pm_put'? [-Werror=implicit-function-declaration]
irq_chip_eoi_parent(d);
^~~~~~~~~~~~~~~~~~~
irq_chip_pm_put
drivers/gpio/gpio-sifive.c: At top level:
>> drivers/gpio/gpio-sifive.c:134:14: error: 'irq_chip_mask_parent' undeclared here (not in a function); did you mean 'irq_chip_pm_put'?
.irq_mask = irq_chip_mask_parent,
^~~~~~~~~~~~~~~~~~~~
irq_chip_pm_put
>> drivers/gpio/gpio-sifive.c:135:16: error: 'irq_chip_unmask_parent' undeclared here (not in a function); did you mean 'irq_chip_mask_parent'?
.irq_unmask = irq_chip_unmask_parent,
^~~~~~~~~~~~~~~~~~~~~~
irq_chip_mask_parent
drivers/gpio/gpio-sifive.c: In function 'sifive_gpio_probe':
>> drivers/gpio/gpio-sifive.c:229:6: error: 'struct gpio_irq_chip' has no member named 'fwnode'
girq->fwnode = of_node_to_fwnode(node);
^~
>> drivers/gpio/gpio-sifive.c:230:8: error: 'struct gpio_irq_chip' has no member named 'parent_domain'; did you mean 'parent_handler'?
girq->parent_domain = parent;
^~~~~~~~~~~~~
parent_handler
>> drivers/gpio/gpio-sifive.c:231:6: error: 'struct gpio_irq_chip' has no member named 'child_to_parent_hwirq'
girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;
^~
cc1: some warnings being treated as errors
vim +83 drivers/gpio/gpio-sifive.c
74
75 static void sifive_gpio_irq_enable(struct irq_data *d)
76 {
77 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
78 struct sifive_gpio *chip = gpiochip_get_data(gc);
79 int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
80 u32 bit = BIT(offset);
81 unsigned long flags;
82
> 83 irq_chip_enable_parent(d);
84
85 /* Switch to input */
86 gc->direction_input(gc, offset);
87
88 spin_lock_irqsave(&gc->bgpio_lock, flags);
89 /* Clear any sticky pending interrupts */
90 regmap_write(chip->regs, SIFIVE_GPIO_RISE_IP, bit);
91 regmap_write(chip->regs, SIFIVE_GPIO_FALL_IP, bit);
92 regmap_write(chip->regs, SIFIVE_GPIO_HIGH_IP, bit);
93 regmap_write(chip->regs, SIFIVE_GPIO_LOW_IP, bit);
94 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
95
96 /* Enable interrupts */
97 assign_bit(offset, (unsigned long *)&chip->irq_state, 1);
98 sifive_gpio_set_ie(chip, offset);
99 }
100
101 static void sifive_gpio_irq_disable(struct irq_data *d)
102 {
103 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
104 struct sifive_gpio *chip = gpiochip_get_data(gc);
105 int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
106
107 assign_bit(offset, (unsigned long *)&chip->irq_state, 0);
108 sifive_gpio_set_ie(chip, offset);
> 109 irq_chip_disable_parent(d);
110 }
111
112 static void sifive_gpio_irq_eoi(struct irq_data *d)
113 {
114 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
115 struct sifive_gpio *chip = gpiochip_get_data(gc);
116 int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
117 u32 bit = BIT(offset);
118 unsigned long flags;
119
120 spin_lock_irqsave(&gc->bgpio_lock, flags);
121 /* Clear all pending interrupts */
122 regmap_write(chip->regs, SIFIVE_GPIO_RISE_IP, bit);
123 regmap_write(chip->regs, SIFIVE_GPIO_FALL_IP, bit);
124 regmap_write(chip->regs, SIFIVE_GPIO_HIGH_IP, bit);
125 regmap_write(chip->regs, SIFIVE_GPIO_LOW_IP, bit);
126 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
127
> 128 irq_chip_eoi_parent(d);
129 }
130
131 static struct irq_chip sifive_gpio_irqchip = {
132 .name = "sifive-gpio",
133 .irq_set_type = sifive_gpio_irq_set_type,
> 134 .irq_mask = irq_chip_mask_parent,
> 135 .irq_unmask = irq_chip_unmask_parent,
136 .irq_enable = sifive_gpio_irq_enable,
137 .irq_disable = sifive_gpio_irq_disable,
138 .irq_eoi = sifive_gpio_irq_eoi,
139 };
140
141 static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
142 unsigned int child,
143 unsigned int child_type,
144 unsigned int *parent,
145 unsigned int *parent_type)
146 {
147 *parent_type = IRQ_TYPE_NONE;
148 *parent = child + SIFIVE_GPIO_IRQ_OFFSET;
149 return 0;
150 }
151
152 static const struct regmap_config sifive_gpio_regmap_config = {
153 .reg_bits = 32,
154 .reg_stride = 4,
155 .val_bits = 32,
156 .fast_io = true,
157 .disable_locking = true,
158 };
159
160 static int sifive_gpio_probe(struct platform_device *pdev)
161 {
162 struct device *dev = &pdev->dev;
163 struct device_node *node = pdev->dev.of_node;
164 struct device_node *irq_parent;
165 struct irq_domain *parent;
166 struct gpio_irq_chip *girq;
167 struct sifive_gpio *chip;
168 int ret, ngpio;
169
170 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
171 if (!chip)
172 return -ENOMEM;
173
174 chip->base = devm_platform_ioremap_resource(pdev, 0);
175 if (IS_ERR(chip->base)) {
176 dev_err(dev, "failed to allocate device memory\n");
177 return PTR_ERR(chip->base);
178 }
179
180 chip->regs = devm_regmap_init_mmio(dev, chip->base,
181 &sifive_gpio_regmap_config);
182 if (IS_ERR(chip->regs))
183 return PTR_ERR(chip->regs);
184
185 ngpio = of_irq_count(node);
186 if (ngpio >= SIFIVE_GPIO_MAX) {
187 dev_err(dev, "Too many GPIO interrupts (max=%d)\n",
188 SIFIVE_GPIO_MAX);
189 return -ENXIO;
190 }
191
192 irq_parent = of_irq_find_parent(node);
193 if (!irq_parent) {
194 dev_err(dev, "no IRQ parent node\n");
195 return -ENODEV;
196 }
197 parent = irq_find_host(irq_parent);
198 if (!parent) {
199 dev_err(dev, "no IRQ parent domain\n");
200 return -ENODEV;
201 }
202
203 ret = bgpio_init(&chip->gc, dev, 4,
204 chip->base + SIFIVE_GPIO_INPUT_VAL,
205 chip->base + SIFIVE_GPIO_OUTPUT_VAL,
206 NULL,
207 chip->base + SIFIVE_GPIO_OUTPUT_EN,
208 chip->base + SIFIVE_GPIO_INPUT_EN,
209 0);
210 if (ret) {
211 dev_err(dev, "unable to init generic GPIO\n");
212 return ret;
213 }
214
215 /* Disable all GPIO interrupts before enabling parent interrupts */
216 regmap_write(chip->regs, SIFIVE_GPIO_RISE_IE, 0);
217 regmap_write(chip->regs, SIFIVE_GPIO_FALL_IE, 0);
218 regmap_write(chip->regs, SIFIVE_GPIO_HIGH_IE, 0);
219 regmap_write(chip->regs, SIFIVE_GPIO_LOW_IE, 0);
220 chip->irq_state = 0;
221
222 chip->gc.base = -1;
223 chip->gc.ngpio = ngpio;
224 chip->gc.label = dev_name(dev);
225 chip->gc.parent = dev;
226 chip->gc.owner = THIS_MODULE;
227 girq = &chip->gc.irq;
228 girq->chip = &sifive_gpio_irqchip;
> 229 girq->fwnode = of_node_to_fwnode(node);
> 230 girq->parent_domain = parent;
> 231 girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;
232 girq->handler = handle_bad_irq;
233 girq->default_type = IRQ_TYPE_NONE;
234
235 platform_set_drvdata(pdev, chip);
236 return gpiochip_add_data(&chip->gc, chip);
237 }
238
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
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_______________________________________________
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [arm-platforms:irq/irqchip-next 5/28] drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'?
2020-01-20 18:59 [arm-platforms:irq/irqchip-next 5/28] drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'? kbuild test robot
@ 2020-01-20 19:09 ` Marc Zyngier
2020-01-23 15:23 ` Linus Walleij
0 siblings, 1 reply; 3+ messages in thread
From: Marc Zyngier @ 2020-01-20 19:09 UTC (permalink / raw)
To: kbuild test robot, Yash Shah
Cc: kbuild-all, Atish Patra, Wesley W. Terpstra, Linus Walleij,
Bartosz Golaszewski, linux-arm-kernel
Yash,
On 2020-01-20 18:59, kbuild test robot wrote:
> tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
> irq/irqchip-next
> head: c7f5b05c27a8501dc5a88bab49b6010e375e91f8
> commit: cd2abc8e87fef699d0da106103b65f6ca8dcbfe7 [5/28] gpio/sifive:
> Add GPIO driver for SiFive SoCs
> config: c6x-randconfig-a001-20200121 (attached as .config)
> compiler: c6x-elf-gcc (GCC) 7.5.0
> reproduce:
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
> -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> git checkout cd2abc8e87fef699d0da106103b65f6ca8dcbfe7
> # save the attached .config to linux build tree
> GCC_VERSION=7.5.0 make.cross ARCH=c6x
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot <lkp@intel.com>
>
> All errors (new ones prefixed by >>):
>
> drivers/gpio/gpio-sifive.c: In function 'sifive_gpio_irq_enable':
>>> drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of
>>> function 'irq_chip_enable_parent'; did you mean
>>> 'gpiochip_enable_irq'? [-Werror=implicit-function-declaration]
> irq_chip_enable_parent(d);
[...]
This is how I'm planning to fix this (at least for the time
being, as I don't want to break -next at this stage).
Let me know if you want to address it otherwise.
Thanks,
M.
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 6c63b79069f2..809dd54a2e82 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -481,7 +481,7 @@ config GPIO_SAMA5D2_PIOBU
config GPIO_SIFIVE
bool "SiFive GPIO support"
- depends on OF_GPIO
+ depends on OF_GPIO && IRQ_DOMAIN_HIERARCHY
select GPIO_GENERIC
select GPIOLIB_IRQCHIP
select REGMAP_MMIO
--
Jazz is not dead. It just smells funny...
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [arm-platforms:irq/irqchip-next 5/28] drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'?
2020-01-20 19:09 ` Marc Zyngier
@ 2020-01-23 15:23 ` Linus Walleij
0 siblings, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2020-01-23 15:23 UTC (permalink / raw)
To: Marc Zyngier
Cc: kbuild-all, kbuild test robot, Bartosz Golaszewski,
Wesley W. Terpstra, Atish Patra, Yash Shah, Linux ARM
On Mon, Jan 20, 2020 at 8:09 PM Marc Zyngier <maz@kernel.org> wrote:
> Yash,
(...)
> This is how I'm planning to fix this (at least for the time
> being, as I don't want to break -next at this stage).
(...)
> config GPIO_SIFIVE
> bool "SiFive GPIO support"
> - depends on OF_GPIO
> + depends on OF_GPIO && IRQ_DOMAIN_HIERARCHY
I would simply:
select IRQ_DOMAIN_HIERARCHY
Either way:
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-01-20 18:59 [arm-platforms:irq/irqchip-next 5/28] drivers/gpio/gpio-sifive.c:83:2: error: implicit declaration of function 'irq_chip_enable_parent'; did you mean 'gpiochip_enable_irq'? kbuild test robot
2020-01-20 19:09 ` Marc Zyngier
2020-01-23 15:23 ` Linus Walleij
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