From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 07/14] ARM: mvebu: Extend the pmsu registers
Date: Wed, 26 Mar 2014 10:33:50 +0100 [thread overview]
Message-ID: <53329EFE.4040705@free-electrons.com> (raw)
In-Reply-To: <20140326003027.GJ28304@titan.lakedaemon.net>
Hi Jason,
On 26/03/2014 01:30, Jason Cooper wrote:
> On Tue, Mar 25, 2014 at 11:48:18PM +0100, Gregory CLEMENT wrote:
>> The initial binding for PMSU were wrong. It didn't take into account
>> all the registers from the PMSU and moreover it referred to registers
>> which are not part of PMSU.
>>
>> The Power Management Unit Service block also controls the Coherency
>> Fabric subsystem. These registers are needed for the CPU idle
>> implementation for the Armada 370/XP, it allows to enter a deep CPU
>> idle state where the Coherency Fabric and the L2 cache are powered
>> down.
>>
>> This commit add support for a new compatible for the PMSU node
>> including the block related to the coherency fabric. It also keeps
>> compatibility with the old binding
>>
>> This patch also adds warnings if one of the base registers set can't
>> be ioremapped.
>>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> ---
>> arch/arm/mach-mvebu/pmsu.c | 47 +++++++++++++++++++++++++++++++++++++++++-----
>> 1 file changed, 42 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
>> index d71ef53107c4..865bcb651e01 100644
>> --- a/arch/arm/mach-mvebu/pmsu.c
>> +++ b/arch/arm/mach-mvebu/pmsu.c
>> @@ -27,11 +27,21 @@
>> static void __iomem *pmsu_mp_base;
>> static void __iomem *pmsu_reset_base;
>>
>> -#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x24)
>> +#define PMSU_BASE_OFFSET 0x100
>> +#define PMSU_REG_SIZE 0x1000
>> +
>> +#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
>> #define PMSU_RESET_CTL_OFFSET(cpu) (cpu * 0x8)
>>
>> static struct of_device_id of_pmsu_table[] = {
>> - {.compatible = "marvell,armada-370-xp-pmsu"},
>> + {
>> + .compatible = "marvell,armada-370-pmsu",
>> + .data = (void *) false,
>
> This looks sketchy to me.
Could you elaborate it?
For a boolean I didn't saw the point to use a pointer.
>
>> + },
>> + {
>> + .compatible = "marvell,armada-370-xp-pmsu",
>> + .data = (void *) true, /* legacy */
>
> Same.
>
>> + },
>> { /* end of list */ },
>> };
>>
>> @@ -59,15 +69,42 @@ int armada_xp_boot_cpu(unsigned int cpu_id, void *boot_addr)
>> }
>> #endif
>>
>> +static void __init armada_370_xp_pmsu_legacy_init(struct device_node *np)
>> +{
>> + u32 addr;
>> + pr_warn("*** Warning *** Using an old binding which will be deprecated\n");
>
> This should be noted in the binding docs...
>
>> + /* We just need the adress, we already know the size */
>
> nit. s/adress/address/
Thanks
>
>> + addr = be32_to_cpu(*of_get_address(np, 0, NULL, NULL));
>> + addr -= PMSU_BASE_OFFSET;
>> + pmsu_mp_base = ioremap(addr, PMSU_REG_SIZE);
>> + of_node_put(np);
>> +}
>> +
>> static int __init armada_370_xp_pmsu_init(void)
>> {
>> struct device_node *np;
>> -
>
> Please leave this empty line.
>
OK
>> np = of_find_matching_node(NULL, of_pmsu_table);
>> if (np) {
>> + const struct of_device_id *match =
>> + of_match_node(of_pmsu_table, np);
>> + BUG_ON(!match);
>> +
>> pr_info("Initializing Power Management Service Unit\n");
>> - pmsu_mp_base = of_iomap(np, 0);
>> - pmsu_reset_base = of_iomap(np, 1);
>> +
>> + if (match->data) /* legacy */
>> + armada_370_xp_pmsu_legacy_init(np);
>
> And if a new compatible string actually needs data passed?
in this case we would have to update the of_pmsu_table, so this
code could be also updated if needed in the same time. So I don't
see the problem, maybe I miss something.
But the plan is really to remove this legacy part later (after a
few kernel release)
>
>> + else
>> + pmsu_mp_base = of_iomap(np, 0);
>> + WARN_ON(!pmsu_mp_base);
>> + of_node_put(np);
>> +
>> + /*
>> + * This temporaty hack will be removed as soon as we
>
> nit. s/temporaty/temporary/
Thanks
>
> thx,
>
> Jason.
>
>> + * get the proper reset controler support
>> + */
>> + np = of_find_compatible_node(NULL, NULL, "marvell,armada-xp-cpu-reset");
>> + pmsu_reset_base = of_iomap(np, 0);
>> + WARN_ON(!pmsu_reset_base);
>> of_node_put(np);
>> }
>>
>> --
>> 1.8.1.2
>>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
next prev parent reply other threads:[~2014-03-26 9:33 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-25 22:48 [PATCH v5 00/14] CPU idle for Armada XP Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 01/14] ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 02/14] ARM: mvebu: remove the address parameter for ll_set_cpu_coherent Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 03/14] ARM: mvebu: ll_set_cpu_coherent always uses the current CPU Gregory CLEMENT
2014-03-26 11:52 ` Sebastian Hesselbarth
2014-03-26 11:51 ` Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 04/14] ARM: mvebu: Remove the unused argument of set_cpu_coherent() Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 05/14] ARM: mvebu: Split low level functions to manipulate HW coherency Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 06/14] ARM: mvebu: Low level function to disable HW coherency support Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 07/14] ARM: mvebu: Extend the pmsu registers Gregory CLEMENT
2014-03-26 0:30 ` Jason Cooper
2014-03-26 9:33 ` Gregory CLEMENT [this message]
2014-03-26 9:55 ` Sebastian Hesselbarth
2014-03-26 12:04 ` Sebastian Hesselbarth
2014-03-26 12:01 ` Gregory CLEMENT
2014-03-26 12:59 ` Thomas Petazzoni
2014-03-25 22:48 ` [PATCH v5 08/14] ARM: dts: mvebu: Introduce a new compatible for the PMSU node Gregory CLEMENT
2014-03-26 0:32 ` Jason Cooper
2014-03-25 22:48 ` [PATCH v5 09/14] ARM: mvebu: Allow to power down L2 cache controller in idle mode Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 10/14] ARM: mvebu: Add the PMSU related part of the cpu idle functions Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 11/14] ARM: mvebu: Set the start address of a CPU in a separate function Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 12/14] ARM: mvebu: Register notifier callback for the cpuidle transition Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 13/14] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC Gregory CLEMENT
2014-03-25 22:48 ` [PATCH v5 14/14] ARM: mvebu: register the cpuidle driver for the Armada XP SoCs Gregory CLEMENT
2014-03-26 10:30 ` Ezequiel Garcia
2014-03-26 10:31 ` Thomas Petazzoni
2014-03-26 10:38 ` Gregory CLEMENT
2014-03-26 0:42 ` [PATCH v5 00/14] CPU idle for Armada XP Jason Cooper
2014-03-26 9:53 ` Gregory CLEMENT
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