From mboxrd@z Thu Jan 1 00:00:00 1970 From: tomasz.figa@gmail.com (Tomasz Figa) Date: Thu, 01 May 2014 19:19:10 +0200 Subject: [PATCH 1/1] clk: exynos-5420: Fix VPLL lock offset In-Reply-To: References: <1394681222-27882-1-git-send-email-sachin.kamat@linaro.org> <53219C1C.1030501@samsung.com> Message-ID: <5362820E.6040101@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Sachin, On 01.05.2014 13:10, Sachin Kamat wrote: > Hi Tomasz, > > On 13 March 2014 20:27, Sachin Kamat wrote: >> On 13 March 2014 17:23, Tomasz Figa wrote: >>> Hi Sachin, >>> >>> >>> On 13.03.2014 04:27, Sachin Kamat wrote: >>>> >>>> Set it as per the user manual. >>>> >>>> Signed-off-by: Sachin Kamat >>>> --- >> >>> >>> Looks fine. Will queue for 3.15, since ATM there is no support for PLL rate >>> setting on Exynos 5420 (no rate tables registered). >> >> Yes, that is correct. Thanks Tomasz. > > Looks like this patch hasn't made it to mainline yet. > Unfortunately that's right. Due to problems with cross tree dependencies there was some fall out and I needed to requeue some patches for 3.16. Sorry for this. Best regards, Tomasz