[PATCH v2 0/6] ARM: berlin: add AHCI support

[PATCH v2 0/6] ARM: berlin: add AHCI support

[Antoine Ténart]

This series adds the support for Berlin SoCs AHCI controllers. The
controller allows to use the SATA host interface and, for example, the
eSATA port on the BG2Q.

The series adds a PHY driver to control the two SATA ports available.

Also enable the eSATA interface on the BG2Q DMP.

Changes since v1:
	- added a PHY driver, allowing to enable each port
	  individually and removed the 'force-port-map' property
	- made the drivers a bit less magic :)
	- wrote a function to select and configure registers in the
	  AHCI driver
	- removed BG2 / BG2CD nodes

Antoine T?nart (6):
  phy: add a driver for the Berlin SATA PHY
  Documentation: bindings: add the Berlin SATA PHY
  ata: ahci: add AHCI support for the Berlin BG2Q
  Documentation: bindings: add the berlin-ahci compatible to the ahci
    platform
  ARM: berlin: add the AHCI node for the BG2Q
  ARM: berlin: enable the eSATA interface on the BG2Q DMP

 .../devicetree/bindings/ata/ahci-berlin.txt        |  18 ++
 .../devicetree/bindings/phy/berlin-sata-phy.txt    |  15 ++
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts         |  10 +
 arch/arm/boot/dts/berlin2q.dtsi                    |  14 ++
 drivers/ata/Kconfig                                |  10 +
 drivers/ata/Makefile                               |   1 +
 drivers/ata/ahci_berlin.c                          | 202 +++++++++++++++++++++
 drivers/phy/Kconfig                                |   5 +
 drivers/phy/Makefile                               |   1 +
 drivers/phy/phy-berlin-sata.c                      | 179 ++++++++++++++++++
 10 files changed, 455 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-berlin.txt
 create mode 100644 Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
 create mode 100644 drivers/ata/ahci_berlin.c
 create mode 100644 drivers/phy/phy-berlin-sata.c

-- 
1.9.1

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Antoine Ténart]

The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 drivers/phy/Kconfig           |   5 ++
 drivers/phy/Makefile          |   1 +
 drivers/phy/phy-berlin-sata.c | 179 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 drivers/phy/phy-berlin-sata.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 4906c27fa3bd..b31b1986fda4 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -15,6 +15,11 @@ config GENERIC_PHY
 	  phy users can obtain reference to the PHY. All the users of this
 	  framework should select this config.
 
+config PHY_BERLIN_SATA
+	bool
+	depends on ARCH_BERLIN && OF
+	select GENERIC_PHY
+
 config PHY_EXYNOS_MIPI_VIDEO
 	tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
 	depends on HAS_IOMEM
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 7728518572a4..40278706ac1b 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_GENERIC_PHY)		+= phy-core.o
+obj-$(CONFIG_PHY_BERLIN_SATA)		+= phy-berlin-sata.o
 obj-$(CONFIG_BCM_KONA_USB2_PHY)		+= phy-bcm-kona-usb2.o
 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)	+= phy-exynos-dp-video.o
 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)	+= phy-exynos-mipi-video.o
diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
new file mode 100644
index 000000000000..f20f5ece1a7f
--- /dev/null
+++ b/drivers/phy/phy-berlin-sata.c
@@ -0,0 +1,179 @@
+/*
+ * Marvell Berlin SATA PHY driver
+ *
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine T?nart <antoine.tenart@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/phy/phy.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+
+#define HOST_VSA_ADDR		0x0
+#define HOST_VSA_DATA		0x4
+
+#define CONTROL_REGISTER	0x0
+#define MBUS_SIZE_CONTROL	0x4
+
+#define POWER_DOWN_SATA0		BIT(6)
+#define POWER_DOWN_SATA1		BIT(14)
+#define MBUS_WRITE_REQUEST_SIZE_128	(BIT(2) << 16)
+#define MBUS_READ_REQUEST_SIZE_128	(BIT(2) << 19)
+
+#define BERLIN_SATA_PHY_NB	2
+
+#define to_berlin_sata_phy_priv(desc)	\
+	container_of((desc), struct priv, phys[(desc)->index])
+
+struct phy_desc {
+	struct phy	*phy;
+	u32		val;
+	unsigned	index;
+};
+
+struct priv {
+	void __iomem	*base;
+	spinlock_t	lock;
+	struct phy_desc	phys[BERLIN_SATA_PHY_NB];
+};
+
+static int phy_berlin_sata_power_on(struct phy *phy)
+{
+	struct phy_desc *desc = phy_get_drvdata(phy);
+	struct priv *priv = to_berlin_sata_phy_priv(desc);
+	u32 regval;
+
+	spin_lock(&priv->lock);
+
+	/* Power up PHY */
+	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
+	regval = readl(priv->base + HOST_VSA_DATA);
+	regval &= ~(desc->val);
+	writel(regval, priv->base + HOST_VSA_DATA);
+
+	/* Configure MBus */
+	writel(MBUS_SIZE_CONTROL, priv->base + HOST_VSA_ADDR);
+	regval = readl(priv->base + HOST_VSA_DATA);
+	regval |= MBUS_WRITE_REQUEST_SIZE_128 | MBUS_READ_REQUEST_SIZE_128;
+	writel(regval, priv->base + HOST_VSA_DATA);
+
+	spin_unlock(&priv->lock);
+
+	return 0;
+}
+
+static int phy_berlin_sata_power_off(struct phy *phy)
+{
+	struct phy_desc *desc = phy_get_drvdata(phy);
+	struct priv *priv = to_berlin_sata_phy_priv(desc);
+	u32 regval;
+
+	spin_lock(&priv->lock);
+
+	/* Power down PHY */
+	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
+	regval = readl(priv->base + HOST_VSA_DATA);
+	regval |= desc->val;
+	writel(regval, priv->base + HOST_VSA_DATA);
+
+	spin_unlock(&priv->lock);
+
+	return 0;
+}
+
+static struct phy *berlin_sata_phy_xlate(struct device *dev,
+					 struct of_phandle_args *args)
+{
+	struct priv *priv = dev_get_drvdata(dev);
+
+	if (WARN_ON(args->args[0] >= BERLIN_SATA_PHY_NB))
+		return ERR_PTR(-ENODEV);
+
+	return priv->phys[args->args[0]].phy;
+}
+
+static struct phy_ops phy_berlin_sata_ops = {
+	.power_on	= phy_berlin_sata_power_on,
+	.power_off	= phy_berlin_sata_power_off,
+	.owner		= THIS_MODULE,
+};
+
+static struct phy_desc desc[] = {
+	{ .val = POWER_DOWN_SATA0 },
+	{ .val = POWER_DOWN_SATA1 },
+	{ },
+};
+
+static int phy_berlin_sata_probe(struct platform_device *pdev)
+{
+	struct phy *phy;
+	struct phy_provider *phy_provider;
+	struct priv *priv;
+	struct resource *res;
+	int i;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
+	if (IS_ERR(phy))
+		return PTR_ERR(phy);
+
+	dev_set_drvdata(&pdev->dev, priv);
+	spin_lock_init(&priv->lock);
+
+	for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {
+		struct phy *phy = devm_phy_create(&pdev->dev,
+						  &phy_berlin_sata_ops, NULL);
+		if (IS_ERR(phy)) {
+			dev_err(&pdev->dev, "failed to create PHY %d\n", i);
+			return PTR_ERR(phy);
+		}
+
+		priv->phys[i].phy = phy;
+		priv->phys[i].val = desc[i].val;
+		priv->phys[i].index = i;
+		phy_set_drvdata(phy, &priv->phys[i]);
+
+		/* Make sure the PHY is off */
+		phy_berlin_sata_power_off(phy);
+	}
+
+	phy_provider = devm_of_phy_provider_register(&pdev->dev,
+						     berlin_sata_phy_xlate);
+	if (IS_ERR(phy_provider))
+		return PTR_ERR(phy_provider);
+
+	return 0;
+}
+
+static const struct of_device_id phy_berlin_sata_of_match[] = {
+	{ .compatible = "marvell,berlin-sata-phy" },
+	{ },
+};
+
+static struct platform_driver phy_berlin_sata_driver = {
+	.probe	= phy_berlin_sata_probe,
+	.driver	= {
+		.name		= "phy-berlin-sata",
+		.owner		= THIS_MODULE,
+		.of_match_table	= phy_berlin_sata_of_match,
+	},
+};
+module_platform_driver(phy_berlin_sata_driver);
+
+MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
+MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
+MODULE_LICENSE("GPL");
-- 
1.9.1

[PATCH v2 2/6] Documentation: bindings: add the Berlin SATA PHY

[Antoine Ténart]

The Berlin SATA PHY drives the PHY related to the SATA interface and
allows to power up/down each PHY independently. Add the corresponding
documentation.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 Documentation/devicetree/bindings/phy/berlin-sata-phy.txt | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/berlin-sata-phy.txt

diff --git a/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt b/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
new file mode 100644
index 000000000000..6d1cf5e11cfc
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/berlin-sata-phy.txt
@@ -0,0 +1,15 @@
+Berlin SATA PHY
+---------------
+
+Required properties:
+- compatible: "marvell,berlin-sata-phy"
+- #phy-cells: from the generic PHY bindings, must be 1
+- reg: address and length of the register
+
+Example:
+	sata_phy0: phy at f7e900a0 {
+		compatible = "marvell,berlin-sata-phy";
+		reg = <0xf7e900a0 0x10>;
+		#phy-cells = <1>;
+		status = "okay";
+	};
-- 
1.9.1

[PATCH v2 3/6] ata: ahci: add AHCI support for the Berlin BG2Q

[Antoine Ténart]

Add support for the Berlin BG2Q AHCI SATA controller allowing to
interface with devices like external hard drives.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 drivers/ata/Kconfig       |  10 +++
 drivers/ata/Makefile      |   1 +
 drivers/ata/ahci_berlin.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 213 insertions(+)
 create mode 100644 drivers/ata/ahci_berlin.c

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index c2706047337f..37e6817b31f4 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -97,6 +97,16 @@ config SATA_AHCI_PLATFORM
 
 	  If unsure, say N.
 
+config AHCI_BERLIN
+	tristate "Marvell Berlin AHCI SATA support"
+	depends on ARCH_BERLIN
+	select PHY_BERLIN_SATA
+	help
+	  This option enables support for the Marvell Berlin SoC's
+	  onboard AHCI SATA.
+
+	  If unsure, say N.
+
 config AHCI_DA850
 	tristate "DaVinci DA850 AHCI SATA support"
 	depends on ARCH_DAVINCI_DA850
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 44c8016e565c..7fb78d1e0a44 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SATA_INIC162X)	+= sata_inic162x.o
 obj-$(CONFIG_SATA_SIL24)	+= sata_sil24.o
 obj-$(CONFIG_SATA_DWC)		+= sata_dwc_460ex.o
 obj-$(CONFIG_SATA_HIGHBANK)	+= sata_highbank.o libahci.o
+obj-$(CONFIG_AHCI_BERLIN)	+= ahci_berlin.o libahci.o libahci_platform.o
 obj-$(CONFIG_AHCI_DA850)	+= ahci_da850.o libahci.o libahci_platform.o
 obj-$(CONFIG_AHCI_IMX)		+= ahci_imx.o libahci.o libahci_platform.o
 obj-$(CONFIG_AHCI_SUNXI)	+= ahci_sunxi.o libahci.o libahci_platform.o
diff --git a/drivers/ata/ahci_berlin.c b/drivers/ata/ahci_berlin.c
new file mode 100644
index 000000000000..973c07e54a6a
--- /dev/null
+++ b/drivers/ata/ahci_berlin.c
@@ -0,0 +1,202 @@
+/*
+ * Marvell Berlin AHCI SATA platform driver
+ *
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine T?nart <antoine.tenart@free-electrons.com>
+ * Jisheng Zhang <jszhang@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/ahci_platform.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+
+#include "ahci.h"
+
+#define BERLIN_SATA_NPORTS	2
+
+#define PORT_VSR_ADDR		0x78
+#define PORT_VSR_DATA		0x7c
+
+#define PHY_BASE		0x200
+
+/* register 0x01 */
+#define REF_FREF_SEL_25		BIT(0)
+#define PHY_MODE_SATA		(0x0 << 5)
+
+/* register 0x02 */
+#define USE_MAX_PLL_RATE	BIT(12)
+
+/* register 0x23 */
+#define DATA_BIT_WIDTH_10	(0x0 << 10)
+#define DATA_BIT_WIDTH_20	(0x1 << 10)
+#define DATA_BIT_WIDTH_40	(0x2 << 10)
+
+/* register 0x25 */
+#define PHY_GEN_MAX_1_5		(0x0 << 10)
+#define PHY_GEN_MAX_3_0		(0x1 << 10)
+#define PHY_GEN_MAX_6_0		(0x2 << 10)
+
+struct berlin_ahci_priv {
+	struct ahci_host_priv	*hpriv;
+	struct phy		*phys[BERLIN_SATA_NPORTS];
+};
+
+static inline void ahci_berlin_reg_setbits(void __iomem *ctrl_reg, u32 reg,
+					   u32 mask, u32 val)
+{
+	u32 regval;
+
+	/* select register */
+	writel(PHY_BASE + reg, ctrl_reg + PORT_VSR_ADDR);
+
+	/* set bits */
+	regval = readl(ctrl_reg + PORT_VSR_DATA);
+	regval &= ~mask;
+	regval |= val;
+	writel(regval, ctrl_reg + PORT_VSR_DATA);
+}
+
+static void ahci_berlin_port_init(struct ahci_host_priv *hpriv,
+				  unsigned int port)
+{
+	struct berlin_ahci_priv *berlin_priv = hpriv->plat_data;
+	void __iomem *ctrl_reg = hpriv->mmio + 0x100 + (port * 0x80);
+
+	/* power on the PHY */
+	phy_power_on(berlin_priv->phys[port]);
+
+	/* set PHY mode to SATA, ref freq to 25 MHz */
+	ahci_berlin_reg_setbits(ctrl_reg, 0x1, 0xff, REF_FREF_SEL_25 | PHY_MODE_SATA);
+
+	/* set PHY up to 6 Gbps */
+	ahci_berlin_reg_setbits(ctrl_reg, 0x25, 0xc00, PHY_GEN_MAX_6_0);
+
+	/* set 40 bits width */
+	ahci_berlin_reg_setbits(ctrl_reg, 0x23,  0xc00, DATA_BIT_WIDTH_40);
+
+	/* use max pll rate */
+	ahci_berlin_reg_setbits(ctrl_reg, 0x2, 0x0, USE_MAX_PLL_RATE);
+
+	/* set the controller speed */
+	writel(0x31, ctrl_reg + PORT_SCR_CTL);
+}
+
+static const struct ata_port_info ahci_berlin_port_info = {
+	.flags		= AHCI_FLAG_COMMON | ATA_FLAG_NCQ,
+	.pio_mask	= ATA_PIO4,
+	.udma_mask	= ATA_UDMA6,
+	.port_ops	= &ahci_platform_ops,
+};
+
+static int ahci_berlin_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct ahci_host_priv *hpriv;
+	struct berlin_ahci_priv *berlin_priv;
+	int ret, i = 0;
+	unsigned mask = 0;
+
+	hpriv = ahci_platform_get_resources(pdev);
+	if (IS_ERR(hpriv)) {
+		dev_err(dev, "cannot get AHCI resources\n");
+		return PTR_ERR(hpriv);
+	}
+
+	berlin_priv = devm_kzalloc(dev, sizeof(*berlin_priv), GFP_KERNEL);
+	if (!berlin_priv)
+		return -ENOMEM;
+
+	hpriv->plat_data = berlin_priv;
+
+	ret = ahci_platform_enable_resources(hpriv);
+	if (ret) {
+		dev_err(dev, "cannot enable resources: %d\n", ret);
+		return ret;
+	}
+
+	for (i = 0; i < BERLIN_SATA_NPORTS; i++) {
+		char phy_name[6];
+
+		sprintf(phy_name, "port%d", i);
+
+		berlin_priv->phys[i] = devm_phy_get(dev, phy_name);
+		if (IS_ERR(berlin_priv->phys[i])) {
+			dev_warn(dev, "%s not available\n", phy_name);
+			continue;
+		}
+
+		mask |= 1 << i;
+		ahci_berlin_port_init(hpriv, i);
+	}
+
+	ret = ahci_platform_init_host(pdev, hpriv, &ahci_berlin_port_info,
+				      0, mask);
+	if (ret) {
+		dev_err(dev, "host init failed: %d\n", ret);
+		goto disable_resources;
+	}
+
+	return 0;
+
+disable_resources:
+	ahci_platform_disable_resources(hpriv);
+	return ret;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ahci_berlin_resume(struct device *dev)
+{
+	struct ata_host *host = dev_get_drvdata(dev);
+	struct ahci_host_priv *hpriv = host->private_data;
+	struct berlin_ahci_priv *berlin_priv = hpriv->plat_data;
+	int ret, i;
+
+	ret = ahci_platform_enable_resources(hpriv);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < BERLIN_SATA_NPORTS; i++) {
+		if (!IS_ERR(berlin_priv->phys[i]))
+			ahci_berlin_port_init(hpriv, i);
+	}
+
+	ret = ahci_platform_resume_host(dev);
+	if (ret) {
+		ahci_platform_disable_resources(hpriv);
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(ahci_berlin_pm_ops, ahci_platform_suspend,
+			 ahci_berlin_resume);
+
+static const struct of_device_id ahci_berlin_of_match[] = {
+	{ .compatible = "marvell,berlin-ahci" },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, ahci_berlin_of_match);
+
+static struct platform_driver ahci_berlin_driver = {
+	.probe	= ahci_berlin_probe,
+	.remove	= ata_platform_remove_one,
+	.driver	= {
+		.name		= "ahci-berlin",
+		.owner		= THIS_MODULE,
+		.of_match_table = ahci_berlin_of_match,
+		.pm		= &ahci_berlin_pm_ops,
+	},
+};
+module_platform_driver(ahci_berlin_driver);
+
+MODULE_DESCRIPTION("Marvell Berlin AHCI SATA driver");
+MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
+MODULE_LICENSE("GPL");
-- 
1.9.1

[PATCH v2 4/6] Documentation: bindings: add the berlin-ahci compatible to the ahci platform

[Antoine Ténart]

The berlin-ahci driver allows Berlin SoCs to support their AHCI SATA controller.
Add the corresponding device tree bindings documentation.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 Documentation/devicetree/bindings/ata/ahci-berlin.txt | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-berlin.txt

diff --git a/Documentation/devicetree/bindings/ata/ahci-berlin.txt b/Documentation/devicetree/bindings/ata/ahci-berlin.txt
new file mode 100644
index 000000000000..388150a1bb00
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-berlin.txt
@@ -0,0 +1,18 @@
+* Marvell Berlin SATA nodes
+
+Required properties:
+- compatible: "marvell,berlin-ahci"
+- interrupts: interrupt mapping for the SATA IRQ
+- reg: address and length of the register
+- phys: references to the SATA PHY nodes
+- phy-names: should be "port0" or/and "port1"
+
+Example:
+	ahci: sata at f7e90000 {
+		compatible = "marvell,berlin-ahci";
+		reg = <0xf7e90000 0x1000>;
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&sata_phy 0>, <&sata_phy 1>;
+		phy-names = "port0", "port1";
+		status = "okay";
+	};
-- 
1.9.1

[PATCH v2 5/6] ARM: berlin: add the AHCI node for the BG2Q

[Antoine Ténart]

The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, SATA PHY) in its device tree.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 arch/arm/boot/dts/berlin2q.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 07452a7483fa..99338a2d11a6 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -183,6 +183,20 @@
 			};
 		};
 
+		ahci: sata at e90000 {
+			compatible = "marvell,berlin-ahci";
+			reg = <0xe90000 0x1000>;
+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		sata_phy: phy at e900a0 {
+			compatible = "marvell,berlin-sata-phy";
+			reg = <0xe900a0 0x10>;
+			#phy-cells = <1>;
+			status = "disabled";
+		};
+
 		apb at fc0000 {
 			compatible = "simple-bus";
 			#address-cells = <1>;
-- 
1.9.1

[PATCH v2 6/6] ARM: berlin: enable the eSATA interface on the BG2Q DMP

[Antoine Ténart]

The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Also use the SATA PHY 0, the BG2Q DMP does not has the SATA PHY 1.

Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
---
 arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 2da9c41e29d8..3782204100d8 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -26,3 +26,13 @@
 &uart0 {
 	status = "okay";
 };
+
+&ahci {
+	phys = <&sata_phy 0>;
+	phy-names = "port0";
+	status = "okay";
+};
+
+&sata_phy {
+	status = "okay";
+};
-- 
1.9.1

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Kishon Vijay Abraham I]

Hi,

On Monday 12 May 2014 02:46 PM, Antoine T?nart wrote:
> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
> 
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> ---
>  drivers/phy/Kconfig           |   5 ++
>  drivers/phy/Makefile          |   1 +
>  drivers/phy/phy-berlin-sata.c | 179 ++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 185 insertions(+)
>  create mode 100644 drivers/phy/phy-berlin-sata.c
> 
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 4906c27fa3bd..b31b1986fda4 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -15,6 +15,11 @@ config GENERIC_PHY
>  	  phy users can obtain reference to the PHY. All the users of this
>  	  framework should select this config.
>  
> +config PHY_BERLIN_SATA
> +	bool
> +	depends on ARCH_BERLIN && OF
> +	select GENERIC_PHY
> +
>  config PHY_EXYNOS_MIPI_VIDEO
>  	tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
>  	depends on HAS_IOMEM
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 7728518572a4..40278706ac1b 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -3,6 +3,7 @@
>  #
>  
>  obj-$(CONFIG_GENERIC_PHY)		+= phy-core.o
> +obj-$(CONFIG_PHY_BERLIN_SATA)		+= phy-berlin-sata.o
>  obj-$(CONFIG_BCM_KONA_USB2_PHY)		+= phy-bcm-kona-usb2.o
>  obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)	+= phy-exynos-dp-video.o
>  obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)	+= phy-exynos-mipi-video.o
> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
> new file mode 100644
> index 000000000000..f20f5ece1a7f
> --- /dev/null
> +++ b/drivers/phy/phy-berlin-sata.c
> @@ -0,0 +1,179 @@
> +/*
> + * Marvell Berlin SATA PHY driver
> + *
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine T?nart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/phy/phy.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +
> +#define HOST_VSA_ADDR		0x0
> +#define HOST_VSA_DATA		0x4
> +
> +#define CONTROL_REGISTER	0x0
> +#define MBUS_SIZE_CONTROL	0x4
> +
> +#define POWER_DOWN_SATA0		BIT(6)
> +#define POWER_DOWN_SATA1		BIT(14)
> +#define MBUS_WRITE_REQUEST_SIZE_128	(BIT(2) << 16)
> +#define MBUS_READ_REQUEST_SIZE_128	(BIT(2) << 19)
> +
> +#define BERLIN_SATA_PHY_NB	2
> +
> +#define to_berlin_sata_phy_priv(desc)	\
> +	container_of((desc), struct priv, phys[(desc)->index])
> +
> +struct phy_desc {

to be consistent, lets name it phy_berlin_desc.
> +	struct phy	*phy;
> +	u32		val;
> +	unsigned	index;
> +};
> +
> +struct priv {
> +	void __iomem	*base;
> +	spinlock_t	lock;
> +	struct phy_desc	phys[BERLIN_SATA_PHY_NB];
> +};
> +
> +static int phy_berlin_sata_power_on(struct phy *phy)
> +{
> +	struct phy_desc *desc = phy_get_drvdata(phy);
> +	struct priv *priv = to_berlin_sata_phy_priv(desc);
> +	u32 regval;
> +
> +	spin_lock(&priv->lock);
> +
> +	/* Power up PHY */
> +	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
> +	regval = readl(priv->base + HOST_VSA_DATA);
> +	regval &= ~(desc->val);
> +	writel(regval, priv->base + HOST_VSA_DATA);
> +
> +	/* Configure MBus */
> +	writel(MBUS_SIZE_CONTROL, priv->base + HOST_VSA_ADDR);
> +	regval = readl(priv->base + HOST_VSA_DATA);
> +	regval |= MBUS_WRITE_REQUEST_SIZE_128 | MBUS_READ_REQUEST_SIZE_128;
> +	writel(regval, priv->base + HOST_VSA_DATA);
> +
> +	spin_unlock(&priv->lock);
> +
> +	return 0;
> +}
> +
> +static int phy_berlin_sata_power_off(struct phy *phy)
> +{
> +	struct phy_desc *desc = phy_get_drvdata(phy);
> +	struct priv *priv = to_berlin_sata_phy_priv(desc);
> +	u32 regval;
> +
> +	spin_lock(&priv->lock);
> +
> +	/* Power down PHY */
> +	writel(CONTROL_REGISTER, priv->base + HOST_VSA_ADDR);
> +	regval = readl(priv->base + HOST_VSA_DATA);
> +	regval |= desc->val;
> +	writel(regval, priv->base + HOST_VSA_DATA);
> +
> +	spin_unlock(&priv->lock);
> +
> +	return 0;
> +}
> +
> +static struct phy *berlin_sata_phy_xlate(struct device *dev,
> +					 struct of_phandle_args *args)
> +{
> +	struct priv *priv = dev_get_drvdata(dev);
> +
> +	if (WARN_ON(args->args[0] >= BERLIN_SATA_PHY_NB))
> +		return ERR_PTR(-ENODEV);
> +
> +	return priv->phys[args->args[0]].phy;
> +}
> +
> +static struct phy_ops phy_berlin_sata_ops = {
> +	.power_on	= phy_berlin_sata_power_on,
> +	.power_off	= phy_berlin_sata_power_off,
> +	.owner		= THIS_MODULE,
> +};
> +
> +static struct phy_desc desc[] = {
> +	{ .val = POWER_DOWN_SATA0 },
> +	{ .val = POWER_DOWN_SATA1 },
> +	{ },
> +};
> +
> +static int phy_berlin_sata_probe(struct platform_device *pdev)
> +{
> +	struct phy *phy;
> +	struct phy_provider *phy_provider;
> +	struct priv *priv;
> +	struct resource *res;
> +	int i;
> +
> +	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
> +	if (IS_ERR(phy))
> +		return PTR_ERR(phy);
> +
> +	dev_set_drvdata(&pdev->dev, priv);
> +	spin_lock_init(&priv->lock);
> +
> +	for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {

huh.. this should come from dt data. For devices which have multiple PHYs, each
PHY should be modelled as the sub-node of the *PHY provider* device node.


> +		struct phy *phy = devm_phy_create(&pdev->dev,
> +						  &phy_berlin_sata_ops, NULL);
> +		if (IS_ERR(phy)) {
> +			dev_err(&pdev->dev, "failed to create PHY %d\n", i);
> +			return PTR_ERR(phy);
> +		}
> +
> +		priv->phys[i].phy = phy;
> +		priv->phys[i].val = desc[i].val;
> +		priv->phys[i].index = i;
> +		phy_set_drvdata(phy, &priv->phys[i]);
> +
> +		/* Make sure the PHY is off */
> +		phy_berlin_sata_power_off(phy);
> +	}
> +
> +	phy_provider = devm_of_phy_provider_register(&pdev->dev,
> +						     berlin_sata_phy_xlate);
> +	if (IS_ERR(phy_provider))
> +		return PTR_ERR(phy_provider);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id phy_berlin_sata_of_match[] = {
> +	{ .compatible = "marvell,berlin-sata-phy" },
> +	{ },
> +};
> +
> +static struct platform_driver phy_berlin_sata_driver = {
> +	.probe	= phy_berlin_sata_probe,
> +	.driver	= {
> +		.name		= "phy-berlin-sata",
> +		.owner		= THIS_MODULE,
> +		.of_match_table	= phy_berlin_sata_of_match,
> +	},
> +};
> +module_platform_driver(phy_berlin_sata_driver);
> +
> +MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
> +MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
> +MODULE_LICENSE("GPL");

GPL v2 as the file header states so?

Thanks
Kishon

[PATCH v2 3/6] ata: ahci: add AHCI support for the Berlin BG2Q

[Andrew Lunn]

On Mon, May 12, 2014 at 11:16:54AM +0200, Antoine T?nart wrote:
> Add support for the Berlin BG2Q AHCI SATA controller allowing to
> interface with devices like external hard drives.
> 
> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
> ---
>  drivers/ata/Kconfig       |  10 +++
>  drivers/ata/Makefile      |   1 +
>  drivers/ata/ahci_berlin.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 213 insertions(+)
>  create mode 100644 drivers/ata/ahci_berlin.c
> 
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index c2706047337f..37e6817b31f4 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -97,6 +97,16 @@ config SATA_AHCI_PLATFORM
>  
>  	  If unsure, say N.
>  
> +config AHCI_BERLIN
> +	tristate "Marvell Berlin AHCI SATA support"
> +	depends on ARCH_BERLIN
> +	select PHY_BERLIN_SATA
> +	help
> +	  This option enables support for the Marvell Berlin SoC's
> +	  onboard AHCI SATA.
> +
> +	  If unsure, say N.
> +
>  config AHCI_DA850
>  	tristate "DaVinci DA850 AHCI SATA support"
>  	depends on ARCH_DAVINCI_DA850
> diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
> index 44c8016e565c..7fb78d1e0a44 100644
> --- a/drivers/ata/Makefile
> +++ b/drivers/ata/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_SATA_INIC162X)	+= sata_inic162x.o
>  obj-$(CONFIG_SATA_SIL24)	+= sata_sil24.o
>  obj-$(CONFIG_SATA_DWC)		+= sata_dwc_460ex.o
>  obj-$(CONFIG_SATA_HIGHBANK)	+= sata_highbank.o libahci.o
> +obj-$(CONFIG_AHCI_BERLIN)	+= ahci_berlin.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_DA850)	+= ahci_da850.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_IMX)		+= ahci_imx.o libahci.o libahci_platform.o
>  obj-$(CONFIG_AHCI_SUNXI)	+= ahci_sunxi.o libahci.o libahci_platform.o
> diff --git a/drivers/ata/ahci_berlin.c b/drivers/ata/ahci_berlin.c
> new file mode 100644
> index 000000000000..973c07e54a6a
> --- /dev/null
> +++ b/drivers/ata/ahci_berlin.c
> @@ -0,0 +1,202 @@
> +/*
> + * Marvell Berlin AHCI SATA platform driver
> + *
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine T?nart <antoine.tenart@free-electrons.com>
> + * Jisheng Zhang <jszhang@marvell.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/ahci_platform.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +
> +#include "ahci.h"
> +
> +#define BERLIN_SATA_NPORTS	2
> +
> +#define PORT_VSR_ADDR		0x78
> +#define PORT_VSR_DATA		0x7c
> +
> +#define PHY_BASE		0x200
> +
> +/* register 0x01 */
> +#define REF_FREF_SEL_25		BIT(0)
> +#define PHY_MODE_SATA		(0x0 << 5)
> +
> +/* register 0x02 */
> +#define USE_MAX_PLL_RATE	BIT(12)
> +
> +/* register 0x23 */
> +#define DATA_BIT_WIDTH_10	(0x0 << 10)
> +#define DATA_BIT_WIDTH_20	(0x1 << 10)
> +#define DATA_BIT_WIDTH_40	(0x2 << 10)
> +
> +/* register 0x25 */
> +#define PHY_GEN_MAX_1_5		(0x0 << 10)
> +#define PHY_GEN_MAX_3_0		(0x1 << 10)
> +#define PHY_GEN_MAX_6_0		(0x2 << 10)
> +
> +struct berlin_ahci_priv {
> +	struct ahci_host_priv	*hpriv;
> +	struct phy		*phys[BERLIN_SATA_NPORTS];
> +};
> +
> +static inline void ahci_berlin_reg_setbits(void __iomem *ctrl_reg, u32 reg,
> +					   u32 mask, u32 val)
> +{
> +	u32 regval;
> +
> +	/* select register */
> +	writel(PHY_BASE + reg, ctrl_reg + PORT_VSR_ADDR);
> +
> +	/* set bits */
> +	regval = readl(ctrl_reg + PORT_VSR_DATA);
> +	regval &= ~mask;
> +	regval |= val;
> +	writel(regval, ctrl_reg + PORT_VSR_DATA);
> +}
> +
> +static void ahci_berlin_port_init(struct ahci_host_priv *hpriv,
> +				  unsigned int port)
> +{
> +	struct berlin_ahci_priv *berlin_priv = hpriv->plat_data;
> +	void __iomem *ctrl_reg = hpriv->mmio + 0x100 + (port * 0x80);
> +
> +	/* power on the PHY */
> +	phy_power_on(berlin_priv->phys[port]);
> +
> +	/* set PHY mode to SATA, ref freq to 25 MHz */
> +	ahci_berlin_reg_setbits(ctrl_reg, 0x1, 0xff, REF_FREF_SEL_25 | PHY_MODE_SATA);
> +
> +	/* set PHY up to 6 Gbps */
> +	ahci_berlin_reg_setbits(ctrl_reg, 0x25, 0xc00, PHY_GEN_MAX_6_0);
> +
> +	/* set 40 bits width */
> +	ahci_berlin_reg_setbits(ctrl_reg, 0x23,  0xc00, DATA_BIT_WIDTH_40);
> +
> +	/* use max pll rate */
> +	ahci_berlin_reg_setbits(ctrl_reg, 0x2, 0x0, USE_MAX_PLL_RATE);
> +
> +	/* set the controller speed */
> +	writel(0x31, ctrl_reg + PORT_SCR_CTL);
> +}

Hi Antoine

I've no idea is this is a good or bad idea, but could you put all the
above code in the phy driver? It does seem to be mostly phy
related. Then teach the core ahci code about optional phy nodes in DT.
You can then probably do without a ahci berlin driver.

    Andrew

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Sebastian Hesselbarth]

On 05/12/2014 02:46 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Monday 12 May 2014 02:46 PM, Antoine T?nart wrote:
>> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>>
>> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
>> ---
>>   drivers/phy/Kconfig           |   5 ++
>>   drivers/phy/Makefile          |   1 +
>>   drivers/phy/phy-berlin-sata.c | 179 ++++++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 185 insertions(+)
>>   create mode 100644 drivers/phy/phy-berlin-sata.c
>>
>> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
>> index 4906c27fa3bd..b31b1986fda4 100644
>> --- a/drivers/phy/Kconfig
>> +++ b/drivers/phy/Kconfig
>> @@ -15,6 +15,11 @@ config GENERIC_PHY
>>   	  phy users can obtain reference to the PHY. All the users of this
>>   	  framework should select this config.
>>
>> +config PHY_BERLIN_SATA
>> +	bool
>> +	depends on ARCH_BERLIN && OF
>> +	select GENERIC_PHY
>> +
>>   config PHY_EXYNOS_MIPI_VIDEO
>>   	tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
>>   	depends on HAS_IOMEM
>> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
>> index 7728518572a4..40278706ac1b 100644
>> --- a/drivers/phy/Makefile
>> +++ b/drivers/phy/Makefile
>> @@ -3,6 +3,7 @@
>>   #
>>
>>   obj-$(CONFIG_GENERIC_PHY)		+= phy-core.o
>> +obj-$(CONFIG_PHY_BERLIN_SATA)		+= phy-berlin-sata.o
>>   obj-$(CONFIG_BCM_KONA_USB2_PHY)		+= phy-bcm-kona-usb2.o
>>   obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)	+= phy-exynos-dp-video.o
>>   obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)	+= phy-exynos-mipi-video.o
>> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
>> new file mode 100644
>> index 000000000000..f20f5ece1a7f
>> --- /dev/null
>> +++ b/drivers/phy/phy-berlin-sata.c
>> @@ -0,0 +1,179 @@
>> +/*
>> + * Marvell Berlin SATA PHY driver
>> + *
>> + * Copyright (C) 2014 Marvell Technology Group Ltd.
>> + *
>> + * Antoine T?nart <antoine.tenart@free-electrons.com>
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed "as is" without any
>> + * warranty of any kind, whether express or implied.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/phy/phy.h>
>> +#include <linux/io.h>
>> +#include <linux/platform_device.h>
>> +
>> +#define HOST_VSA_ADDR		0x0
>> +#define HOST_VSA_DATA		0x4
>> +
>> +#define CONTROL_REGISTER	0x0
>> +#define MBUS_SIZE_CONTROL	0x4
>> +
>> +#define POWER_DOWN_SATA0		BIT(6)
>> +#define POWER_DOWN_SATA1		BIT(14)
>> +#define MBUS_WRITE_REQUEST_SIZE_128	(BIT(2) << 16)
>> +#define MBUS_READ_REQUEST_SIZE_128	(BIT(2) << 19)
>> +
>> +#define BERLIN_SATA_PHY_NB	2
>> +
>> +#define to_berlin_sata_phy_priv(desc)	\
>> +	container_of((desc), struct priv, phys[(desc)->index])
>> +
>> +struct phy_desc {
>
> to be consistent, lets name it phy_berlin_desc.
>> +	struct phy	*phy;
>> +	u32		val;
>> +	unsigned	index;
>> +};
>> +
>> +struct priv {

And phy_berlin_priv then?

[...]
>> +static int phy_berlin_sata_probe(struct platform_device *pdev)
>> +{
>> +	struct phy *phy;
>> +	struct phy_provider *phy_provider;
>> +	struct priv *priv;
>> +	struct resource *res;
>> +	int i;
>> +
>> +	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>> +	if (!priv)
>> +		return -ENOMEM;
>> +
>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +	priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
>> +	if (IS_ERR(priv->base))
>> +		return PTR_ERR(priv->base);
>> +
>> +	phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
>> +	if (IS_ERR(phy))
>> +		return PTR_ERR(phy);
>> +
>> +	dev_set_drvdata(&pdev->dev, priv);
>> +	spin_lock_init(&priv->lock);
>> +
>> +	for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {
>
> huh.. this should come from dt data. For devices which have multiple PHYs, each
> PHY should be modelled as the sub-node of the *PHY provider* device node.

Just to make sure we get it right:

You want the PHY (provider) node look like this:

sata_phy: phy at f7e900a0 {
	compatible = "marvell,berlin-sata-phy";
	reg = <0xf7e900a0 0x10>;
	#address-cells = <1>;
	#size-cells = <0>;
	#phy-cells = <1>;
	status = "okay";

	sata_phy0: phy at 0 { reg = <0>; };

	sata_phy1: phy at 1 { reg = <1>; };
};

and parse the number of individual PHYs with
for_each_child_of_node()?

Sebastian

>> +		struct phy *phy = devm_phy_create(&pdev->dev,
>> +						  &phy_berlin_sata_ops, NULL);
>> +		if (IS_ERR(phy)) {
>> +			dev_err(&pdev->dev, "failed to create PHY %d\n", i);
>> +			return PTR_ERR(phy);
>> +		}
>> +
>> +		priv->phys[i].phy = phy;
>> +		priv->phys[i].val = desc[i].val;
>> +		priv->phys[i].index = i;
>> +		phy_set_drvdata(phy, &priv->phys[i]);
>> +
>> +		/* Make sure the PHY is off */
>> +		phy_berlin_sata_power_off(phy);
>> +	}
>> +
>> +	phy_provider = devm_of_phy_provider_register(&pdev->dev,
>> +						     berlin_sata_phy_xlate);
>> +	if (IS_ERR(phy_provider))
>> +		return PTR_ERR(phy_provider);
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct of_device_id phy_berlin_sata_of_match[] = {
>> +	{ .compatible = "marvell,berlin-sata-phy" },
>> +	{ },
>> +};
>> +
>> +static struct platform_driver phy_berlin_sata_driver = {
>> +	.probe	= phy_berlin_sata_probe,
>> +	.driver	= {
>> +		.name		= "phy-berlin-sata",
>> +		.owner		= THIS_MODULE,
>> +		.of_match_table	= phy_berlin_sata_of_match,
>> +	},
>> +};
>> +module_platform_driver(phy_berlin_sata_driver);
>> +
>> +MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
>> +MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
>> +MODULE_LICENSE("GPL");
>
> GPL v2 as the file header states so?
>
> Thanks
> Kishon
>

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Kishon Vijay Abraham I]

Hi,

On Monday 12 May 2014 07:48 PM, Sebastian Hesselbarth wrote:
> On 05/12/2014 02:46 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Monday 12 May 2014 02:46 PM, Antoine T?nart wrote:
>>> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>>>
>>> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>
>>> ---
>>>   drivers/phy/Kconfig           |   5 ++
>>>   drivers/phy/Makefile          |   1 +
>>>   drivers/phy/phy-berlin-sata.c | 179
>>> ++++++++++++++++++++++++++++++++++++++++++
>>>   3 files changed, 185 insertions(+)
>>>   create mode 100644 drivers/phy/phy-berlin-sata.c
>>>
>>> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
>>> index 4906c27fa3bd..b31b1986fda4 100644
>>> --- a/drivers/phy/Kconfig
>>> +++ b/drivers/phy/Kconfig
>>> @@ -15,6 +15,11 @@ config GENERIC_PHY
>>>         phy users can obtain reference to the PHY. All the users of this
>>>         framework should select this config.
>>>
>>> +config PHY_BERLIN_SATA
>>> +    bool
>>> +    depends on ARCH_BERLIN && OF
>>> +    select GENERIC_PHY
>>> +
>>>   config PHY_EXYNOS_MIPI_VIDEO
>>>       tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
>>>       depends on HAS_IOMEM
>>> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
>>> index 7728518572a4..40278706ac1b 100644
>>> --- a/drivers/phy/Makefile
>>> +++ b/drivers/phy/Makefile
>>> @@ -3,6 +3,7 @@
>>>   #
>>>
>>>   obj-$(CONFIG_GENERIC_PHY)        += phy-core.o
>>> +obj-$(CONFIG_PHY_BERLIN_SATA)        += phy-berlin-sata.o
>>>   obj-$(CONFIG_BCM_KONA_USB2_PHY)        += phy-bcm-kona-usb2.o
>>>   obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)    += phy-exynos-dp-video.o
>>>   obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)    += phy-exynos-mipi-video.o
>>> diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
>>> new file mode 100644
>>> index 000000000000..f20f5ece1a7f
>>> --- /dev/null
>>> +++ b/drivers/phy/phy-berlin-sata.c
>>> @@ -0,0 +1,179 @@
>>> +/*
>>> + * Marvell Berlin SATA PHY driver
>>> + *
>>> + * Copyright (C) 2014 Marvell Technology Group Ltd.
>>> + *
>>> + * Antoine T?nart <antoine.tenart@free-electrons.com>
>>> + *
>>> + * This file is licensed under the terms of the GNU General Public
>>> + * License version 2. This program is licensed "as is" without any
>>> + * warranty of any kind, whether express or implied.
>>> + */
>>> +
>>> +#include <linux/module.h>
>>> +#include <linux/phy/phy.h>
>>> +#include <linux/io.h>
>>> +#include <linux/platform_device.h>
>>> +
>>> +#define HOST_VSA_ADDR        0x0
>>> +#define HOST_VSA_DATA        0x4
>>> +
>>> +#define CONTROL_REGISTER    0x0
>>> +#define MBUS_SIZE_CONTROL    0x4
>>> +
>>> +#define POWER_DOWN_SATA0        BIT(6)
>>> +#define POWER_DOWN_SATA1        BIT(14)
>>> +#define MBUS_WRITE_REQUEST_SIZE_128    (BIT(2) << 16)
>>> +#define MBUS_READ_REQUEST_SIZE_128    (BIT(2) << 19)
>>> +
>>> +#define BERLIN_SATA_PHY_NB    2
>>> +
>>> +#define to_berlin_sata_phy_priv(desc)    \
>>> +    container_of((desc), struct priv, phys[(desc)->index])
>>> +
>>> +struct phy_desc {
>>
>> to be consistent, lets name it phy_berlin_desc.
>>> +    struct phy    *phy;
>>> +    u32        val;
>>> +    unsigned    index;
>>> +};
>>> +
>>> +struct priv {
> 
> And phy_berlin_priv then?
> 
> [...]
>>> +static int phy_berlin_sata_probe(struct platform_device *pdev)
>>> +{
>>> +    struct phy *phy;
>>> +    struct phy_provider *phy_provider;
>>> +    struct priv *priv;
>>> +    struct resource *res;
>>> +    int i;
>>> +
>>> +    priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>>> +    if (!priv)
>>> +        return -ENOMEM;
>>> +
>>> +    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> +    priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
>>> +    if (IS_ERR(priv->base))
>>> +        return PTR_ERR(priv->base);
>>> +
>>> +    phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
>>> +    if (IS_ERR(phy))
>>> +        return PTR_ERR(phy);
>>> +
>>> +    dev_set_drvdata(&pdev->dev, priv);
>>> +    spin_lock_init(&priv->lock);
>>> +
>>> +    for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {
>>
>> huh.. this should come from dt data. For devices which have multiple PHYs, each
>> PHY should be modelled as the sub-node of the *PHY provider* device node.
> 
> Just to make sure we get it right:
> 
> You want the PHY (provider) node look like this:
> 
> sata_phy: phy at f7e900a0 {
>     compatible = "marvell,berlin-sata-phy";
>     reg = <0xf7e900a0 0x10>;
>     #address-cells = <1>;
>     #size-cells = <0>;
>     #phy-cells = <1>;
>     status = "okay";
> 
>     sata_phy0: phy at 0 { reg = <0>; };
> 
>     sata_phy1: phy at 1 { reg = <1>; };
> };
> 
> and parse the number of individual PHYs with
> for_each_child_of_node()?

yeah.. make sure you cc devicetree list when you send the patch.

Cheers
Kishon
> 
> Sebastian
> 
>>> +        struct phy *phy = devm_phy_create(&pdev->dev,
>>> +                          &phy_berlin_sata_ops, NULL);
>>> +        if (IS_ERR(phy)) {
>>> +            dev_err(&pdev->dev, "failed to create PHY %d\n", i);
>>> +            return PTR_ERR(phy);
>>> +        }
>>> +
>>> +        priv->phys[i].phy = phy;
>>> +        priv->phys[i].val = desc[i].val;
>>> +        priv->phys[i].index = i;
>>> +        phy_set_drvdata(phy, &priv->phys[i]);
>>> +
>>> +        /* Make sure the PHY is off */
>>> +        phy_berlin_sata_power_off(phy);
>>> +    }
>>> +
>>> +    phy_provider = devm_of_phy_provider_register(&pdev->dev,
>>> +                             berlin_sata_phy_xlate);
>>> +    if (IS_ERR(phy_provider))
>>> +        return PTR_ERR(phy_provider);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static const struct of_device_id phy_berlin_sata_of_match[] = {
>>> +    { .compatible = "marvell,berlin-sata-phy" },
>>> +    { },
>>> +};
>>> +
>>> +static struct platform_driver phy_berlin_sata_driver = {
>>> +    .probe    = phy_berlin_sata_probe,
>>> +    .driver    = {
>>> +        .name        = "phy-berlin-sata",
>>> +        .owner        = THIS_MODULE,
>>> +        .of_match_table    = phy_berlin_sata_of_match,
>>> +    },
>>> +};
>>> +module_platform_driver(phy_berlin_sata_driver);
>>> +
>>> +MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
>>> +MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
>>> +MODULE_LICENSE("GPL");
>>
>> GPL v2 as the file header states so?
>>
>> Thanks
>> Kishon
>>
> 

[PATCH v2 3/6] ata: ahci: add AHCI support for the Berlin BG2Q

[Antoine Ténart]

Hi Andrew,

On Mon, May 12, 2014 at 04:12:21PM +0200, Andrew Lunn wrote:
> On Mon, May 12, 2014 at 11:16:54AM +0200, Antoine T?nart wrote:

[?]

> I've no idea is this is a good or bad idea, but could you put all the
> above code in the phy driver? It does seem to be mostly phy
> related. Then teach the core ahci code about optional phy nodes in DT.
> You can then probably do without a ahci berlin driver.

The code is PHY related, but the setup done is SATA specific. I think it
makes sense to keep it here. From what I saw lots of PHY drivers only
power up / down the PHYs.

Lots of port setups are done in the SATA framework, so it would separate
related code into two subsystems.

Antoine

-- 
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Antoine Ténart]

Hello,

On Mon, May 12, 2014 at 06:16:46PM +0530, Kishon Vijay Abraham I wrote:
> On Monday 12 May 2014 02:46 PM, Antoine T?nart wrote:

[?]

> > +struct phy_desc {
> 
> to be consistent, lets name it phy_berlin_desc.
> > +	struct phy	*phy;
> > +	u32		val;
> > +	unsigned	index;
> > +};

Sure.

[?]

> > +static int phy_berlin_sata_probe(struct platform_device *pdev)
> > +{
> > +	struct phy *phy;
> > +	struct phy_provider *phy_provider;
> > +	struct priv *priv;
> > +	struct resource *res;
> > +	int i;
> > +
> > +	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> > +	if (!priv)
> > +		return -ENOMEM;
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
> > +	if (IS_ERR(priv->base))
> > +		return PTR_ERR(priv->base);
> > +
> > +	phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
> > +	if (IS_ERR(phy))
> > +		return PTR_ERR(phy);
> > +
> > +	dev_set_drvdata(&pdev->dev, priv);
> > +	spin_lock_init(&priv->lock);
> > +
> > +	for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {
> 
> huh.. this should come from dt data. For devices which have multiple PHYs, each
> PHY should be modelled as the sub-node of the *PHY provider* device node.

I'll update, with the bindings suggested by Sebastian.

Thanks for the review!

Antoine

-- 
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[PATCH v2 1/6] phy: add a driver for the Berlin SATA PHY

[Antoine Ténart]

On Mon, May 12, 2014 at 11:16:52AM +0200, Antoine T?nart wrote:

[?]

> +static int phy_berlin_sata_probe(struct platform_device *pdev)
> +{
> +	struct phy *phy;
> +	struct phy_provider *phy_provider;
> +	struct priv *priv;
> +	struct resource *res;
> +	int i;
> +
> +	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	priv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	phy = devm_phy_create(&pdev->dev, &phy_berlin_sata_ops, NULL);
> +	if (IS_ERR(phy))
> +		return PTR_ERR(phy);

Not needed.

Antoine

> +
> +	dev_set_drvdata(&pdev->dev, priv);
> +	spin_lock_init(&priv->lock);
> +
> +	for (i = 0; i < BERLIN_SATA_PHY_NB; i++) {
> +		struct phy *phy = devm_phy_create(&pdev->dev,
> +						  &phy_berlin_sata_ops, NULL);
> +		if (IS_ERR(phy)) {
> +			dev_err(&pdev->dev, "failed to create PHY %d\n", i);
> +			return PTR_ERR(phy);
> +		}
> +
> +		priv->phys[i].phy = phy;
> +		priv->phys[i].val = desc[i].val;
> +		priv->phys[i].index = i;
> +		phy_set_drvdata(phy, &priv->phys[i]);
> +
> +		/* Make sure the PHY is off */
> +		phy_berlin_sata_power_off(phy);
> +	}
> +
> +	phy_provider = devm_of_phy_provider_register(&pdev->dev,
> +						     berlin_sata_phy_xlate);
> +	if (IS_ERR(phy_provider))
> +		return PTR_ERR(phy_provider);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id phy_berlin_sata_of_match[] = {
> +	{ .compatible = "marvell,berlin-sata-phy" },
> +	{ },
> +};
> +
> +static struct platform_driver phy_berlin_sata_driver = {
> +	.probe	= phy_berlin_sata_probe,
> +	.driver	= {
> +		.name		= "phy-berlin-sata",
> +		.owner		= THIS_MODULE,
> +		.of_match_table	= phy_berlin_sata_of_match,
> +	},
> +};
> +module_platform_driver(phy_berlin_sata_driver);
> +
> +MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
> +MODULE_AUTHOR("Antoine T?nart <antoine.tenart@free-electrons.com>");
> +MODULE_LICENSE("GPL");
> -- 
> 1.9.1
> 

-- 
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com