* [PATCH] pwm: i.MX: Cleanup indentation for register definitions @ 2014-05-27 10:19 Liu Ying 2014-05-27 10:19 ` [PATCH v4] pwm: i.MX: Avoid sample FIFO overflow for i.MX PWM version2 Liu Ying 2014-05-28 9:56 ` [PATCH] pwm: i.MX: Cleanup indentation for register definitions Lothar Waßmann 0 siblings, 2 replies; 4+ messages in thread From: Liu Ying @ 2014-05-27 10:19 UTC (permalink / raw) To: linux-arm-kernel This patch contains no logic change to cleanup indentation for register definitions only. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Wa?mann <LW@KARO-electronics.de> Cc: linux-pwm at vger.kernel.org Cc: linux-arm-kernel at lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> --- drivers/pwm/pwm-imx.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index cc47733..0784554 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -21,24 +21,24 @@ /* i.MX1 and i.MX21 share the same PWM function block: */ -#define MX1_PWMC 0x00 /* PWM Control Register */ -#define MX1_PWMS 0x04 /* PWM Sample Register */ -#define MX1_PWMP 0x08 /* PWM Period Register */ +#define MX1_PWMC 0x00 /* PWM Control Register */ +#define MX1_PWMS 0x04 /* PWM Sample Register */ +#define MX1_PWMP 0x08 /* PWM Period Register */ -#define MX1_PWMC_EN (1 << 4) +#define MX1_PWMC_EN (1 << 4) /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ -#define MX3_PWMCR 0x00 /* PWM Control Register */ -#define MX3_PWMSAR 0x0C /* PWM Sample Register */ -#define MX3_PWMPR 0x10 /* PWM Period Register */ -#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) -#define MX3_PWMCR_DOZEEN (1 << 24) -#define MX3_PWMCR_WAITEN (1 << 23) +#define MX3_PWMCR 0x00 /* PWM Control Register */ +#define MX3_PWMSAR 0x0C /* PWM Sample Register */ +#define MX3_PWMPR 0x10 /* PWM Period Register */ +#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define MX3_PWMCR_DOZEEN (1 << 24) +#define MX3_PWMCR_WAITEN (1 << 23) #define MX3_PWMCR_DBGEN (1 << 22) -#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) -#define MX3_PWMCR_CLKSRC_IPG (1 << 16) -#define MX3_PWMCR_EN (1 << 0) +#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) +#define MX3_PWMCR_CLKSRC_IPG (1 << 16) +#define MX3_PWMCR_EN (1 << 0) struct imx_chip { struct clk *clk_per; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v4] pwm: i.MX: Avoid sample FIFO overflow for i.MX PWM version2 2014-05-27 10:19 [PATCH] pwm: i.MX: Cleanup indentation for register definitions Liu Ying @ 2014-05-27 10:19 ` Liu Ying 2014-05-28 9:56 ` [PATCH] pwm: i.MX: Cleanup indentation for register definitions Lothar Waßmann 1 sibling, 0 replies; 4+ messages in thread From: Liu Ying @ 2014-05-27 10:19 UTC (permalink / raw) To: linux-arm-kernel The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27, i.MX51 and i.MX6SL. There is a 4-word(16bit) sample FIFO in this IP. Each FIFO slot determines the duty period of a PWM waveform in one full cycle. The IP spec mentions that we should not write a fourth sample because the FIFO will become full and triggers a FIFO write error (FWE) which will prevent the PWM from starting once it is enabled. In order to avoid any sample FIFO overflow issue, this patch clears all sample FIFO by doing software reset in the configuration hook when the controller is disabled or waits for a full PWM cycle to get a relinquished FIFO slot when the controller is enabled and the FIFO is fully loaded. The FIFO overflow issue can be reproduced by the following commands on the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which is driven by the pin HSIC_STROBE and the maximal brightness is 255. echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 255 > /sys/class/leds/user/brightness Here, FWE happens(PWMSR register reads 0x58) and the LED can not be lighten. Another way to reproduce the FIFO overflow issue is to run this script: while true; do echo 255 > /sys/class/leds/user/brightness; done Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Wa?mann <LW@KARO-electronics.de> Cc: linux-pwm at vger.kernel.org Cc: linux-arm-kernel at lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> --- v3->v4: * To address Sascha's comment, drop the rollover event approach and wait for a full PWM cycle to get a relinquished FIFO slot when the controller is enabled and the FIFO is fully loaded. * Update commit message accordlingly, includling a new way to reproduce the FIFO overflow issue. v2->v3: * Wait for a rollover event before configuration when PWM is active with non-zero duty period. And, update commit message for that. * Fix some typos in commit head and message(fifo -> FIFO, pwm -> PWM, etc). * Cc linux-kernel at vger.kernel.org. v1->v2: * To address Lothar Wa?mann's comment, add a timeout mechanism instead of endless polling the SWR bit to be cleared by the hardware. drivers/pwm/pwm-imx.c | 45 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 0784554..13c24a0 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -14,6 +14,7 @@ #include <linux/slab.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/delay.h> #include <linux/io.h> #include <linux/pwm.h> #include <linux/of.h> @@ -30,6 +31,7 @@ /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ #define MX3_PWMCR 0x00 /* PWM Control Register */ +#define MX3_PWMSR 0x04 /* PWM Status Register */ #define MX3_PWMSAR 0x0C /* PWM Sample Register */ #define MX3_PWMPR 0x10 /* PWM Period Register */ #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) @@ -38,7 +40,12 @@ #define MX3_PWMCR_DBGEN (1 << 22) #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) #define MX3_PWMCR_CLKSRC_IPG (1 << 16) +#define MX3_PWMCR_SWR (1 << 3) #define MX3_PWMCR_EN (1 << 0) +#define MX3_PWMSR_FIFOAV_4WORDS 0x4 +#define MX3_PWMSR_FIFOAV_MASK 0x7 + +#define MX3_PWM_SWR_LOOP 5 struct imx_chip { struct clk *clk_per; @@ -103,9 +110,43 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { struct imx_chip *imx = to_imx_chip(chip); + struct device *dev = chip->dev; unsigned long long c; unsigned long period_cycles, duty_cycles, prescale; - u32 cr; + unsigned int period_ms; + bool enable = test_bit(PWMF_ENABLED, &pwm->flags); + int wait_count = 0, fifoav; + u32 cr, sr; + + /* + * i.MX PWMv2 has a 4-word sample FIFO. + * In order to avoid FIFO overflow issue, we do software reset + * to clear all sample FIFO if the controller is disabled or + * wait for a full PWM cycle to get a relinquished FIFO slot + * when the controller is enabled and the FIFO is fully loaded. + */ + if (enable) { + sr = readl(imx->mmio_base + MX3_PWMSR); + fifoav = sr & MX3_PWMSR_FIFOAV_MASK; + if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) { + period_ms = DIV_ROUND_UP(pwm->period, NSEC_PER_MSEC); + msleep(period_ms); + + sr = readl(imx->mmio_base + MX3_PWMSR); + if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK)) + dev_warn(dev, "there is no free FIFO slot\n"); + } + } else { + writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); + do { + usleep_range(200, 1000); + cr = readl(imx->mmio_base + MX3_PWMCR); + } while ((cr & MX3_PWMCR_SWR) && + (wait_count++ < MX3_PWM_SWR_LOOP)); + + if (cr & MX3_PWMCR_SWR) + dev_warn(dev, "software reset timeout\n"); + } c = clk_get_rate(imx->clk_per); c = c * period_ns; @@ -135,7 +176,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH; - if (test_bit(PWMF_ENABLED, &pwm->flags)) + if (enable) cr |= MX3_PWMCR_EN; writel(cr, imx->mmio_base + MX3_PWMCR); -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] pwm: i.MX: Cleanup indentation for register definitions 2014-05-27 10:19 [PATCH] pwm: i.MX: Cleanup indentation for register definitions Liu Ying 2014-05-27 10:19 ` [PATCH v4] pwm: i.MX: Avoid sample FIFO overflow for i.MX PWM version2 Liu Ying @ 2014-05-28 9:56 ` Lothar Waßmann 2014-05-28 10:12 ` Liu Ying 1 sibling, 1 reply; 4+ messages in thread From: Lothar Waßmann @ 2014-05-28 9:56 UTC (permalink / raw) To: linux-arm-kernel Hi, Liu Ying wrote: > This patch contains no logic change to cleanup indentation > for register definitions only. > > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Shawn Guo <shawn.guo@freescale.com> > Cc: Lothar Wa?mann <LW@KARO-electronics.de> > Cc: linux-pwm at vger.kernel.org > Cc: linux-arm-kernel at lists.infradead.org > Signed-off-by: Liu Ying <Ying.Liu@freescale.com> > --- > drivers/pwm/pwm-imx.c | 26 +++++++++++++------------- > 1 file changed, 13 insertions(+), 13 deletions(-) > > diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c > index cc47733..0784554 100644 > --- a/drivers/pwm/pwm-imx.c > +++ b/drivers/pwm/pwm-imx.c > @@ -21,24 +21,24 @@ > > /* i.MX1 and i.MX21 share the same PWM function block: */ > > -#define MX1_PWMC 0x00 /* PWM Control Register */ > -#define MX1_PWMS 0x04 /* PWM Sample Register */ > -#define MX1_PWMP 0x08 /* PWM Period Register */ > +#define MX1_PWMC 0x00 /* PWM Control Register */ > +#define MX1_PWMS 0x04 /* PWM Sample Register */ > +#define MX1_PWMP 0x08 /* PWM Period Register */ > > -#define MX1_PWMC_EN (1 << 4) > +#define MX1_PWMC_EN (1 << 4) > > /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ > > -#define MX3_PWMCR 0x00 /* PWM Control Register */ > -#define MX3_PWMSAR 0x0C /* PWM Sample Register */ > -#define MX3_PWMPR 0x10 /* PWM Period Register */ > -#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) > -#define MX3_PWMCR_DOZEEN (1 << 24) > -#define MX3_PWMCR_WAITEN (1 << 23) > +#define MX3_PWMCR 0x00 /* PWM Control Register */ > +#define MX3_PWMSAR 0x0C /* PWM Sample Register */ > +#define MX3_PWMPR 0x10 /* PWM Period Register */ > +#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) ^ You could also add the missing () around the macro argument when you are changing this line anyway. Lothar Wa?mann -- ___________________________________________________________ Ka-Ro electronics GmbH | Pascalstra?e 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Gesch?ftsf?hrer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | info@karo-electronics.de ___________________________________________________________ ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] pwm: i.MX: Cleanup indentation for register definitions 2014-05-28 9:56 ` [PATCH] pwm: i.MX: Cleanup indentation for register definitions Lothar Waßmann @ 2014-05-28 10:12 ` Liu Ying 0 siblings, 0 replies; 4+ messages in thread From: Liu Ying @ 2014-05-28 10:12 UTC (permalink / raw) To: linux-arm-kernel On 05/28/2014 05:56 PM, Lothar Wa?mann wrote: > Hi, > > Liu Ying wrote: >> This patch contains no logic change to cleanup indentation >> for register definitions only. >> >> Cc: Thierry Reding <thierry.reding@gmail.com> >> Cc: Sascha Hauer <s.hauer@pengutronix.de> >> Cc: Shawn Guo <shawn.guo@freescale.com> >> Cc: Lothar Wa?mann <LW@KARO-electronics.de> >> Cc: linux-pwm at vger.kernel.org >> Cc: linux-arm-kernel at lists.infradead.org >> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> >> --- >> drivers/pwm/pwm-imx.c | 26 +++++++++++++------------- >> 1 file changed, 13 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c >> index cc47733..0784554 100644 >> --- a/drivers/pwm/pwm-imx.c >> +++ b/drivers/pwm/pwm-imx.c >> @@ -21,24 +21,24 @@ >> >> /* i.MX1 and i.MX21 share the same PWM function block: */ >> >> -#define MX1_PWMC 0x00 /* PWM Control Register */ >> -#define MX1_PWMS 0x04 /* PWM Sample Register */ >> -#define MX1_PWMP 0x08 /* PWM Period Register */ >> +#define MX1_PWMC 0x00 /* PWM Control Register */ >> +#define MX1_PWMS 0x04 /* PWM Sample Register */ >> +#define MX1_PWMP 0x08 /* PWM Period Register */ >> >> -#define MX1_PWMC_EN (1 << 4) >> +#define MX1_PWMC_EN (1 << 4) >> >> /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ >> >> -#define MX3_PWMCR 0x00 /* PWM Control Register */ >> -#define MX3_PWMSAR 0x0C /* PWM Sample Register */ >> -#define MX3_PWMPR 0x10 /* PWM Period Register */ >> -#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) >> -#define MX3_PWMCR_DOZEEN (1 << 24) >> -#define MX3_PWMCR_WAITEN (1 << 23) >> +#define MX3_PWMCR 0x00 /* PWM Control Register */ >> +#define MX3_PWMSAR 0x0C /* PWM Sample Register */ >> +#define MX3_PWMPR 0x10 /* PWM Period Register */ >> +#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) > ^ > You could also add the missing () around the macro argument when you > are changing this line anyway. > I may generate a separate patch to do that. Thanks. > > Lothar Wa?mann > -- Liu Ying ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-05-28 10:12 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-05-27 10:19 [PATCH] pwm: i.MX: Cleanup indentation for register definitions Liu Ying 2014-05-27 10:19 ` [PATCH v4] pwm: i.MX: Avoid sample FIFO overflow for i.MX PWM version2 Liu Ying 2014-05-28 9:56 ` [PATCH] pwm: i.MX: Cleanup indentation for register definitions Lothar Waßmann 2014-05-28 10:12 ` Liu Ying
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).