From: lauraa@codeaurora.org (Laura Abbott)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3 3/7] arm64: Move cpu_resume into the text section
Date: Mon, 25 Aug 2014 17:43:32 -0700 [thread overview]
Message-ID: <53FBD834.30507@codeaurora.org> (raw)
In-Reply-To: <53FB9DCB.3080602@codeaurora.org>
On 8/25/2014 1:34 PM, Stephen Boyd wrote:
> On 08/20/14 18:20, Laura Abbott wrote:
>> The function cpu_resume currently lives in the .data
>> section. This breaks functionality to make .data no
>> execute. Move cpu_resume to .text which is where it
>> actually belongs.
>>
>> Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
>> ---
>
> This is similar to arm (where I don't see a similar patch to this in
> Kees' patchset for RO). In arm we have this comment:
>
> /*
> * Note: Yes, part of the following code is located into the .data section.
> * This is to allow sleep_save_sp to be accessed with a relative load
> * while we can't rely on any MMU translation. We could have put
> * sleep_save_sp in the .text section as well, but some setups might
> * insist on it to be truly read-only.
> */
>
> Doesn't the same situation apply here? How is this problem overcome?
>
> But I'm a little confused, shouldn't this code run with the MMU disabled?
>
>> ENDPROC(cpu_resume_after_mmu)
>>
>> - .data
>> ENTRY(cpu_resume)
>> bl el2_setup // if in EL2 drop to EL1 cleanly
>> #ifdef CONFIG_SMP
>> mrs x1, mpidr_el1
>> - adr x4, mpidr_hash_ptr
>> + adrp x4, mpidr_hash_ptr
>> + add x4, x4, #:lo12:mpidr_hash_ptr
>> ldr x5, [x4]
>> add x8, x4, x5 // x8 = struct mpidr_hash phys address
>> /* retrieve mpidr_hash members to compute the hash */
>> @@ -143,14 +143,15 @@ ENTRY(cpu_resume)
>> #else
>> mov x7, xzr
>> #endif
>> - adr x0, sleep_save_sp
>> + adrp x0, sleep_save_sp
>> + add x0, x0, #:lo12:sleep_save_sp
>> ldr x0, [x0, #SLEEP_SAVE_SP_PHYS]
>> ldr x0, [x0, x7, lsl #3]
>> /* load sp from context */
>> ldr x2, [x0, #CPU_CTX_SP]
>> - adr x1, sleep_idmap_phys
>> + adrp x1, sleep_idmap_phys
>> /* load physical address of identity map page table in x1 */
>> - ldr x1, [x1]
>> + ldr x1, [x1, #:lo12:sleep_idmap_phys]
>> mov sp, x2
>> /*
>> * cpu_do_resume expects x0 to contain context physical address
>> @@ -160,6 +161,7 @@ ENTRY(cpu_resume)
>> b cpu_resume_mmu // Resume MMU, never returns
>> ENDPROC(cpu_resume)
>>
>> + .data
>> .align 3
>> mpidr_hash_ptr:
>> /*
>
>
Good point. I think this was a patch I added when I was debugging other
issues and assumed it would be needed (code in .data segment, seems
naturally a problem, right?) . When I revert the patch though it seems
to work just fine. I suspect the comment about pc relative load is no
longer relevant since I use the relocation trick to properly access
sleep_save_sp in the data section.
Since it's not technically needed, I could drop the patch and add one
adding the comment back saying this was done on purpose. On the other
hand, I wonder if I could do something 'interesting' by modifying
the cpu_resume code since it's writable if I was a malicious
program.
Thanks,
Laura
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2014-08-26 0:43 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-21 1:20 [PATCHv3 0/7] Better page protections for arm64 Laura Abbott
2014-08-21 1:20 ` [PATCHv3 1/7] arm64: Treat handle_arch_irq as a function pointer Laura Abbott
[not found] ` <CAGXu5jLur_gdXs2X5BCmxB6L5HwgyP12jkrufK7bpS0Cxhp_+Q@mail.gmail.com>
2014-08-25 18:23 ` Laura Abbott
2014-08-28 17:02 ` Catalin Marinas
2014-08-21 1:20 ` [PATCHv3 2/7] arm64: Switch to ldr for loading the stub vectors Laura Abbott
2014-08-21 9:30 ` Mark Rutland
2014-08-21 1:20 ` [PATCHv3 3/7] arm64: Move cpu_resume into the text section Laura Abbott
2014-08-25 20:34 ` Stephen Boyd
2014-08-26 0:43 ` Laura Abbott [this message]
2014-08-26 1:08 ` Stephen Boyd
2014-08-21 1:20 ` [PATCHv3 4/7] arm64: Move some head.text functions to executable section Laura Abbott
2014-08-21 10:34 ` Mark Rutland
2014-08-21 21:42 ` Laura Abbott
2014-08-22 9:48 ` Mark Rutland
2014-08-26 0:32 ` Laura Abbott
2014-08-26 17:45 ` Mark Rutland
2014-08-21 1:20 ` [PATCHv3 5/7] arm64: Factor out fixmap initialiation from ioremap Laura Abbott
2014-08-23 5:45 ` Kees Cook
2014-08-25 18:34 ` Laura Abbott
2014-08-21 1:20 ` [PATCHv3 6/7] arm64: use fixmap for text patching when text is RO Laura Abbott
2014-08-23 5:51 ` Kees Cook
2014-08-25 18:38 ` Laura Abbott
2014-08-26 18:36 ` Mark Rutland
2014-08-21 1:20 ` [PATCHv3 7/7] arm64: add better page protections to arm64 Laura Abbott
2014-08-23 5:59 ` Kees Cook
2014-08-25 19:04 ` Laura Abbott
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53FBD834.30507@codeaurora.org \
--to=lauraa@codeaurora.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).