Re: [PATCH net v2] net: stmmac: add clk_prepare_enable() error handling

[Paolo Abeni <pabeni@redhat.com>]

On 11/18/25 3:30 PM, Paolo Abeni wrote:
> On 11/14/25 3:23 PM, Pavel Zhigulin wrote:
>> The driver previously ignored the return value of 'clk_prepare_enable()'
>> for both the CSR clock and the PCLK in 'stmmac_probe_config_dt()' function.
>>
>> Add 'clk_prepare_enable()' return value checks.
>>
>> Found by Linux Verification Center (linuxtesting.org) with SVACE.
>>
>> Fixes: bfab27a146ed ("stmmac: add the experimental PCI support")
>> Signed-off-by: Pavel Zhigulin <Pavel.Zhigulin@kaspersky.com>
>> ---
>> v2: Fix 'ret' value initialization after build bot notification.
>> v1: https://lore.kernel.org/all/20251113134009.79440-1-Pavel.Zhigulin@kaspersky.com/
>>
>>  drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 11 +++++++++--
>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> index 27bcaae07a7f..8f9eb9683d2b 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> @@ -632,7 +632,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
>>  			dev_warn(&pdev->dev, "Cannot get CSR clock\n");
>>  			plat->stmmac_clk = NULL;
>>  		}
>> -		clk_prepare_enable(plat->stmmac_clk);
>> +		rc = clk_prepare_enable(plat->stmmac_clk);
>> +		if (rc < 0)
>> +			dev_warn(&pdev->dev, "Cannot enable CSR clock: %d\n", rc);
>>  	}
>>
>>  	plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
>> @@ -640,7 +642,12 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
>>  		ret = plat->pclk;
>>  		goto error_pclk_get;
>>  	}
>> -	clk_prepare_enable(plat->pclk);
>> +	rc = clk_prepare_enable(plat->pclk);
>> +	if (rc < 0) {
>> +		ret = ERR_PTR(rc);
>> +		dev_err(&pdev->dev, "Cannot enable pclk: %d\n", rc);
>> +		goto error_pclk_get;
>> +	}
> 
> It looks like the driver is supposed to handle the
> IS_ERR_OR_NULL(plat->pclk) condition. This check could cause regression
> on existing setup currently failing to initialize the (optional) clock
> and still being functional.

I'm sorry, ENOCOFFEE above, ->pclk is not NULL nor ERR when
clk_prepare_enable() fails. Still I don't stmmac  code depending pclk
being successfully initialized, and the eventual regression looks like a
real possibility.

/P