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Thu, 23 Apr 2026 14:43:22 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 Date: Thu, 23 Apr 2026 12:40:34 -0600 From: "Kevin Mehall" To: "Mark Brown" , "Chen-Yu Tsai" , "Jernej Skrabec" , "Samuel Holland" , "Mirko Vogt" , "Ralf Schlatterbeck" , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Message-Id: <53c2d366-2d76-4a6d-a72b-99544026ee27@app.fastmail.com> In-Reply-To: <20260423174001.2797797-2-km@kevinmehall.net> References: <20260423174001.2797797-1-km@kevinmehall.net> <20260423174001.2797797-2-km@kevinmehall.net> Subject: Re: [PATCH v2 1/2] spi: sun6i: Honor CS setup delay on the first transfer with native CS Content-Type: text/plain Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260423_114325_586706_BAD900BB X-CRM114-Status: UNSURE ( 8.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org I realized this is incorrect. With a GPIO chip select, sun6i_spi_set_cs() is not called, thus CS_MANUAL would not be set, and the hardware would then automatically assert native CS 0 during the transfer. My testing was with native CS 1 and a second GPIO chip select, so I didn't see this because native CS 0 is not used on the Orange Pi Zero 3. Therefore, I think the best place to set CS_MANUAL is in sun6i_spi_prepare_message as I had in my original patch [1], unless you think it should be duplicated in both places or have a better suggestion of where to set it. sun6i_spi_prepare_message() is still called before set_cs(), so it still fixes the skipped delay. [1]: https://lore.kernel.org/linux-spi/20260420164755.1131645-1-km@kevinmehall.net/