From: wangyijing@huawei.com (Yijing Wang)
To: linux-arm-kernel@lists.infradead.org
Subject: [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces
Date: Fri, 14 Nov 2014 10:16:55 +0800 [thread overview]
Message-ID: <54656617.7090000@huawei.com> (raw)
In-Reply-To: <alpine.DEB.2.11.1411140211480.3935@nanos>
On 2014/11/14 9:31, Thomas Gleixner wrote:
> On Fri, 14 Nov 2014, Yijing Wang wrote:
>
> Could you please use a mail client which does proper line wraps or
> configure yours to do so?
>
>> Associate the irq domain and PCI bus is not necessary, because all
>> PCI buses under same host bridge always share same MSI chip/irq
>> domain, we only need associate them and pci host bridge.
>>
>> I'm refactoring the pci_host_bridge, make it be a generic one, rip
>> out of the pci root bus creation, so we could put the irq domain and
>> pci domain etc.. in it. Finally, we could eliminate lots platform
>> arch functions. I will post it out within one week.
>
> That's a completely orthogonal problem. From the MSI/interrupt
> handling POV it does not matter at all where that information is
> stored. All we care about is that it is retrievable via the (pci)
> device which tries to setup MSI[X].
>
> So we can store/retrieve it via generic functions into/from whatever
> is available right now. If the irq side has generic interfaces to do
> so then this wont conflict with your decisions to change the final
> storage point because all it takes is to tweak the storage/retrieve
> functions.
>
> So all we need at the moment is an agreed on way to store/retrieve
> that information which is based on the current shared infrastructure,
> aka. Linus tree. If we can utilize that you are completely free to
> change the association mechanism underneath.
Hi Thomas, thanks for your explanation. Now I got it,
I will consider more about it.
Thanks!
Yijing.
>
> Thanks,
>
> tglx
>
> .
>
--
Thanks!
Yijing
prev parent reply other threads:[~2014-11-14 2:16 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-13 11:43 [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Jiang Liu
2014-11-13 11:43 ` [Patch V1 1/6] PCI, MSI: Fix errors caused by commit e5f1a59c4e12 Jiang Liu
2014-11-13 11:43 ` [Patch V1 2/6] PCI, MSI: Introduce helpers to hide struct msi_desc implemenation details Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 20:23 ` Marc Zyngier
2014-11-14 0:18 ` Jiang Liu
2014-11-13 11:43 ` [Patch V1 3/6] genirq: Introduce msi_irq_domain_{alloc|free}_irqs() Jiang Liu
2014-11-13 12:34 ` Yijing Wang
2014-11-13 12:41 ` Jiang Liu
2014-11-13 12:57 ` Yijing Wang
2014-11-13 11:43 ` [Patch V1 4/6] genirq: Provide default callbacks for msi_domain_ops Jiang Liu
2014-11-13 11:43 ` [Patch V1 5/6] PCI, MSI: Refine irqdomain interfaces to simplify its usage Jiang Liu
2014-11-13 11:43 ` [Patch V1 6/6] PCI, MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain Jiang Liu
2014-11-13 19:46 ` Marc Zyngier
2014-11-13 12:28 ` [Patch V1 0/6] Refine generic/PCI MSI irqodmian interfaces Yijing Wang
2014-11-13 12:39 ` Jiang Liu
2014-11-13 12:55 ` Yijing Wang
2014-11-13 13:03 ` Jiang Liu
2014-11-13 13:05 ` Jiang Liu
2014-11-13 21:00 ` Marc Zyngier
2014-11-13 21:11 ` Thomas Gleixner
2014-11-13 21:28 ` Marc Zyngier
2014-11-14 15:54 ` Jiang Liu
2014-11-14 16:13 ` Marc Zyngier
2014-11-14 0:25 ` Jiang Liu
2014-11-14 1:09 ` Yijing Wang
2014-11-14 1:22 ` Jiang Liu
2014-11-14 1:31 ` Thomas Gleixner
2014-11-14 1:39 ` Jiang Liu
2014-11-14 12:13 ` Thomas Gleixner
2014-11-14 14:11 ` Yijing Wang
2014-11-14 14:26 ` Jiang Liu
2014-11-14 15:16 ` Marc Zyngier
2014-11-14 15:25 ` Jiang Liu
2014-11-14 16:03 ` Marc Zyngier
2014-11-14 17:11 ` Lucas Stach
2014-11-14 2:16 ` Yijing Wang [this message]
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