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From: daniel.lezcano@linaro.org (Daniel Lezcano)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 04/16] clocksource: time-armada-370-xp: add suspend/resume support
Date: Mon, 17 Nov 2014 22:12:04 +0100	[thread overview]
Message-ID: <546A64A4.7060705@linaro.org> (raw)
In-Reply-To: <1415978496-9334-5-git-send-email-thomas.petazzoni@free-electrons.com>

On 11/14/2014 04:21 PM, Thomas Petazzoni wrote:
> This commit adds a set of suspend/resume syscore_ops to respectively
> save and restore a number of timer registers, in order to make sure
> the clockevent and clocksource devices continue to work properly
> across a suspend/resume cycle.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: linux-kernel at vger.kernel.org

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>


> ---
>   drivers/clocksource/time-armada-370-xp.c | 25 +++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
>
> diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
> index 0451e62..ff37d3a 100644
> --- a/drivers/clocksource/time-armada-370-xp.c
> +++ b/drivers/clocksource/time-armada-370-xp.c
> @@ -43,6 +43,7 @@
>   #include <linux/module.h>
>   #include <linux/sched_clock.h>
>   #include <linux/percpu.h>
> +#include <linux/syscore_ops.h>
>
>   /*
>    * Timer block registers.
> @@ -223,6 +224,28 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = {
>   	.notifier_call = armada_370_xp_timer_cpu_notify,
>   };
>
> +static u32 timer0_ctrl_reg, timer0_local_ctrl_reg;
> +
> +static int armada_370_xp_timer_suspend(void)
> +{
> +	timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF);
> +	timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF);
> +	return 0;
> +}
> +
> +static void armada_370_xp_timer_resume(void)
> +{
> +	writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
> +	writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
> +	writel(timer0_ctrl_reg, timer_base + TIMER_CTRL_OFF);
> +	writel(timer0_local_ctrl_reg, local_base + TIMER_CTRL_OFF);
> +}
> +
> +struct syscore_ops armada_370_xp_timer_syscore_ops = {
> +	.suspend	= armada_370_xp_timer_suspend,
> +	.resume		= armada_370_xp_timer_resume,
> +};
> +
>   static void __init armada_370_xp_timer_common_init(struct device_node *np)
>   {
>   	u32 clr = 0, set = 0;
> @@ -285,6 +308,8 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
>   	/* Immediately configure the timer on the boot CPU */
>   	if (!res)
>   		armada_370_xp_timer_setup(this_cpu_ptr(armada_370_xp_evt));
> +
> +	register_syscore_ops(&armada_370_xp_timer_syscore_ops);
>   }
>
>   static void __init armada_xp_timer_init(struct device_node *np)
>


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  reply	other threads:[~2014-11-17 21:12 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-14 15:21 [PATCHv2 00/16] Suspend to RAM support for Armada XP Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 01/16] Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 02/16] ARM: mvebu: enable strex backoff delay Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 03/16] irqchip: irq-armada-370-xp: suspend/resume support Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 04/16] clocksource: time-armada-370-xp: add " Thomas Petazzoni
2014-11-17 21:12   ` Daniel Lezcano [this message]
2014-11-14 15:21 ` [PATCHv2 05/16] gpio: mvebu: " Thomas Petazzoni
2014-11-27 13:29   ` Linus Walleij
2014-11-27 17:53     ` Jason Cooper
2014-11-27 18:44     ` Thomas Petazzoni
2014-11-28 15:42       ` Linus Walleij
2014-11-30 16:49         ` Jason Cooper
2014-11-30 17:01         ` Jason Cooper
2014-11-14 15:21 ` [PATCHv2 06/16] bus: mvebu-mbus: " Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 07/16] bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 08/16] clk: mvebu: add suspend/resume for gatable clocks Thomas Petazzoni
2014-11-17 22:46   ` Mike Turquette
2014-11-21  8:59     ` Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 09/16] ARM: mvebu: implement suspend/resume support for Armada XP Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 10/16] ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 11/16] ARM: mvebu: Armada XP GP specific suspend/resume code Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 12/16] ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 13/16] ARM: mvebu: synchronize secondary CPU clocks on resume Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 14/16] ARM: mvebu: add suspend/resume DT information for Armada XP GP Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 15/16] ARM: mvebu: adjust mbus controller description on Armada 370/XP Thomas Petazzoni
2014-11-14 15:21 ` [PATCHv2 16/16] ARM: mvebu: add SDRAM controller description for Armada XP Thomas Petazzoni

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