[PATCH v3 0/3] Make Armada 375 use the reference clock when possible

[PATCH v3 0/3] Make Armada 375 use the reference clock when possible

[Ezequiel Garcia]

Hi Daniel, Wim:

Seems we are ready to merge these, unless some objection raises. Do you think
you can take the patches through your trees?

Changes from v2:

  * Fix messed up empty lines, as suggested by Thomas Petazzoni.

Changes from v1:

  * Make the A375 timer and watchdog devicetree binding match the hardware
    and require the two available clocks: core and reference clock.

This series adds support for the 25 MHz reference clock available on
Armada 375 SoC to be used on the timer and watchdog drivers. It is
similar to the one present in Armada XP SoC.

Given we initially had access to only a very early SoC revision (A375 Z1)
and due to a hardware issue, the timer and watchdog support was originally
submitted to use the core clock.

Now that the A0 SoC revision is out, we can fix this and use the reference
clock. The reason for this change is that the core clock is subject to the
SSCG (Spread Spectrum Clock Generator), so boards where SSCG is enabled
exhibit a very large timer drift.

Notice that this change will produce unpleseant results on A375 Z1, given the
reference 25 MHz clock doesn't work properly on that SoC revision.

But since the Z1 revision is not supported by the recently submitted A375
network driver (mvpp2), and therefore nobody is expected to run mainline
(if there are users at all of this early revision), the support will be
dropped entirely in a near future.

To prevent any compatibility issues when booting with an older devicetree,
this series provides proper fall backs in each case.

The series applies on v3.18-rc2.

Ezequiel Garcia (3):
  clocksource: armada-370-xp: Add missing clock enable
  watchdog: orion: Use the reference clock on Armada 375 SoC
  clocksource: armada-370-xp: Use the reference clock on A375 SoC

 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 drivers/clocksource/time-armada-370-xp.c           | 30 ++++++++++++++++
 drivers/watchdog/orion_wdt.c                       | 42 +++++++++++++++++++++-
 4 files changed, 90 insertions(+), 4 deletions(-)

-- 
2.1.0

[PATCH v3 1/3] clocksource: armada-370-xp: Add missing clock enable

[Ezequiel Garcia]

This commit makes sure the timer clock is prepared and enabled
before retrieving its rate.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 drivers/clocksource/time-armada-370-xp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
index 0451e62..d8555f9 100644
--- a/drivers/clocksource/time-armada-370-xp.c
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -293,6 +293,7 @@ static void __init armada_xp_timer_init(struct device_node *np)
 
 	/* The 25Mhz fixed clock is mandatory, and must always be available */
 	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
 	timer_clk = clk_get_rate(clk);
 
 	armada_370_xp_timer_common_init(np);
@@ -305,6 +306,7 @@ static void __init armada_370_timer_init(struct device_node *np)
 	struct clk *clk = of_clk_get(np, 0);
 
 	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
 	timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
 	timer25Mhz = false;
 
-- 
2.1.0

[PATCH v3 2/3] watchdog: orion: Use the reference clock on Armada 375 SoC

[Ezequiel Garcia]

The 25 MHz reference clock has better stability so its use is prefered over the
core clock. Change the Armada 375 clock initialization to use this reference
clock. To ensure the driver is compatible with an old devicetree, also provide
a fallback path which will silently return to the previous behavior.

While here, add the clock specification to the binding documentation.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
 drivers/watchdog/orion_wdt.c                       | 42 +++++++++++++++++++++-
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt
index 97223fd..858ed92 100644
--- a/Documentation/devicetree/bindings/watchdog/marvel.txt
+++ b/Documentation/devicetree/bindings/watchdog/marvel.txt
@@ -17,6 +17,18 @@ For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
 - reg		: A third entry is mandatory and should contain the
                   shared mask/unmask RSTOUT address.
 
+Clocks required for compatibles = "marvell,orion-wdt",
+				  "marvell,armada-370-wdt":
+- clocks : Must contain a single entry describing the clock input
+
+Clocks required for compatibles = "marvell,armada-xp-wdt"
+				  "marvell,armada-375-wdt"
+				  "marvell,armada-380-wdt":
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+  "nbclk" (L2/coherency fabric clock),
+  "fixed" (Reference 25 MHz fixed-clock).
+
 Optional properties:
 
 - interrupts	: Contains the IRQ for watchdog expiration
@@ -30,4 +42,5 @@ Example:
 		interrupts = <3>;
 		timeout-sec = <10>;
 		status = "okay";
+		clocks = <&gate_clk 7>;
 	};
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 00d0741..8cb1ff3 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -114,6 +114,46 @@ static int armada370_wdt_clock_init(struct platform_device *pdev,
 	return 0;
 }
 
+static int armada375_wdt_clock_init(struct platform_device *pdev,
+				    struct orion_watchdog *dev)
+{
+	int ret;
+
+	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+	if (!IS_ERR(dev->clk)) {
+		ret = clk_prepare_enable(dev->clk);
+		if (ret) {
+			clk_put(dev->clk);
+			return ret;
+		}
+
+		atomic_io_modify(dev->reg + TIMER_CTRL,
+				WDT_AXP_FIXED_ENABLE_BIT,
+				WDT_AXP_FIXED_ENABLE_BIT);
+		dev->clk_rate = clk_get_rate(dev->clk);
+
+		return 0;
+	}
+
+	/* Mandatory fallback for proper devicetree backward compatibility */
+	dev->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(dev->clk))
+		return PTR_ERR(dev->clk);
+
+	ret = clk_prepare_enable(dev->clk);
+	if (ret) {
+		clk_put(dev->clk);
+		return ret;
+	}
+
+	atomic_io_modify(dev->reg + TIMER_CTRL,
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
+
+	return 0;
+}
+
 static int armadaxp_wdt_clock_init(struct platform_device *pdev,
 				   struct orion_watchdog *dev)
 {
@@ -394,7 +434,7 @@ static const struct orion_watchdog_data armada375_data = {
 	.rstout_mask_bit = BIT(10),
 	.wdt_enable_bit = BIT(8),
 	.wdt_counter_offset = 0x34,
-	.clock_init = armada370_wdt_clock_init,
+	.clock_init = armada375_wdt_clock_init,
 	.enabled = armada375_enabled,
 	.start = armada375_start,
 	.stop = armada375_stop,
-- 
2.1.0

[PATCH v3 2/3] watchdog: orion: Use the reference clock on Armada 375 SoC

[Gregory CLEMENT]

Hi Ezequiel,

[...]

> +static int armada375_wdt_clock_init(struct platform_device *pdev,
> +				    struct orion_watchdog *dev)
> +{
> +	int ret;
> +
> +	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
> +	if (!IS_ERR(dev->clk)) {
> +		ret = clk_prepare_enable(dev->clk);
> +		if (ret) {
> +			clk_put(dev->clk);
> +			return ret;
> +		}
> +
> +		atomic_io_modify(dev->reg + TIMER_CTRL,
> +				WDT_AXP_FIXED_ENABLE_BIT,
> +				WDT_AXP_FIXED_ENABLE_BIT);
> +		dev->clk_rate = clk_get_rate(dev->clk);
> +
> +		return 0;
> +	}
> +
> +	/* Mandatory fallback for proper devicetree backward compatibility */
> +	dev->clk = clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(dev->clk))
> +		return PTR_ERR(dev->clk);
> +
> +	ret = clk_prepare_enable(dev->clk);
> +	if (ret) {
> +		clk_put(dev->clk);
> +		return ret;
> +	}
> +
> +	atomic_io_modify(dev->reg + TIMER_CTRL,
> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
> +	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
> +
> +	return 0;
> +}

Shouldn't be possible to do the following:

static int armada375_wdt_clock_init(struct platform_device *pdev,
				    struct orion_watchdog *dev)
{
	if (armadaxp_wdt_clock_init(pdev, dev)) {
		/* Mandatory fallback for proper devicetree backward compatibility */
		return armadaxp_wdt_clock_init(pdev, dev));
	}
	return 0;
}

Actually reusing the armadaxp_wdt_clock_init() function  was also suggested by Thomas
on your first version but I didn't find your answer about it.


Thanks,

Gregory


> +
>  static int armadaxp_wdt_clock_init(struct platform_device *pdev,
>  				   struct orion_watchdog *dev)
>  {
> @@ -394,7 +434,7 @@ static const struct orion_watchdog_data armada375_data = {
>  	.rstout_mask_bit = BIT(10),
>  	.wdt_enable_bit = BIT(8),
>  	.wdt_counter_offset = 0x34,
> -	.clock_init = armada370_wdt_clock_init,
> +	.clock_init = armada375_wdt_clock_init,
>  	.enabled = armada375_enabled,
>  	.start = armada375_start,
>  	.stop = armada375_stop,
> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v3 2/3] watchdog: orion: Use the reference clock on Armada 375 SoC

[Ezequiel Garcia]

On 11/10/2014 11:41 AM, Gregory CLEMENT wrote:
> Hi Ezequiel,
> 
> [...]
> 
>> +static int armada375_wdt_clock_init(struct platform_device *pdev,
>> +				    struct orion_watchdog *dev)
>> +{
>> +	int ret;
>> +
>> +	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
>> +	if (!IS_ERR(dev->clk)) {
>> +		ret = clk_prepare_enable(dev->clk);
>> +		if (ret) {
>> +			clk_put(dev->clk);
>> +			return ret;
>> +		}
>> +
>> +		atomic_io_modify(dev->reg + TIMER_CTRL,
>> +				WDT_AXP_FIXED_ENABLE_BIT,
>> +				WDT_AXP_FIXED_ENABLE_BIT);
>> +		dev->clk_rate = clk_get_rate(dev->clk);
>> +
>> +		return 0;
>> +	}
>> +
>> +	/* Mandatory fallback for proper devicetree backward compatibility */
>> +	dev->clk = clk_get(&pdev->dev, NULL);
>> +	if (IS_ERR(dev->clk))
>> +		return PTR_ERR(dev->clk);
>> +
>> +	ret = clk_prepare_enable(dev->clk);
>> +	if (ret) {
>> +		clk_put(dev->clk);
>> +		return ret;
>> +	}
>> +
>> +	atomic_io_modify(dev->reg + TIMER_CTRL,
>> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
>> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
>> +	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
>> +
>> +	return 0;
>> +}
> 
> Shouldn't be possible to do the following:
> 
> static int armada375_wdt_clock_init(struct platform_device *pdev,
> 				    struct orion_watchdog *dev)
> {
> 	if (armadaxp_wdt_clock_init(pdev, dev)) {
> 		/* Mandatory fallback for proper devicetree backward compatibility */
> 		return armadaxp_wdt_clock_init(pdev, dev));

I guess you meant armada370_wdt_clock_init for the fallback?

> 	}
> 	return 0;
> }
> 
> Actually reusing the armadaxp_wdt_clock_init() function  was also suggested by Thomas
> on your first version but I didn't find your answer about it.
> 

I replied here to the same objection on the clocksource driver:
http://www.spinics.net/lists/linux-watchdog/msg05318.html

I found that it's a fragile practice, just to save a few lines of code.
Someone can go and change the 370/xp clock init, in some way that's
incompatible with 375.

I guess I'm being paranoid, but it's a way to keep the code robust and
we are only duplicating a few lines.

-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

[PATCH v3 2/3] watchdog: orion: Use the reference clock on Armada 375 SoC

[Gregory CLEMENT]

On 10/11/2014 15:47, Ezequiel Garcia wrote:
> On 11/10/2014 11:41 AM, Gregory CLEMENT wrote:
>> Hi Ezequiel,
>>
>> [...]
>>
>>> +static int armada375_wdt_clock_init(struct platform_device *pdev,
>>> +				    struct orion_watchdog *dev)
>>> +{
>>> +	int ret;
>>> +
>>> +	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
>>> +	if (!IS_ERR(dev->clk)) {
>>> +		ret = clk_prepare_enable(dev->clk);
>>> +		if (ret) {
>>> +			clk_put(dev->clk);
>>> +			return ret;
>>> +		}
>>> +
>>> +		atomic_io_modify(dev->reg + TIMER_CTRL,
>>> +				WDT_AXP_FIXED_ENABLE_BIT,
>>> +				WDT_AXP_FIXED_ENABLE_BIT);
>>> +		dev->clk_rate = clk_get_rate(dev->clk);
>>> +
>>> +		return 0;
>>> +	}
>>> +
>>> +	/* Mandatory fallback for proper devicetree backward compatibility */
>>> +	dev->clk = clk_get(&pdev->dev, NULL);
>>> +	if (IS_ERR(dev->clk))
>>> +		return PTR_ERR(dev->clk);
>>> +
>>> +	ret = clk_prepare_enable(dev->clk);
>>> +	if (ret) {
>>> +		clk_put(dev->clk);
>>> +		return ret;
>>> +	}
>>> +
>>> +	atomic_io_modify(dev->reg + TIMER_CTRL,
>>> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
>>> +			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
>>> +	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
>>> +
>>> +	return 0;
>>> +}
>>
>> Shouldn't be possible to do the following:
>>
>> static int armada375_wdt_clock_init(struct platform_device *pdev,
>> 				    struct orion_watchdog *dev)
>> {
>> 	if (armadaxp_wdt_clock_init(pdev, dev)) {
>> 		/* Mandatory fallback for proper devicetree backward compatibility */
>> 		return armadaxp_wdt_clock_init(pdev, dev));
> 
> I guess you meant armada370_wdt_clock_init for the fallback?

yes wrong copy and paste

> 
>> 	}
>> 	return 0;
>> }
>>
>> Actually reusing the armadaxp_wdt_clock_init() function  was also suggested by Thomas
>> on your first version but I didn't find your answer about it.
>>
> 
> I replied here to the same objection on the clocksource driver:
> http://www.spinics.net/lists/linux-watchdog/msg05318.html

Thanks i didn't managed to find it.

> 
> I found that it's a fragile practice, just to save a few lines of code.

The purpose was not to save a few line of code but to make the code more
maintainable. If we need to fix something in the one of the aramda370 and
xp function then we also need to do the same in this function.

> Someone can go and change the 370/xp clock init, in some way that's
> incompatible with 375.
> 
> I guess I'm being paranoid, but it's a way to keep the code robust and
> we are only duplicating a few lines.

I see your point and I don't have a strong opinion on my suggestion so:


Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>


Thanks,

Gregory


> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v3 3/3] clocksource: armada-370-xp: Use the reference clock on A375 SoC

[Ezequiel Garcia]

The 25 MHz reference clock has better stability so its use is preferred over the
core clock.

This commit takes advantage of the already introduced Armada 375 devicetree
compatible string and adds a new timer initialization. If available, the timer
will use the reference clock (named as 'fixed'). Otherwise, it falls back to the
previous behavior.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 ++++---
 drivers/clocksource/time-armada-370-xp.c           | 28 ++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
index f455182..e9c78ce 100644
--- a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
+++ b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
@@ -2,8 +2,10 @@ Marvell Armada 370 and Armada XP Timers
 ---------------------------------------
 
 Required properties:
-- compatible: Should be either "marvell,armada-370-timer" or
-  "marvell,armada-xp-timer" as appropriate.
+- compatible: Should be one of the following
+              "marvell,armada-370-timer",
+	      "marvell,armada-375-timer",
+	      "marvell,armada-xp-timer".
 - interrupts: Should contain the list of Global Timer interrupts and
   then local timer interrupts
 - reg: Should contain location and length for timers register. First
@@ -13,7 +15,8 @@ Required properties:
 Clocks required for compatible = "marvell,armada-370-timer":
 - clocks : Must contain a single entry describing the clock input
 
-Clocks required for compatible = "marvell,armada-xp-timer":
+Clocks required for compatibles = "marvell,armada-xp-timer",
+				  "marvell,armada-375-timer":
 - clocks : Must contain an entry for each entry in clock-names.
 - clock-names : Must include the following entries:
   "nbclk" (L2/coherency fabric clock),
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
index d8555f9..3a0704b 100644
--- a/drivers/clocksource/time-armada-370-xp.c
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -301,6 +301,34 @@ static void __init armada_xp_timer_init(struct device_node *np)
 CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
 		       armada_xp_timer_init);
 
+static void __init armada_375_timer_init(struct device_node *np)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_by_name(np, "fixed");
+	if (!IS_ERR(clk)) {
+		clk_prepare_enable(clk);
+		timer_clk = clk_get_rate(clk);
+	} else {
+
+		/*
+		 * This fallback is required in order to retain proper
+		 * devicetree backwards compatibility.
+		 */
+		clk = of_clk_get(np, 0);
+
+		/* Must have at least a clock */
+		BUG_ON(IS_ERR(clk));
+		clk_prepare_enable(clk);
+		timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
+		timer25Mhz = false;
+	}
+
+	armada_370_xp_timer_common_init(np);
+}
+CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
+		       armada_375_timer_init);
+
 static void __init armada_370_timer_init(struct device_node *np)
 {
 	struct clk *clk = of_clk_get(np, 0);
-- 
2.1.0

[PATCH v3 0/3] Make Armada 375 use the reference clock when possible

[Daniel Lezcano]

On 11/04/2014 02:21 PM, Ezequiel Garcia wrote:
> Hi Daniel, Wim:
>
> Seems we are ready to merge these, unless some objection raises. Do you think
> you can take the patches through your trees?

Hi Wim,

I can take through my tree the entire patchset if you want but I need 
your blessing for the watchdog part.

Thanks
   -- Daniel

> Changes from v2:
>
>    * Fix messed up empty lines, as suggested by Thomas Petazzoni.
>
> Changes from v1:
>
>    * Make the A375 timer and watchdog devicetree binding match the hardware
>      and require the two available clocks: core and reference clock.
>
> This series adds support for the 25 MHz reference clock available on
> Armada 375 SoC to be used on the timer and watchdog drivers. It is
> similar to the one present in Armada XP SoC.
>
> Given we initially had access to only a very early SoC revision (A375 Z1)
> and due to a hardware issue, the timer and watchdog support was originally
> submitted to use the core clock.
>
> Now that the A0 SoC revision is out, we can fix this and use the reference
> clock. The reason for this change is that the core clock is subject to the
> SSCG (Spread Spectrum Clock Generator), so boards where SSCG is enabled
> exhibit a very large timer drift.
>
> Notice that this change will produce unpleseant results on A375 Z1, given the
> reference 25 MHz clock doesn't work properly on that SoC revision.
>
> But since the Z1 revision is not supported by the recently submitted A375
> network driver (mvpp2), and therefore nobody is expected to run mainline
> (if there are users at all of this early revision), the support will be
> dropped entirely in a near future.
>
> To prevent any compatibility issues when booting with an older devicetree,
> this series provides proper fall backs in each case.
>
> The series applies on v3.18-rc2.
>
> Ezequiel Garcia (3):
>    clocksource: armada-370-xp: Add missing clock enable
>    watchdog: orion: Use the reference clock on Armada 375 SoC
>    clocksource: armada-370-xp: Use the reference clock on A375 SoC
>
>   .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
>   .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
>   drivers/clocksource/time-armada-370-xp.c           | 30 ++++++++++++++++
>   drivers/watchdog/orion_wdt.c                       | 42 +++++++++++++++++++++-
>   4 files changed, 90 insertions(+), 4 deletions(-)
>


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[PATCH v3 0/3] Make Armada 375 use the reference clock when possible

[Daniel Lezcano]

On 11/19/2014 11:45 AM, Wim Van Sebroeck wrote:
> Hi Daniel,
>
> I'll review before the weekend and will let you know something.
> But everything through one tree is fine by me.

Hi Wim,

did you have time to review this patchset ? I would like to send my PR 
for tglx as soon as possible.

Thanks
   -- Daniel

>
> Kind regards,
> Wim.
>
>> On 11/04/2014 02:21 PM, Ezequiel Garcia wrote:
>>> Hi Daniel, Wim:
>>>
>>> Seems we are ready to merge these, unless some objection raises. Do you
>>> think
>>> you can take the patches through your trees?
>>
>> Hi Wim,
>>
>> I can take through my tree the entire patchset if you want but I need
>> your blessing for the watchdog part.
>>
>> Thanks
>>    -- Daniel
>>
>>> Changes from v2:
>>>
>>>    * Fix messed up empty lines, as suggested by Thomas Petazzoni.
>>>
>>> Changes from v1:
>>>
>>>    * Make the A375 timer and watchdog devicetree binding match the hardware
>>>      and require the two available clocks: core and reference clock.
>>>
>>> This series adds support for the 25 MHz reference clock available on
>>> Armada 375 SoC to be used on the timer and watchdog drivers. It is
>>> similar to the one present in Armada XP SoC.
>>>
>>> Given we initially had access to only a very early SoC revision (A375 Z1)
>>> and due to a hardware issue, the timer and watchdog support was originally
>>> submitted to use the core clock.
>>>
>>> Now that the A0 SoC revision is out, we can fix this and use the reference
>>> clock. The reason for this change is that the core clock is subject to the
>>> SSCG (Spread Spectrum Clock Generator), so boards where SSCG is enabled
>>> exhibit a very large timer drift.
>>>
>>> Notice that this change will produce unpleseant results on A375 Z1, given
>>> the
>>> reference 25 MHz clock doesn't work properly on that SoC revision.
>>>
>>> But since the Z1 revision is not supported by the recently submitted A375
>>> network driver (mvpp2), and therefore nobody is expected to run mainline
>>> (if there are users at all of this early revision), the support will be
>>> dropped entirely in a near future.
>>>
>>> To prevent any compatibility issues when booting with an older devicetree,
>>> this series provides proper fall backs in each case.
>>>
>>> The series applies on v3.18-rc2.
>>>
>>> Ezequiel Garcia (3):
>>>    clocksource: armada-370-xp: Add missing clock enable
>>>    watchdog: orion: Use the reference clock on Armada 375 SoC
>>>    clocksource: armada-370-xp: Use the reference clock on A375 SoC
>>>
>>>   .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
>>>   .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
>>>   drivers/clocksource/time-armada-370-xp.c           | 30 ++++++++++++++++
>>>   drivers/watchdog/orion_wdt.c                       | 42
>>>   +++++++++++++++++++++-
>>>   4 files changed, 90 insertions(+), 4 deletions(-)
>>>
>>
>>
>> --
>>   <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
>>
>> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
>> <http://twitter.com/#!/linaroorg> Twitter |
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>>


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[PATCH v3 0/3] Make Armada 375 use the reference clock when possible

[Daniel Lezcano]

On 11/25/2014 02:34 PM, Wim Van Sebroeck wrote:
> Hi Daniel,
>
> I'm OK with the patchset. You can add my Acked-by.

Thanks. Applied to my tree for 3.19.

   -- Daniel



>
> Kind regards,
> Wim.
>
>> On 11/19/2014 11:45 AM, Wim Van Sebroeck wrote:
>>> Hi Daniel,
>>>
>>> I'll review before the weekend and will let you know something.
>>> But everything through one tree is fine by me.
>>
>> Hi Wim,
>>
>> did you have time to review this patchset ? I would like to send my PR
>> for tglx as soon as possible.
>>
>> Thanks
>>    -- Daniel
>>
>>>
>>> Kind regards,
>>> Wim.
>>>
>>>> On 11/04/2014 02:21 PM, Ezequiel Garcia wrote:
>>>>> Hi Daniel, Wim:
>>>>>
>>>>> Seems we are ready to merge these, unless some objection raises. Do you
>>>>> think
>>>>> you can take the patches through your trees?
>>>>
>>>> Hi Wim,
>>>>
>>>> I can take through my tree the entire patchset if you want but I need
>>>> your blessing for the watchdog part.
>>>>
>>>> Thanks
>>>>    -- Daniel
>>>>
>>>>> Changes from v2:
>>>>>
>>>>>    * Fix messed up empty lines, as suggested by Thomas Petazzoni.
>>>>>
>>>>> Changes from v1:
>>>>>
>>>>>    * Make the A375 timer and watchdog devicetree binding match the
>>>>>    hardware
>>>>>      and require the two available clocks: core and reference clock.
>>>>>
>>>>> This series adds support for the 25 MHz reference clock available on
>>>>> Armada 375 SoC to be used on the timer and watchdog drivers. It is
>>>>> similar to the one present in Armada XP SoC.
>>>>>
>>>>> Given we initially had access to only a very early SoC revision (A375 Z1)
>>>>> and due to a hardware issue, the timer and watchdog support was
>>>>> originally
>>>>> submitted to use the core clock.
>>>>>
>>>>> Now that the A0 SoC revision is out, we can fix this and use the
>>>>> reference
>>>>> clock. The reason for this change is that the core clock is subject to
>>>>> the
>>>>> SSCG (Spread Spectrum Clock Generator), so boards where SSCG is enabled
>>>>> exhibit a very large timer drift.
>>>>>
>>>>> Notice that this change will produce unpleseant results on A375 Z1, given
>>>>> the
>>>>> reference 25 MHz clock doesn't work properly on that SoC revision.
>>>>>
>>>>> But since the Z1 revision is not supported by the recently submitted A375
>>>>> network driver (mvpp2), and therefore nobody is expected to run mainline
>>>>> (if there are users at all of this early revision), the support will be
>>>>> dropped entirely in a near future.
>>>>>
>>>>> To prevent any compatibility issues when booting with an older
>>>>> devicetree,
>>>>> this series provides proper fall backs in each case.
>>>>>
>>>>> The series applies on v3.18-rc2.
>>>>>
>>>>> Ezequiel Garcia (3):
>>>>>    clocksource: armada-370-xp: Add missing clock enable
>>>>>    watchdog: orion: Use the reference clock on Armada 375 SoC
>>>>>    clocksource: armada-370-xp: Use the reference clock on A375 SoC
>>>>>
>>>>>   .../bindings/timer/marvell,armada-370-xp-timer.txt |  9 +++--
>>>>>   .../devicetree/bindings/watchdog/marvel.txt        | 13 +++++++
>>>>>   drivers/clocksource/time-armada-370-xp.c           | 30
>>>>>   ++++++++++++++++
>>>>>   drivers/watchdog/orion_wdt.c                       | 42
>>>>>   +++++++++++++++++++++-
>>>>>   4 files changed, 90 insertions(+), 4 deletions(-)
>>>>>
>>>>
>>>>
>>>> --
>>>>   <http://www.linaro.org/> Linaro.org ? Open source software for ARM
>>>>   SoCs
>>>>
>>>> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
>>>> <http://twitter.com/#!/linaroorg> Twitter |
>>>> <http://www.linaro.org/linaro-blog/> Blog
>>>>
>>
>>
>> --
>>   <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
>>
>> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
>> <http://twitter.com/#!/linaroorg> Twitter |
>> <http://www.linaro.org/linaro-blog/> Blog
>>


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