From mboxrd@z Thu Jan 1 00:00:00 1970 From: pankaj.dubey@samsung.com (Pankaj Dubey) Date: Tue, 09 Dec 2014 11:35:01 +0530 Subject: [PATCH 09/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains In-Reply-To: <1417510196-6714-10-git-send-email-cw00.choi@samsung.com> References: <1417510196-6714-1-git-send-email-cw00.choi@samsung.com> <1417510196-6714-10-git-send-email-cw00.choi@samsung.com> Message-ID: <5486910D.8030606@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Chanwoo, On Tuesday 02 December 2014 02:19 PM, Chanwoo Choi wrote: > This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains > which contain global data buses clocked at up the 400MHz. These blocks > transfer data between DRAM and various sub-blocks. These clock domains > also contain global peripheral buses clocked at 67/111/200/222/266/333/400 > MHz and used for regiser accesses. typo: %s/regiser/register > > Cc: Sylwester Nawrocki > Cc: Tomasz Figa > Cc: Arnd Bergmann > Signed-off-by: Chanwoo Choi > Acked-by: Inki Dae > Acked-by: Geunsik Lim > --- > .../devicetree/bindings/clock/exynos5433-clock.txt | 21 +++ > drivers/clk/samsung/clk-exynos5433.c | 185 ++++++++++++++++++++- > include/dt-bindings/clock/exynos5433.h | 29 +++- > 3 files changed, 232 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > index 9a6ae75..03ae40a 100644 > --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > @@ -25,6 +25,9 @@ Required Properties: > which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs. > - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD > which generates clocks for Cortex-A5/BUS/AUDIO clocks. > + - "samsung,exynos5433-cmu-bus0", "samsung,exynos5433-cmu-bus1" > + and "samsung,exynos5433-cmu-bus2" - clock controller compatible for CMU_BUS > + which generates global data buses clock and global peripheral buses clock. > > - reg: physical base address of the controller and length of memory mapped > region. > @@ -94,6 +97,24 @@ Example 1: Examples of clock controller nodes are listed below. > #clock-cells = <1>; > }; > > + cmu_bus0: clock-controller at 0x13600000 { > + compatible = "samsung,exynos5433-cmu-bus0"; > + reg = <0x13600000 0x0b04>; > + #clock-cells = <1>; > + }; > + > + cmu_bus1: clock-controller at 0x14800000 { > + compatible = "samsung,exynos5433-cmu-bus1"; > + reg = <0x14800000 0x0b04>; > + #clock-cells = <1>; > + }; > + > + cmu_bus2: clock-controller at 0x13400000 { > + compatible = "samsung,exynos5433-cmu-bus2"; > + reg = <0x13400000 0x0b04>; > + #clock-cells = <1>; > + }; > + > Example 2: UART controller node that consumes the clock generated by the clock > controller. > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index 99262e0..5b4ec83 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -425,7 +425,7 @@ static struct samsung_div_clock top_div_clks[] __initdata = { > DIV_TOP2, 0, 3), > > /* DIV_TOP3 */ > - DIV(CLK_DIV_ACLK_IMEM_SSSX, "div_aclk_imem_sssx", > + DIV(CLK_DIV_ACLK_IMEM_SSSX_266, "div_aclk_imem_sssx_266", This change can be moved to patch 1/19 itself. > "mout_bus_pll_user", DIV_TOP3, 24, 3), > DIV(CLK_DIV_ACLK_IMEM_200, "div_aclk_imem_200", > "mout_bus_pll_user", DIV_TOP3, 20, 3), > @@ -440,6 +440,14 @@ static struct samsung_div_clock top_div_clks[] __initdata = { > DIV(CLK_DIV_ACLK_PERIS_66_A, "div_aclk_peris_66_a", > "mout_bus_pll_user", DIV_TOP3, 0, 3), > > + /* DIV_TOP4 */ > + DIV(CLK_DIV_ACLK_G3D_400, "div_aclk_g3d_400", "mout_bus_pll_user", > + DIV_TOP4, 8, 3), > + DIV(CLK_DIV_ACLK_BUS0_400, "div_aclk_bus0_400", "mout_aclk_bus0_400", > + DIV_TOP4, 4, 3), > + DIV(CLK_DIV_ACLK_BUS1_400, "div_aclk_bus1_400", "mout_bus_pll_user", > + DIV_TOP4, 0, 3), > + With these changes you can have: Reviewed-by: Pankaj Dubey Thanks, Pankaj Dubey