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bh=IDAdXdmYQiGftn1IVgZRxHeMgqio9VkUoC0IFVH1RRA=; b=OUWnS9ClHf0H/CmASbIt/lqFPP IeouFZ7ZpMOp7GqEHiLDricPCROGULEFG26AryKFvQvFCc3FczOZl6mE0QhyzEIHKxPtc6JtF3hpA ZlLKr6JxqeSdMOo6UnobPETqjK9ZCdEMCebS+0kSshbphA/T6y8jVyDyBHkd2tTGP5y6dgi69SvQK 1JarMQsE+PgN1/i5PdwS8QpM9lYS+K2OjXcBocW9Pqi1gOmnQdtNt2uNqbuKsjY3SEa8fnPqeqvVZ pirmOnY62g/WJ+ti8y6MLj5fMM8+HCntaesxGpWprqjPOKrZu4lvK9gyZUYsTKTC46tDcmhL91E1I Sansa4XQ==; Received: from [188.251.249.2] (port=48122 helo=[192.168.1.123]) by s1041.use1.mysecurecloudhost.com with esmtpsa (TLS1.3) tls TLS_AES_128_GCM_SHA256 (Exim 4.99.5) (envelope-from ) id 1x2voo-000000074uS-2DE0; Sat, 05 Sep 2026 19:12:51 +0000 Message-ID: <54e99476-1824-4dc8-b0e3-8d95cfb0ca82@reactivated.net> Date: Sat, 5 Sep 2026 20:12:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/5] dt-bindings: iommu: Add Broadcom BCM2712 IOMMU To: Jim Quinlan Cc: "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, nick.hollinghurst@raspberrypi.com, Jason Gunthorpe , Krzysztof Kozlowski References: <20260902-bcm2712-iommu-submit-v4-0-9dbb657578c1@reactivated.net> <20260902-bcm2712-iommu-submit-v4-2-9dbb657578c1@reactivated.net> Content-Language: en-US From: Daniel Drake In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Get-Message-Sender-Via: s1041.use1.mysecurecloudhost.com: authenticated_id: dan@reactivated.net X-Authenticated-Sender: s1041.use1.mysecurecloudhost.com: dan@reactivated.net X-Originating-IP: 192.250.231.249 X-Spampanel-Domain: s1041.use1.mysecurecloudhost.com X-Spampanel-Username: 192.250.231.249 Authentication-Results: antispamcloud.com; auth=pass smtp.auth=192.250.231.249@s1041.use1.mysecurecloudhost.com X-Spampanel-Outgoing-Class: unsure X-Spampanel-Outgoing-Evidence: Combined (0.13) X-Recommended-Action: accept X-Filter-ID: 9kzQTOBWQUFZTohSKvQbgI7ZDo5ubYELi59AwcWUnuVNdYZM0yLKecDbLpFxMoMA7so6Wt9YoFQ0 ccjaCh6XZyu2SmbhJN1U9FKs8X3+Nt06bFpPrNOlRAlE9AVLwR4uGVjKNnzF3nQoDoQtBifM84JL M0i5ZAms0EHrvcCaVIOK9Jzy6E0Hj75Vv8qhxyDUGnT3EFAinyrilm9zau/FuzkQt9Nb4Ml7QXdk EetczWBpY9ovdkP9RmEvieRDWoEFGZ7f+7oeClYYrL6OxfWC1kiZ5sDJvU3vQetKu48NmiFWBb39 uS1TjWG2Inx+Ts2QrtVmombMJ4e2pn5C0yBMHXeC6Fp2UeS7H+y7loLTGzjk6Pnrj57pHasIWjxl 5VQaCkQZW81tMEBQ4bAn0uDrJ9uGRuKPr0Bb/YuPEx8xCp8sVji4cAyRuviG9RNPI/hhtGILrmkE lozHQFHLOT6ky701An1vNgfn8qLx5ufPTavvHrDFUeJkFlrxAO7a4MyxvV6eez/2pXtRk67lE1pK ip0NQbcmUOf5g+Cu/8v2RgiMtHyOAopYGto1ZND1xOhKQ/xOsDxA6gxAbLULxQQNoGJT8d9Ba5wO 9ZizJ7G1fW//V9KstGWt+qElQbzPhH3+DAhJrbM68g8iJLXx/5kDQNyLBKa52mO4ut4dtZCHnpZk unegD6yDtdNYigyY4x8WCqllmv57Tj6tiQZFHltAdzPaTC70bTG5XdYT+TrxfHim0b8ZLR/tc14S MwnwErmAd1N05ar9GFRLmgMiU/Irb3ws3TRjaC42FtNJuTWwh7zOAIws9QcDfaxJBDYI7rc6t8C9 mOBdONdnsxgsk1D2p8400dnId1/Bnfq55U0ALjQbONHJki/bT3w/adEN9DqaO7ZGoOoYIKBVJEt+ vlxtdD4KDYIhXXGWpMdQulPUSP3/u+rFPMBpjpy3GniDZYeA/nyWTY2V77n1/ThmdEcBVb2zTZYK e+y4VTLHb4QDZyifdXZ1LDHmhCkCHFdzUwaYnIl+pXXQe0+n5X3Sj3Z9zZ0bAsC9nfCIZz3Wd8D7 ouPHQoHZm8Gp6aP0g/fJgXX36hVPCCjCaMNz1R77bD91Di9Is0KRF1AETmGxSMUY3jcjCX07Ixtg ncOn+BG3oz5i2+nyE0o1dKxKwo8tSXoc0N9h9klG894O4vkdFH4CpOwgr/U0flMcy2Vi/IcBgY4a vWgQKhj3Fcsd2rNfFFLypQlVWw0YdWfl1Ha0fbK2G35c78ohQjHlOaO6zAzIopnUm4Htr2UEhVEK whm6ser0T44JvUV2HwwnUT2pMXKdjPGEYPejAacuzuzUkO9n7Ku11YfzA0qETuZkqmB/pTfshouq rdtYXg/+3CpdEb6Y59cS5Tfqo1bt/OdiqUKUH++/+IDul3UHH62q70QJKnyATr3RQrMbS5NztA69 WlVxa2oRS2om1AXjIKyh9pGiu58U7RSTTTCtUfm9KZcUI1l5gogDCjHQP3iMwHBrpEjajuxRXxKF 5tPxTxfD0dMN+t5Z2cqRsd3Vtwdcj0q/nQ5H3VMXSjyLr4N9+BUoBAGCvz4YOooXGM1M7qYfB6kv 9uuFsEVjgQXYooY6HFYx801qhKuPoDClMk376TihCdFdWNHrR4SFPNSzcO1VukZGZNCq/2rAztFe klLxGNN3KHaPkPnTQmYnS7QiVQ4H59IGm5iLm7yEMgceH7ChscXf30fVsEVjgQXYooY6HFYx801q hAGsnbPK4M36tRlD+OTrkVw= X-Report-Abuse-To: spam@quarantine16.antispamcloud.com X-Complaints-To: abuse@master.antispamcloud.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260905_121316_167935_3079F177 X-CRM114-Status: GOOD ( 11.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi!, On 03/09/2026 18:36, Jim Quinlan wrote: > What are your thoughts on allowing the iommu work without the cache > property, ie having its presence be optional? I work on the Broadcom > version of the Rpi4/5 SoCs, and (a) on certain workloads the cache > slightly degrades performance or (b) on some chips there is no cache > associated with a specific iommu. This is probably on me to implement > these possibilities, but I just wanted to give you a heads-up. For (a) I think the DT must encode the relationship between iommu & iommuc in any case, because the DT's job is to describe the hardware. If the user wishes to disable use of the iommu cache then that would be a software configuration choice. This control could perhaps be exposed via a module parameter, or by iommu_device_sysfs_add() to expose a writable attribute. Ultimately which approach is suitable would be a decision of the iommu subsystem maintainers. For (b) we could just make the property optional when support for such a chip arrives, or alternatively we could use a different compatible string for the cache-less iommus and have the cache property only required for certain specific compatible strings (see mediatek,iommu.yaml for an example where some properties are only required for certain compatible values). I'd be happy to review patches for these cases once the driver support is added. Thanks! Daniel