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From: sudeep.holla@arm.com (Sudeep Holla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] ARM perf: Fix the pmu node name in warning message
Date: Fri, 01 May 2015 15:20:08 +0100	[thread overview]
Message-ID: <55438B98.2000101@arm.com> (raw)
In-Reply-To: <20150501140757.GC28975@leverpostej>



On 01/05/15 15:07, Mark Rutland wrote:
> On Fri, May 01, 2015 at 02:59:30PM +0100, Sudeep Holla wrote:
>>
>>
>> On 23/04/15 14:50, Will Deacon wrote:
>>> With commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity
>>> property"), we print a warning when we find a PMU SPI with a missing
>>> missing interrupt-affinity property in a pmu node. Unfortunately, we
>>> pass the wrong (NULL) device node to of_node_full_name, resulting in
>>> unhelpful messages such as:
>>>
>>>    hw perfevents: Failed to parse <no-node>/interrupt-affinity[0]
>>>
>>> This patch fixes the name to that of the pmu node.
>>>
>>> Fixes: 9fd85eb502a7 (ARM: pmu: add support for interrupt-affinity property)
>>> Signed-off-by: Will Deacon <will.deacon@arm.com>
>>> ---
>>>    arch/arm/kernel/perf_event_cpu.c | 2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
>>> index becf7ad6eddc..213919ba326f 100644
>>> --- a/arch/arm/kernel/perf_event_cpu.c
>>> +++ b/arch/arm/kernel/perf_event_cpu.c
>>> @@ -322,7 +322,7 @@ static int of_pmu_irq_cfg(struct platform_device *pdev)
>>>    				      i);
>>>    		if (!dn) {
>>>    			pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
>>> -				of_node_full_name(dn), i);
>>> +				of_node_full_name(pdev->dev.of_node), i);
>>>    			break;
>>
>> With old DT we will see this message and one might think perf is broken.
>> But since the code still assumes SPIs are listed in order of *logical*
>> CPU number and continues to work, does it make sense to update the
>> warning accordingly ?
>
> The issue is that while it may work in that configuration, it can easily
> be made to not work. So even if things happen to align, we should warn
> when we don't have explicit information regarding the affinity.
>
> Do you have a suggestion for a better error message to cover that?
>

Yes I thought it could be reworded but since that might make people to
ignore the warning and fail to fix DT. Also as Will suggested in the
other mail we need a way to detect correctness of routing to give more
appropriate message. So it's better to leave it as is.

Regards,
Sudeep

  reply	other threads:[~2015-05-01 14:20 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-23 13:50 [PATCH 1/4] ARM: perf: don't warn about missing interrupt-affinity property for PPIs Will Deacon
2015-04-23 13:50 ` [PATCH 2/4] ARM perf: Fix the pmu node name in warning message Will Deacon
2015-04-23 13:58   ` Mark Rutland
2015-05-01 13:59   ` Sudeep Holla
2015-05-01 14:07     ` Will Deacon
2015-05-01 14:07     ` Mark Rutland
2015-05-01 14:20       ` Sudeep Holla [this message]
2015-04-23 13:50 ` [PATCH 3/4] arm64: perf: don't warn about missing interrupt-affinity property for PPIs Will Deacon
2015-04-23 13:50 ` [PATCH 4/4] arm64: perf: Fix the pmu node name in warning message Will Deacon
2015-04-23 14:01 ` [PATCH 1/4] ARM: perf: don't warn about missing interrupt-affinity property for PPIs Mark Rutland
2015-04-23 14:02   ` Will Deacon
2015-04-23 14:11     ` Mark Rutland
2015-04-23 15:56 ` Maxime Ripard

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