From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDD47C25B74 for ; Thu, 16 May 2024 08:00:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:CC:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vT/NJZ7YBQi9xXGffCyQKzN2yHLQ+xkGbNhvskZmQhY=; b=oNxCme83Y3gDbM U2LnPLauGAXSr9bcz3+iId/0ucnaWlAlR98HDWNIzIO/8u2Yl4IDnLnk5nX8sP1vg04lSqogh/Pe2 vewyhjKou5L522csStW+g8E/yVXLdlnOPZbZAjpEyrojUZOnxNRexKoAUxC3UazagxBl31OCN5ybg h1qutiKiGIUVk2PZRW3GAyxM18RAZsrRsY9iI77atTTVXbbB3sPj4ezoixrkqIdAa/neOKSVLBvmJ zPEM4JYZXb50fI3G35ZpL8AZCeoi7Pg8UETdlhVIzE6bwbHCdOJV+v/ZQq+Kt4ABsGmR5UeY2CZdN HgXsHPeqNgvTL8h5bE1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7W2M-000000043xO-2YHY; Thu, 16 May 2024 08:00:26 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7W2J-000000043wS-1Qzd for linux-arm-kernel@lists.infradead.org; Thu, 16 May 2024 08:00:25 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G7e2A0009990; Thu, 16 May 2024 10:00:03 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= message-id:date:mime-version:subject:to:cc:references:from :in-reply-to:content-type:content-transfer-encoding; s= selector1; bh=Y9trgIEu9RJeCdLikqsHLkO6L244vgMdpxM1Z3pwaD0=; b=Um McVkWGSeyAqG7zib2bWvlJJKU1n11jEEZc09GsrTpzqCiEXZypojsxCIhQ6QGb2R h/85D95WXhwEGLy/EIbDDASXYgx1N9neWTvA7r2fGgB6Ram2rWeAe1YrfAtlcfy8 wwfOFzXocBd8Z0W7NA8jrn9cHAO7OhfaY/5ZriS/jmiH4tZRzWVOWpx8QUJfXTLA gyVWgOjZ7tP0MiI8vnu46iBBTPLOM6ywtH7uujQMgnWfhJvJ0hEp9BAmIIaMTAhH X4D+tcpYqpTsMOrhEIuDyLJa5Z5rBuzsiaCGm0RCL9IIf8QtU+FHgHuNpyPuMPQx jH+uBQgahirt8dZKazAQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3y4sxv4f6v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 10:00:03 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 3999440044; Thu, 16 May 2024 09:59:58 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 39B872122F0; Thu, 16 May 2024 09:58:48 +0200 (CEST) Received: from [10.48.86.79] (10.48.86.79) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 16 May 2024 09:58:47 +0200 Message-ID: <5544e11b-25a8-4465-a7cc-f1e9b1d0f0cc@foss.st.com> Date: Thu, 16 May 2024 09:58:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/11] ARM: dts: stm32: add ethernet1 and ethernet2 for STM32MP135F-DK board To: Marek Vasut , Christophe Roullier , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown CC: , , , , References: <20240426125707.585269-1-christophe.roullier@foss.st.com> <20240426125707.585269-11-christophe.roullier@foss.st.com> <43024130-dcd6-4175-b958-4401edfb5fd8@denx.de> <8bf3be27-3222-422d-bfff-ff67271981d8@foss.st.com> <9c1d80eb-03e7-4d39-b516-cbcae0d50e4a@denx.de> Content-Language: en-US From: Alexandre TORGUE In-Reply-To: <9c1d80eb-03e7-4d39-b516-cbcae0d50e4a@denx.de> X-Originating-IP: [10.48.86.79] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_03,2024-05-15_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240516_010023_771867_F417DD7B X-CRM114-Status: GOOD ( 21.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi On 5/16/24 02:23, Marek Vasut wrote: > On 5/13/24 6:01 PM, Alexandre TORGUE wrote: >> Hi Marek > > Hi, > >> On 4/26/24 17:44, Marek Vasut wrote: >>> On 4/26/24 2:57 PM, Christophe Roullier wrote: >>>> Add dual Ethernet: >>>> -Ethernet1: RMII with crystal >>>> -Ethernet2: RMII without crystal >>>> PHYs used are SMSC (LAN8742A) >>>> >>>> With Ethernet1, we can performed WoL from PHY instead of GMAC point >>>> of view. >>>> (in this case IRQ for WoL is managed as wakeup pin and configured >>>> in OS secure). >>> >>> How does the Linux PHY driver process such a PHY IRQ ? >>> >>> Or is Linux unaware of the PHY IRQ ? Doesn't that cause issues ? >> >> In this case, we want to have an example to wakeup the system from >> Standby low power mode (VDDCPU and VDD_CORE off) thanks to a magic >> packet detected by the PHY. The PHY then assert his interrupt output >> signal. >> On MP13 DK platform, this PHY signal is connected to a specific GPIO >> aka "Wakeup pins" (only 6 wakeup pins an MP13). Those specific GPIOs >> are handled by the PWR peripheral which is controlled by the secure OS. > > What does configure the PHY for this wakeup mode ? Linux device tree. > >> On WoL packet, the Secure OS catches the PHY interrupt and uses >> asynchronous notification mechanism to warn Linux (on our platform we >> use a PPI). On Linux side, Optee core driver creates an irq >> domain/irqchip triggered on the asynchronous notification. Each device >> which use a wakeup pin need then to request an IRQ on this "Optee irq >> domain". >> >> This OPTEE irq domain will be pushed soon. > > I suspect it might make sense to add this WoL part separately from the > actual ethernet DT nodes, so ethernet could land and the WoL > functionality can be added when it is ready ? If at the end we want to have this Wol from PHY then I agree we need to wait. We could push a WoL from MAC for this node before optee driver patches merge but not sure it makes sens. Alex _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel