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Mon, 23 Oct 2023 10:34:20 +0000 (GMT) Message-ID: <55812f75-3053-4970-bbbe-8ca563f33721@samsung.com> Date: Mon, 23 Oct 2023 12:34:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] i2c: exynos5: Calculate t_scl_l, t_scl_h according to i2c spec Content-Language: en-US To: Camel Guo , Krzysztof Kozlowski Cc: Alim Akhtar , linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@axis.com From: Marek Szyprowski In-Reply-To: <20220912085943.1098651-1-camel.guo@axis.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHKsWRmVeSWpSXmKPExsWy7djP87q6PmapBlPnqFo8mLeNzeL76wdM Fp9aVC32vt7KbrHp8TVWi46/XxgtLu+aw2Yx4/w+JgcOj+vrAjzuXNvD5rF5Sb1H35ZVjB6f N8kFsEZx2aSk5mSWpRbp2yVwZSxZvJG14LVsxYJNnA2Mn8W6GDk5JARMJC5/f8jSxcjFISSw glFi28RnUM4XRolTTxayQzifGSWuNvSzw7Rc/X6MEcQWEljOKNE5UxTC/ghkL80HsXkF7CQ6 7k5kA7FZBFQlDp7awAgRF5Q4OfMJC4gtKiAvcf/WDLCZwgKhErNPnGMCsZkFxCVuPZkPZosI REkcmj0J7AhmgQOMEu+fNIM1sAkYSnS97QJawMHBKWAlcXi3D0SvvMT2t3OYQeolBB5wSPz8 sI8R4mgXiaMLV7BA2MISr45vgXpGRuL/TpBlIA3tjBILft+HciYwSjQ8vwXVbS1x59wvsG3M ApoS63fpQ4QdJW7duAkWlhDgk7jxVhDiCD6JSdumM0OEeSU62oQgqtUkZh1fB7f24IVLzBMY lWYhBcssJO/PQvLOLIS9CxhZVjGKp5YW56anFhvlpZbrFSfmFpfmpesl5+duYgQmodP/jn/Z wbj81Ue9Q4xMHIyHGCU4mJVEeGeHm6QK8aYkVlalFuXHF5XmpBYfYpTmYFES51VNkU8VEkhP LEnNTk0tSC2CyTJxcEo1MG29ePjrQavJLbr3ntV8OiVmsnSFfjeH/tR5c3QXCTWUbNpxILLu TR1DiUD0ygq3kG3hoYfPFDlYtM2oXrdQTTbrfNPqnwreTyadrY23XG5dJP32/Nm6e7wdj6Nj /pUeVVmYomjdfjwwyP31gWy5E8rqnZMeL1KrO9m5PGTC/LTeDxOzSst0J7t5amuXSS+LF374 fBO76qT+y7unTGlVWtIZbFdc9Xyz2/PzHHNOKZ0/xCQn6u9tsyeDY839v4dUpDYHLuV5WzmN 8aet+Z9HCdc3PLoR5fPK86Dc9TUOgT3zqqQ+/+Da61iiePR6WR+HtMSeY09uPttn8efjtFRJ hicy+j9iHd34E+rsD2SFpyuxFGckGmoxFxUnAgBTABbBsQMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrIIsWRmVeSWpSXmKPExsVy+t/xe7q6PmapBje+clg8mLeNzeL76wdM Fp9aVC32vt7KbrHp8TVWi46/XxgtLu+aw2Yx4/w+JgcOj+vrAjzuXNvD5rF5Sb1H35ZVjB6f N8kFsEbp2RTll5akKmTkF5fYKkUbWhjpGVpa6BmZWOoZGpvHWhmZKunb2aSk5mSWpRbp2yXo ZSxZvJG14LVsxYJNnA2Mn8W6GDk5JARMJK5+P8bYxcjFISSwlFHi0etTbBAJGYmT0xpYIWxh iT/Xutggit4zSnxqusgMkuAVsJPouDsRrIFFQFXi4KkNjBBxQYmTM5+wgNiiAvIS92/NYAex hQVCJe4unwHWyywgLnHryXwmEFtEIEri/uZXLCALmAUOMEqcXnEOrEFIwFLi7beDYIPYBAwl ut6CXMHBwSlgJXF4tw/EHDOJrq1djBC2vMT2t3OYJzAKzUJyxiwk62YhaZmFpGUBI8sqRpHU 0uLc9NxiI73ixNzi0rx0veT83E2MwLjbduznlh2MK1991DvEyMTBeIhRgoNZSYR3drhJqhBv SmJlVWpRfnxRaU5q8SFGU2BYTGSWEk3OB0Z+Xkm8oZmBqaGJmaWBqaWZsZI4r2dBR6KQQHpi SWp2ampBahFMHxMHp1QDk2Ql/8Mvqzp23JExn/qXwVBRqag810gkjTugwT5Z4Py8j9cCD0w6 FJztMcGwSGLN+U0OvcE6Pw7c4libu1WFn+EfS5/mBPfG7tpz16cYTJT6p7Tm4I9Dmxf7Xj+6 Xbl5vkH8eSXdBMuHltpz1nzOd77JvvFnTU5pHZvl3OK29T32y3jCrmrYyXRsm8huMf2CwZEz 4onJxQtmdbeq3kiKs+yU9O8NDA6TuRxt37h6nt+Pc0n9gtqvrc6JzHh+J1JL6nrWyvIFU7Ue SX8MlprzdN3FL093bTF/fuRi93mJCnORF+vWCZ3rLWNn+nnqCn8hy9cJS4p7J7v8+xBdMeNS wdYtT1ju/r46N/WQ06UEcyWW4oxEQy3mouJEAMYOsqFEAwAA X-CMS-MailID: 20231023103421eucas1p2f1415d69dd979036ef8bcb1a2dc88978 X-Msg-Generator: CA X-RootMTR: 20231023103421eucas1p2f1415d69dd979036ef8bcb1a2dc88978 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20231023103421eucas1p2f1415d69dd979036ef8bcb1a2dc88978 References: <20220912085943.1098651-1-camel.guo@axis.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231023_033429_156055_4D3C4783 X-CRM114-Status: GOOD ( 22.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12.09.2022 10:59, Camel Guo wrote: > Previously the duty cycle was divided equally into h_scl_l, t_scl_h. > This makes the low period of the SCL clock in Fast Mode is only 1.25us > which is way lower than the minimal value (1.3) specified in i2c > specification. In order to make sure t_scl_l, t_scl_h always fullfill > i2c specification, this commit calculates t_scl_l using this formula: > > t_scl_l = clk_cycle * > ((t_low_min + (scl_clock - t_low_min - t_high_min) / 2) / scl_clock) > > where: > t_low_min is the minimal value of low period of the SCL clock in us; > t_high_min is the minimal value of high period of the SCL clock in us; > scl_clock is converted from SCL clock frequency into us. > > Signed-off-by: Camel Guo This sounds reasonable and works fine on all Exynos-based test board I have. Feel free to add: Tested-by: Marek Szyprowski Reviewed-by: Marek Szyprowski > --- > drivers/i2c/busses/i2c-exynos5.c | 34 +++++++++++++++++++++++++++++--- > 1 file changed, 31 insertions(+), 3 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c > index 4a6260d04db2..72bc8adea8d5 100644 > --- a/drivers/i2c/busses/i2c-exynos5.c > +++ b/drivers/i2c/busses/i2c-exynos5.c > @@ -267,7 +267,7 @@ static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c) > * exynos5_i2c_set_timing: updates the registers with appropriate > * timing values calculated > * > - * Timing values for operation are calculated against either 100kHz > + * Timing values for operation are calculated against 100kHz, 400kHz > * or 1MHz controller operating frequency. > * > * Returns 0 on success, -EINVAL if the cycle length cannot > @@ -330,6 +330,23 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) > * > * Constraints: 4 <= temp, 0 <= CLK_DIV < 256, 2 <= clk_cycle <= 510 > * > + * To split SCL clock into low, high periods appropriately, one > + * proportion factor for each I2C mode is used, which is calculated > + * using this formula. > + * ``` > + * ((t_low_min + (scl_clock - t_low_min - t_high_min) / 2) / scl_clock) > + * ``` > + * where: > + * t_low_min is the minimal value of low period of the SCL clock in us; > + * t_high_min is the minimal value of high period of the SCL clock in us; > + * scl_clock is converted from SCL clock frequency into us. > + * > + * Below are the proportion factors for these I2C modes: > + * t_low_min, t_high_min, scl_clock, proportion > + * Standard Mode: 4.7us, 4.0us, 10us, 0.535 > + * Fast Mode: 1.3us, 0.6us, 2.5us, 0.64 > + * Fast-Plus Mode: 0.5us, 0.26us, 1us, 0.62 > + * > */ > t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7; > temp = clkin / op_clk - 8 - t_ftl_cycle; > @@ -343,8 +360,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) > return -EINVAL; > } > > - t_scl_l = clk_cycle / 2; > - t_scl_h = clk_cycle / 2; > + /* > + * Scale clk_cycle to get t_scl_l using the proption factors for individual I2C modes. > + */ > + if (op_clk <= I2C_MAX_STANDARD_MODE_FREQ) > + t_scl_l = clk_cycle * 535 / 1000; > + else if (op_clk <= I2C_MAX_FAST_MODE_FREQ) > + t_scl_l = clk_cycle * 64 / 100; > + else > + t_scl_l = clk_cycle * 62 / 100; > + > + if (t_scl_l > 0xFF) > + t_scl_l = 0xFF; > + t_scl_h = clk_cycle - t_scl_l; > t_start_su = t_scl_l; > t_start_hd = t_scl_l; > t_stop_su = t_scl_l; > > base-commit: ce888220d5c7a805e0e155302a318d5d23e62950 Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel