From: eric.auger@linaro.org (Eric Auger)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] irqchip: GICv3: Skip LPI deactivation
Date: Tue, 11 Aug 2015 11:42:50 +0200 [thread overview]
Message-ID: <55C9C39A.3060208@linaro.org> (raw)
In-Reply-To: <1436447951-22357-4-git-send-email-marc.zyngier@arm.com>
On 07/09/2015 03:19 PM, Marc Zyngier wrote:
> Contrary to other GICv3 interrupts, LPIs do not have an active state
> by virtue of being edge-triggered only (they only have a pending state).
>
> Given this, there is no point trying to deactivate them, and we can
> skip the ICC_DIR_EL1 entierely.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> drivers/irqchip/irq-gic-v3.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 49768fc..e02592b 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -295,10 +295,14 @@ static int gic_irq_get_irqchip_state(struct irq_data *d,
>
> static void gic_eoi_irq(struct irq_data *d)
> {
> - if (static_key_true(&supports_deactivate))
> + if (static_key_true(&supports_deactivate)) {
> + /* No need to deactivate an LPI */
> + if (gic_irq(d) >= 8192)
In case of EOIMode == 0, we do not call EOI. I can't understand whether
it is an issue.
In 4.8.3 Properties of LPI, in 2d note it is written:
"SW must issue a write to EOI to clear the active priorities register,
hence the CPU interface still requires an active state for LPIs, even
through this is not necessary within the redistributor"
Eric
> + return;
> gic_write_dir(gic_irq(d));
> - else
> + } else {
> gic_write_eoir(gic_irq(d));
> + }
> }
>
> static int gic_set_type(struct irq_data *d, unsigned int type)
>
next prev parent reply other threads:[~2015-08-11 9:42 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 13:19 [PATCH 0/6] irqchip: GICv2/v3: Add support for irq_vcpu_affinity Marc Zyngier
2015-07-09 13:19 ` [PATCH 1/6] irqchip: GICv3: Convert to EOImode == 1 Marc Zyngier
2015-08-11 9:14 ` Eric Auger
2015-08-12 12:38 ` Marc Zyngier
2015-07-09 13:19 ` [PATCH 2/6] irqchip: GIC: " Marc Zyngier
2015-08-11 9:15 ` Eric Auger
2015-08-12 13:31 ` Marc Zyngier
2015-08-12 17:40 ` Catalin Marinas
2015-07-09 13:19 ` [PATCH 3/6] irqchip: GICv3: Skip LPI deactivation Marc Zyngier
2015-08-11 9:42 ` Eric Auger [this message]
2015-08-12 13:34 ` Marc Zyngier
2015-08-12 14:28 ` Eric Auger
2015-07-09 13:19 ` [PATCH 4/6] irqchip: GIC: Use chip_data instead of handler_data for cascaded interrupts Marc Zyngier
2015-07-09 21:33 ` Thomas Gleixner
2015-07-10 7:52 ` Marc Zyngier
2015-07-10 8:17 ` Jiang Liu
2015-07-10 8:21 ` Marc Zyngier
2015-08-11 9:45 ` Eric Auger
2015-08-12 13:41 ` Marc Zyngier
2015-07-09 13:19 ` [PATCH 5/6] irqchip: GICv3: Don't deactivate interrupts forwarded to a guest Marc Zyngier
2015-08-11 10:03 ` Eric Auger
2015-08-12 14:20 ` Marc Zyngier
2015-08-12 15:09 ` Eric Auger
2015-08-12 15:40 ` Marc Zyngier
2015-08-12 15:51 ` Eric Auger
2015-07-09 13:19 ` [PATCH 6/6] irqchip: GIC: " Marc Zyngier
2015-08-11 10:06 ` [PATCH 0/6] irqchip: GICv2/v3: Add support for irq_vcpu_affinity Eric Auger
2015-08-12 14:21 ` Marc Zyngier
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