From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
To: Conor Dooley <conor@kernel.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
Avri Altman <avri.altman@wdc.com>,
Bart Van Assche <bvanassche@acm.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Peter Wang <peter.wang@mediatek.com>,
Stanley Jhu <chu.stanley@gmail.com>,
"James E.J. Bottomley" <James.Bottomley@hansenpartnership.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>,
kernel@collabora.com, linux-scsi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 03/24] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant
Date: Fri, 24 Oct 2025 19:51:11 +0200 [thread overview]
Message-ID: <5617400.31r3eYUQgx@workhorse> (raw)
In-Reply-To: <20251024-thrash-amid-d5af186c4319@spud>
On Friday, 24 October 2025 19:13:36 Central European Summer Time Conor Dooley wrote:
> On Thu, Oct 23, 2025 at 09:49:21PM +0200, Nicolas Frattaroli wrote:
>
> > };
> > + - |
> > + #include <dt-bindings/reset/mediatek,mt8196-resets.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + ufshci@16810000 {
> > + compatible = "mediatek,mt8196-ufshci";
> > + reg = <0x16810000 0x2a00>;
> > + interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + clocks = <&ufs_ao_clk 6>,
> > + <&ufs_ao_clk 7>,
> > + <&clk26m>,
> > + <&ufs_ao_clk 3>,
> > + <&clk26m>,
> > + <&ufs_ao_clk 4>,
> > + <&ufs_ao_clk 0>,
> > + <&topckgen 7>,
> > + <&topckgen 41>,
> > + <&topckgen 105>,
> > + <&topckgen 83>,
> > + <&ufs_ao_clk 1>,
> > + <&ufs_ao_clk 2>,
> > + <&topckgen 42>,
> > + <&topckgen 84>,
> > + <&topckgen 102>;
>
> This is absolutely a nitpick thing, but if you end up resubmitting, can
> you pick a consistent format between the two examples your series adds
> for the clocks/clock names?
No problem, will do. IIRC I kept them as a list like this so I could
easily reorder things, but now that I'm fairly sure this order is the
correct one, it's probably best to make this more compact.
Also sorry for the numbers as clock IDs, but MediaTek clock headers
have conflicting symbols and the dt schema example extractor dumps
all examples into one dts file. :(
Since this has bugged me in the past, and many schemas may rely on
the concat behaviour now: would a patch in the distant future that
prefixes all MediaTek clock binding headers with the SoC name be
acceptable if it keeps the old names intact as aliases to them with
a #ifndef guard?
I should also think about some way we can avoid similar bindings
symbol naming mishaps in the future.
Thank you for pointing me in the right direction with regards to
the binding!
Kind regards,
Nicolas Frattaroli
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> pw-bot: not-applicable
>
> > + clock-names = "ufs",
> > + "ufs_aes",
> > + "ufs_tick",
> > + "unipro_sysclk",
> > + "unipro_tick",
> > + "unipro_mp_bclk",
> > + "ufs_tx_symbol",
> > + "ufs_mem_sub",
> > + "crypt_mux",
> > + "crypt_lp",
> > + "crypt_perf",
> > + "ufs_rx_symbol0",
> > + "ufs_rx_symbol1",
> > + "ufs_sel",
> > + "ufs_sel_min_src",
> > + "ufs_sel_max_src";
> > +
> > + operating-points-v2 = <&ufs_opp_table>;
> > +
> > + phys = <&ufsphy>;
> > +
> > + avdd09-supply = <&mt6363_vsram_modem>;
> > + vcc-supply = <&mt6363_vemc>;
> > + vcc-supply-1p8;
> > + vccq-supply = <&mt6363_va12_2>;
> > + vccq2-supply = <&mt6363_vufs12>;
> > +
> > + resets = <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_UNIPRO>,
> > + <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_CRYPTO>,
> > + <&ufs_ao_clk MT8196_UFSAO_RST1_UFSHCI>;
> > + reset-names = "unipro", "crypto", "hci";
> > + mediatek,ufs-disable-mcq;
> > + };
> >
>
next prev parent reply other threads:[~2025-10-24 17:51 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-23 19:49 [PATCH v3 00/24] MediaTek UFS Cleanup and MT8196 Enablement Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 01/24] dt-bindings: phy: Add mediatek,mt8196-ufsphy variant Nicolas Frattaroli
2025-10-24 17:09 ` Conor Dooley
2025-10-23 19:49 ` [PATCH v3 02/24] dt-bindings: ufs: mediatek,ufs: Complete the binding Nicolas Frattaroli
2025-10-24 17:25 ` Conor Dooley
2025-11-04 5:43 ` Chaotian Jing (井朝天)
2025-10-23 19:49 ` [PATCH v3 03/24] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant Nicolas Frattaroli
2025-10-24 17:13 ` Conor Dooley
2025-10-24 17:51 ` Nicolas Frattaroli [this message]
2025-10-26 22:25 ` Conor Dooley
2025-10-23 19:49 ` [PATCH v3 04/24] scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 05/24] phy: mediatek: ufs: Add support for resets Nicolas Frattaroli
2025-10-24 9:06 ` Philipp Zabel
2025-10-23 19:49 ` [PATCH v3 06/24] scsi: ufs: mediatek: Rework resets Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 07/24] scsi: ufs: mediatek: Rework 0.9V regulator Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 08/24] scsi: ufs: mediatek: Rework init function Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 09/24] scsi: ufs: mediatek: Rework the crypt-boost stuff Nicolas Frattaroli
2025-11-04 7:28 ` Chaotian Jing (井朝天)
2025-11-10 9:19 ` Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 10/24] scsi: ufs: mediatek: Rework probe function Nicolas Frattaroli
2025-11-05 6:28 ` Chaotian Jing (井朝天)
2025-11-10 9:23 ` Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 11/24] scsi: ufs: mediatek: Remove vendor kernel quirks cruft Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 12/24] scsi: ufs: mediatek: Use the common PHY framework Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 13/24] scsi: ufs: mediatek: Switch to newer PM ops helpers Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 14/24] scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 15/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 16/24] scsi: ufs: mediatek: Add vendor prefix to clk-scale-up-vcore-min Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 17/24] scsi: ufs: mediatek: Clean up logging prints Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 18/24] scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 19/24] scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 20/24] scsi: ufs: mediatek: Rework hardware version reading Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 21/24] scsi: ufs: mediatek: Back up idle timer in per-instance struct Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 22/24] scsi: ufs: mediatek: Make scale_us in setup_clk_gating const Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 23/24] scsi: ufs: mediatek: Remove ret local from link_startup_notify Nicolas Frattaroli
2025-10-23 19:49 ` [PATCH v3 24/24] scsi: ufs: mediatek: Add MT8196 compatible, update copyright Nicolas Frattaroli
2025-10-24 9:00 ` [PATCH v3 00/24] MediaTek UFS Cleanup and MT8196 Enablement AngeloGioacchino Del Regno
2025-10-24 17:22 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5617400.31r3eYUQgx@workhorse \
--to=nicolas.frattaroli@collabora.com \
--cc=James.Bottomley@hansenpartnership.com \
--cc=alim.akhtar@samsung.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=avri.altman@wdc.com \
--cc=broonie@kernel.org \
--cc=bvanassche@acm.org \
--cc=chu.stanley@gmail.com \
--cc=chunfeng.yun@mediatek.com \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kernel@collabora.com \
--cc=kishon@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-scsi@vger.kernel.org \
--cc=louisalexis.eyraud@collabora.com \
--cc=martin.petersen@oracle.com \
--cc=matthias.bgg@gmail.com \
--cc=p.zabel@pengutronix.de \
--cc=peter.wang@mediatek.com \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).