[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[WingMan Kwok]

This patch adds the required PCI serdes bindings whcih can then be
enabled by setting the corresponding statuses to "ok" in order to
configure and start the PCI serdes.

This patch depends on the updates to the Keystone PCIe host driver
and common serdes driver patch series that is submitted separately.

Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
---
 arch/arm/boot/dts/k2e.dtsi      |   21 +++++++++++++++++++++
 arch/arm/boot/dts/keystone.dtsi |   21 +++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
index 675fb8e..3b36575 100644
--- a/arch/arm/boot/dts/k2e.dtsi
+++ b/arch/arm/boot/dts/k2e.dtsi
@@ -86,6 +86,16 @@
 			gpio,syscon-dev = <&devctrl 0x240>;
 		};
 
+		pcie1_phy: pciephy at 2326000 {
+			#phy-cells = <0>;
+			compatible = "ti,keystone-serdes-pcie";
+			reg = <0x02326000 0x4000>;
+			reg-names = "serdes";
+			link-rate-kbps = <5000000>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie1: pcie at 21020000 {
 			compatible = "ti,keystone-pcie","snps,dw-pcie";
 			clocks = <&clkpcie1>;
@@ -130,6 +140,17 @@
 					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
 					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
 			};
+
+			/* PCIE phy */
+			serdeses {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				serdes at 0 {
+					reg = <0>;
+					phys = <&pcie1_phy>;
+				};
+			};
+
 		};
 
 		mdio: mdio at 24200f00 {
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 72816d6..6566cc4 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -275,6 +275,16 @@
 			ti,syscon-dev = <&devctrl 0x2a0>;
 		};
 
+		pcie0_phy: pciephy at 2320000 {
+			#phy-cells = <0>;
+			compatible = "ti,keystone-serdes-pcie";
+			reg = <0x02320000 0x4000>;
+			reg-names = "serdes";
+			link-rate-kbps = <5000000>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie0: pcie at 21800000 {
 			compatible = "ti,keystone-pcie", "snps,dw-pcie";
 			clocks = <&clkpcie>;
@@ -319,6 +329,17 @@
 					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
 					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
 			};
+
+			/* PCIE phy */
+			serdeses {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				serdes at 0 {
+					reg = <0>;
+					phys = <&pcie0_phy>;
+				};
+			};
+
 		};
 	};
 };
-- 
1.7.9.5

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[Roger Quadros]

WingMan,

On 15/10/15 17:27, WingMan Kwok wrote:
> This patch adds the required PCI serdes bindings whcih can then be
> enabled by setting the corresponding statuses to "ok" in order to
> configure and start the PCI serdes.
> 
> This patch depends on the updates to the Keystone PCIe host driver
> and common serdes driver patch series that is submitted separately.
> 
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> ---
>  arch/arm/boot/dts/k2e.dtsi      |   21 +++++++++++++++++++++
>  arch/arm/boot/dts/keystone.dtsi |   21 +++++++++++++++++++++
>  2 files changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> index 675fb8e..3b36575 100644
> --- a/arch/arm/boot/dts/k2e.dtsi
> +++ b/arch/arm/boot/dts/k2e.dtsi
> @@ -86,6 +86,16 @@
>  			gpio,syscon-dev = <&devctrl 0x240>;
>  		};
>  
> +		pcie1_phy: pciephy at 2326000 {

Should be
		pcie1_phy: phy at 2326000 {

> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02326000 0x4000>;
> +			reg-names = "serdes";
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie1: pcie at 21020000 {
>  			compatible = "ti,keystone-pcie","snps,dw-pcie";
>  			clocks = <&clkpcie1>;
> @@ -130,6 +140,17 @@
>  					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
>  					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
>  			};
> +
> +			/* PCIE phy */
> +			serdeses {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				serdes at 0 {
> +					reg = <0>;
> +					phys = <&pcie1_phy>;
> +				};
> +			};
> +
>  		};
>  
>  		mdio: mdio at 24200f00 {
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index 72816d6..6566cc4 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -275,6 +275,16 @@
>  			ti,syscon-dev = <&devctrl 0x2a0>;
>  		};
>  
> +		pcie0_phy: pciephy at 2320000 {

ditto.

> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02320000 0x4000>;
> +			reg-names = "serdes";
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie0: pcie at 21800000 {
>  			compatible = "ti,keystone-pcie", "snps,dw-pcie";
>  			clocks = <&clkpcie>;
> @@ -319,6 +329,17 @@
>  					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
>  					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
>  			};
> +
> +			/* PCIE phy */
> +			serdeses {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				serdes at 0 {
> +					reg = <0>;
> +					phys = <&pcie0_phy>;
> +				};
> +			};
> +
>  		};
>  	};
>  };
> 

--
cheers,
-roger

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[Kwok, WingMan]

Roger,

> -----Original Message-----
> From: Quadros, Roger
> Sent: Friday, October 16, 2015 3:56 AM
> To: Kwok, WingMan; robh+dt at kernel.org; pawel.moll at arm.com;
> mark.rutland at arm.com; ijc+devicetree at hellion.org.uk; galak at codeaurora.org;
> KISHON VIJAY ABRAHAM; Karicheri, Muralidharan; bhelgaas at google.com;
> ssantosh at kernel.org; linux at arm.linux.org.uk; devicetree at vger.kernel.org;
> linux-kernel at vger.kernel.org; linux-pci at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings
> 
> WingMan,
> 
> On 15/10/15 17:27, WingMan Kwok wrote:
> > This patch adds the required PCI serdes bindings whcih can then be
> > enabled by setting the corresponding statuses to "ok" in order to
> > configure and start the PCI serdes.
> >
> > This patch depends on the updates to the Keystone PCIe host driver
> > and common serdes driver patch series that is submitted separately.
> >
> > Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> > ---
> >  arch/arm/boot/dts/k2e.dtsi      |   21 +++++++++++++++++++++
> >  arch/arm/boot/dts/keystone.dtsi |   21 +++++++++++++++++++++
> >  2 files changed, 42 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> > index 675fb8e..3b36575 100644
> > --- a/arch/arm/boot/dts/k2e.dtsi
> > +++ b/arch/arm/boot/dts/k2e.dtsi
> > @@ -86,6 +86,16 @@
> >  			gpio,syscon-dev = <&devctrl 0x240>;
> >  		};
> >
> > +		pcie1_phy: pciephy at 2326000 {
> 
> Should be
> 		pcie1_phy: phy at 2326000 {
> 

will change in next version.

> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02326000 0x4000>;
> > +			reg-names = "serdes";
> > +			link-rate-kbps = <5000000>;
> > +			num-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie1: pcie at 21020000 {
> >  			compatible = "ti,keystone-pcie","snps,dw-pcie";
> >  			clocks = <&clkpcie1>;
> > @@ -130,6 +140,17 @@
> >  					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
> >  					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
> >  			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes at 0 {
> > +					reg = <0>;
> > +					phys = <&pcie1_phy>;
> > +				};
> > +			};
> > +
> >  		};
> >
> >  		mdio: mdio at 24200f00 {
> > diff --git a/arch/arm/boot/dts/keystone.dtsi
> b/arch/arm/boot/dts/keystone.dtsi
> > index 72816d6..6566cc4 100644
> > --- a/arch/arm/boot/dts/keystone.dtsi
> > +++ b/arch/arm/boot/dts/keystone.dtsi
> > @@ -275,6 +275,16 @@
> >  			ti,syscon-dev = <&devctrl 0x2a0>;
> >  		};
> >
> > +		pcie0_phy: pciephy at 2320000 {
> 
> ditto.
> 

will change in next version.

> > +			#phy-cells = <0>;
> > +			compatible = "ti,keystone-serdes-pcie";
> > +			reg = <0x02320000 0x4000>;
> > +			reg-names = "serdes";
> > +			link-rate-kbps = <5000000>;
> > +			num-lanes = <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie0: pcie at 21800000 {
> >  			compatible = "ti,keystone-pcie", "snps,dw-pcie";
> >  			clocks = <&clkpcie>;
> > @@ -319,6 +329,17 @@
> >  					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
> >  					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
> >  			};
> > +
> > +			/* PCIE phy */
> > +			serdeses {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				serdes at 0 {
> > +					reg = <0>;
> > +					phys = <&pcie0_phy>;
> > +				};
> > +			};
> > +
> >  		};
> >  	};
> >  };
> >
> 
> --
> cheers,
> -roger

Thanks,
WingMan

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[WingMan Kwok]

This patch adds the serdes phy driver dts bindings
for the keystone PCIe host driver.

Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
---
 arch/arm/boot/dts/k2e.dtsi      |   10 ++++++++++
 arch/arm/boot/dts/keystone.dtsi |   10 ++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
index 675fb8e..5f7cc0a 100644
--- a/arch/arm/boot/dts/k2e.dtsi
+++ b/arch/arm/boot/dts/k2e.dtsi
@@ -86,6 +86,15 @@
 			gpio,syscon-dev = <&devctrl 0x240>;
 		};
 
+		pcie1_phy: phy at 2326000 {
+			#phy-cells = <0>;
+			compatible = "ti,keystone-serdes-pcie";
+			reg = <0x02326000 0x4000>;
+			link-rate-kbps = <5000000>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie1: pcie at 21020000 {
 			compatible = "ti,keystone-pcie","snps,dw-pcie";
 			clocks = <&clkpcie1>;
@@ -99,6 +108,7 @@
 			status = "disabled";
 			device_type = "pci";
 			num-lanes = <2>;
+			phys = <&pcie1_phy>;
 
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 7>;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 72816d6..5c7c58a 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -275,6 +275,15 @@
 			ti,syscon-dev = <&devctrl 0x2a0>;
 		};
 
+		pcie0_phy: phy at 2320000 {
+			#phy-cells = <0>;
+			compatible = "ti,keystone-serdes-pcie";
+			reg = <0x02320000 0x4000>;
+			link-rate-kbps = <5000000>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie0: pcie at 21800000 {
 			compatible = "ti,keystone-pcie", "snps,dw-pcie";
 			clocks = <&clkpcie>;
@@ -288,6 +297,7 @@
 			status = "disabled";
 			device_type = "pci";
 			num-lanes = <2>;
+			phys = <&pcie0_phy>;
 
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 7>;
-- 
1.7.9.5

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[Kwok, WingMan]

Hi,

Please ignore the subject patch which is exactly
the same as the one

[PATCH v1] ARM: keystone: dts: add PCI serdes driver bindings

submitted earlier.

Thanks,
WingMan

> -----Original Message-----
> From: Kwok, WingMan
> Sent: Wednesday, October 21, 2015 8:57 AM
> To: robh+dt at kernel.org; pawel.moll at arm.com; mark.rutland at arm.com;
> ijc+devicetree at hellion.org.uk; galak at codeaurora.org; KISHON VIJAY ABRAHAM;
> Quadros, Roger; Karicheri, Muralidharan; bhelgaas at google.com;
> ssantosh at kernel.org; linux at arm.linux.org.uk; devicetree at vger.kernel.org;
> linux-kernel at vger.kernel.org; linux-pci at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org
> Cc: Kwok, WingMan
> Subject: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings
> 
> This patch adds the serdes phy driver dts bindings
> for the keystone PCIe host driver.
> 
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> ---
>  arch/arm/boot/dts/k2e.dtsi      |   10 ++++++++++
>  arch/arm/boot/dts/keystone.dtsi |   10 ++++++++++
>  2 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> index 675fb8e..5f7cc0a 100644
> --- a/arch/arm/boot/dts/k2e.dtsi
> +++ b/arch/arm/boot/dts/k2e.dtsi
> @@ -86,6 +86,15 @@
>  			gpio,syscon-dev = <&devctrl 0x240>;
>  		};
> 
> +		pcie1_phy: phy at 2326000 {
> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02326000 0x4000>;
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie1: pcie at 21020000 {
>  			compatible = "ti,keystone-pcie","snps,dw-pcie";
>  			clocks = <&clkpcie1>;
> @@ -99,6 +108,7 @@
>  			status = "disabled";
>  			device_type = "pci";
>  			num-lanes = <2>;
> +			phys = <&pcie1_phy>;
> 
>  			#interrupt-cells = <1>;
>  			interrupt-map-mask = <0 0 0 7>;
> diff --git a/arch/arm/boot/dts/keystone.dtsi
> b/arch/arm/boot/dts/keystone.dtsi
> index 72816d6..5c7c58a 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -275,6 +275,15 @@
>  			ti,syscon-dev = <&devctrl 0x2a0>;
>  		};
> 
> +		pcie0_phy: phy at 2320000 {
> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02320000 0x4000>;
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie0: pcie at 21800000 {
>  			compatible = "ti,keystone-pcie", "snps,dw-pcie";
>  			clocks = <&clkpcie>;
> @@ -288,6 +297,7 @@
>  			status = "disabled";
>  			device_type = "pci";
>  			num-lanes = <2>;
> +			phys = <&pcie0_phy>;
> 
>  			#interrupt-cells = <1>;
>  			interrupt-map-mask = <0 0 0 7>;
> --
> 1.7.9.5

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[santosh.shilimkar at oracle.com]

On 10/21/15 5:57 AM, WingMan Kwok wrote:
> This patch adds the serdes phy driver dts bindings
> for the keystone PCIe host driver.
>
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> ---
Keep me posted when driver gets merged. I will then
pick this up.

Regards,
Santosh

[PATCH] ARM: keystone: dts: add PCI serdes driver bindings

[Bjorn Helgaas]

Hi WingMan, 

On Thu, Oct 15, 2015 at 10:27:10AM -0400, WingMan Kwok wrote:
> This patch adds the required PCI serdes bindings whcih can then be
> enabled by setting the corresponding statuses to "ok" in order to
> configure and start the PCI serdes.
> 
> This patch depends on the updates to the Keystone PCIe host driver
> and common serdes driver patch series that is submitted separately.
> 
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>

Is there a reason to separate the binding update from the PCIe host
driver update?  It would make sense to me to have them in the same
patch to make it easier to keep them consistent.

Bjorn

> ---
>  arch/arm/boot/dts/k2e.dtsi      |   21 +++++++++++++++++++++
>  arch/arm/boot/dts/keystone.dtsi |   21 +++++++++++++++++++++
>  2 files changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
> index 675fb8e..3b36575 100644
> --- a/arch/arm/boot/dts/k2e.dtsi
> +++ b/arch/arm/boot/dts/k2e.dtsi
> @@ -86,6 +86,16 @@
>  			gpio,syscon-dev = <&devctrl 0x240>;
>  		};
>  
> +		pcie1_phy: pciephy at 2326000 {
> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02326000 0x4000>;
> +			reg-names = "serdes";
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie1: pcie at 21020000 {
>  			compatible = "ti,keystone-pcie","snps,dw-pcie";
>  			clocks = <&clkpcie1>;
> @@ -130,6 +140,17 @@
>  					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
>  					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
>  			};
> +
> +			/* PCIE phy */
> +			serdeses {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				serdes at 0 {
> +					reg = <0>;
> +					phys = <&pcie1_phy>;
> +				};
> +			};
> +
>  		};
>  
>  		mdio: mdio at 24200f00 {
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index 72816d6..6566cc4 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -275,6 +275,16 @@
>  			ti,syscon-dev = <&devctrl 0x2a0>;
>  		};
>  
> +		pcie0_phy: pciephy at 2320000 {
> +			#phy-cells = <0>;
> +			compatible = "ti,keystone-serdes-pcie";
> +			reg = <0x02320000 0x4000>;
> +			reg-names = "serdes";
> +			link-rate-kbps = <5000000>;
> +			num-lanes = <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie0: pcie at 21800000 {
>  			compatible = "ti,keystone-pcie", "snps,dw-pcie";
>  			clocks = <&clkpcie>;
> @@ -319,6 +329,17 @@
>  					<GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
>  					<GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
>  			};
> +
> +			/* PCIE phy */
> +			serdeses {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				serdes at 0 {
> +					reg = <0>;
> +					phys = <&pcie0_phy>;
> +				};
> +			};
> +
>  		};
>  	};
>  };
> -- 
> 1.7.9.5
> 
> --
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