[PATCH v1 0/2] fix the TSHUT issue on rockchip thermal

[PATCH v1 0/2] fix the TSHUT issue on rockchip thermal

[Caesar Wang]

We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

Says:
The TSHUT temperature is setting more than 80 degree, the default
tshut polarity is HIGH.

If T > 80C, the OTP output the High Signal.
If T < 80C, the OTP output the Low Signal.

On the moment, the TSADC controller is reset, the tshut polarity will be
Low in a short period of time.

So:
If T < 80C, the OTP output the High Signal.
If T > 80C, the OTP output the Low Signal.

In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can
accept the reset response time to avoid this issue.

In other words, the system will be always reboot if we make the OTP pin
is connected the others IC to control the power.

This series patchs are depend on Doug's patch.(https://patchwork.kernel.org/patch/7454081/)

This series patchs are based on the Linus master branch.

c51a571 ARM: dts: rockchip: Add the OTP gpio pinctrl
e1ecae4 dt-bindings: Sync the dts to this document
150426c drivers/pinctrl: Add the concept of an "init" state
ce1fad2 Merge branch 'keys-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs
1099f86 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
911b79c KEYS: Don't permit request_key() to construct a new keyring
37850e3 net: bcmgenet: Fix early link interrupt enabling
afc050d Merge tag 'wireless-drivers-for-davem-2015-10-17' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers
e277de5 tunnels: Don't require remote endpoint or ID during creation.
740dbc2 openvswitch: Scrub skb between namespaces
....

Tested on box board.


Changes in v1:
  - As the Doug comments, add the 'init' property to sync document.
  - As the Doug comments, drop the thermal driver patchs since
    we can with pinctrl changing to work.
  - As the Doug's patch to add the 'init' property.

Caesar Wang (2):
  dt-bindings: Sync the dts to this document
  ARM: dts: rockchip: Add the OTP gpio pinctrl

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
 arch/arm/boot/dts/rk3288.dtsi                                  | 9 +++++++--
 2 files changed, 10 insertions(+), 4 deletions(-)

-- 
1.9.1

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Caesar Wang]

Add the OTP gpio state, we need switch the pin to gpio state
before the TSADC controller is reset.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v1:
  - As the Doug comments, add the 'init' property to sync document.

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index ef802de..28e84f7 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -27,8 +27,9 @@ tsadc: tsadc at ff280000 {
 	clock-names = "tsadc", "apb_pclk";
 	resets = <&cru SRST_TSADC>;
 	reset-names = "tsadc-apb";
-	pinctrl-names = "default";
-	pinctrl-0 = <&otp_out>;
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&otp_gpio>;
+	pinctrl-1 = <&otp_out>;
 	#thermal-sensor-cells = <1>;
 	rockchip,hw-tshut-temp = <95000>;
 	rockchip,hw-tshut-mode = <0>;
-- 
1.9.1

[PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl

[Caesar Wang]

We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v1:
  - As the Doug comments, drop the thermal driver patchs since
    we can with pinctrl changing to work.
  - As the Doug's patch to add the 'init' property.

 arch/arm/boot/dts/rk3288.dtsi | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 906e938..6ea89aa 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -447,8 +447,9 @@
 		clock-names = "tsadc", "apb_pclk";
 		resets = <&cru SRST_TSADC>;
 		reset-names = "tsadc-apb";
-		pinctrl-names = "default";
-		pinctrl-0 = <&otp_out>;
+		pinctrl-names = "init", "default";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
 		#thermal-sensor-cells = <1>;
 		rockchip,hw-tshut-temp = <95000>;
 		status = "disabled";
@@ -1273,6 +1274,10 @@
 		};
 
 		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
 			otp_out: otp-out {
 				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
 			};
-- 
1.9.1

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Doug Anderson]

Hi,

On Tue, Oct 20, 2015 at 7:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> Add the OTP gpio state, we need switch the pin to gpio state
> before the TSADC controller is reset.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v1:
>   - As the Doug comments, add the 'init' property to sync document.
>
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

Seems reasonable to me.  I do wonder if we need to make it more
obvious that things might glitch if the "init" pinctrl isn't there?
...probably not too critical unless others think it needs to be more
obvious...

Reviewed-by: Douglas Anderson <dianders@chromium.org>

[PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl

[Doug Anderson]

Caesar,

On Tue, Oct 20, 2015 at 7:43 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> We need the OTP pin is gpio state before resetting the TSADC controller,
> since the tshut polarity will generate a high signal.

It might or might not be "high" depending on polarity, right?  It's
just possible that it could glitch during probe.  Other than that nit,
this seems fine to me.

If it's not too much trouble it'd be nice if you could spin with the
description change.  Otherwise:

Reviewed-by: Douglas Anderson <dianders@chromium.org>

[PATCH v1 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl

[Doug Anderson]

Caesar,

On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> I think the description is right,   maybe need other decriptions.
> The tshut polarity is low in a short period of time when the TSADC
> controller is reset.
>
> In other words,
>
> If T < (setting temperature), the OTP output the High Signal. ------> if the
> otp out polarity is high, the TSHUT will work.
> If T > (setting temperature), the OTP output the Low Signal.

Ah!  I re-read the cover letter more carefully and now I see.  OK, I
think your current description is fine, then.  ;)

-Doug

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Rob Herring]

On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> Add the OTP gpio state, we need switch the pin to gpio state
> before the TSADC controller is reset.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v1:
>   - As the Doug comments, add the 'init' property to sync document.
>
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index ef802de..28e84f7 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> @@ -27,8 +27,9 @@ tsadc: tsadc at ff280000 {
>         clock-names = "tsadc", "apb_pclk";
>         resets = <&cru SRST_TSADC>;
>         reset-names = "tsadc-apb";
> -       pinctrl-names = "default";
> -       pinctrl-0 = <&otp_out>;
> +       pinctrl-names = "init", "default";
> +       pinctrl-0 = <&otp_gpio>;
> +       pinctrl-1 = <&otp_out>;

Are these optional or required? They only appear in the example.

Rob

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Caesar Wang]

Hi Rob,

? 2015?10?21? 23:18, Rob Herring ??:
> On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>> Add the OTP gpio state, we need switch the pin to gpio state
>> before the TSADC controller is reset.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v1:
>>    - As the Doug comments, add the 'init' property to sync document.
>>
>>   Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> index ef802de..28e84f7 100644
>> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> @@ -27,8 +27,9 @@ tsadc: tsadc at ff280000 {
>>          clock-names = "tsadc", "apb_pclk";
>>          resets = <&cru SRST_TSADC>;
>>          reset-names = "tsadc-apb";
>> -       pinctrl-names = "default";
>> -       pinctrl-0 = <&otp_out>;
>> +       pinctrl-names = "init", "default";
>> +       pinctrl-0 = <&otp_gpio>;
>> +       pinctrl-1 = <&otp_out>;
> Are these optional or required? They only appear in the example.

Yep,
These are required for TSADC.

I?m assumed that's right,
I think we don't need to introduce the pinctrl in this document.

> Rob
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Rob Herring]

On Wed, Oct 21, 2015 at 10:45 AM, Caesar Wang <caesar.upstream@gmail.com> wrote:
> Hi Rob,
>
> ? 2015?10?21? 23:18, Rob Herring ??:
>>
>> On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>>>
>>> Add the OTP gpio state, we need switch the pin to gpio state
>>> before the TSADC controller is reset.
>>>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> ---
>>>
>>> Changes in v1:
>>>    - As the Doug comments, add the 'init' property to sync document.
>>>
>>>   Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5
>>> +++--
>>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> index ef802de..28e84f7 100644
>>> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> @@ -27,8 +27,9 @@ tsadc: tsadc at ff280000 {
>>>          clock-names = "tsadc", "apb_pclk";
>>>          resets = <&cru SRST_TSADC>;
>>>          reset-names = "tsadc-apb";
>>> -       pinctrl-names = "default";
>>> -       pinctrl-0 = <&otp_out>;
>>> +       pinctrl-names = "init", "default";
>>> +       pinctrl-0 = <&otp_gpio>;
>>> +       pinctrl-1 = <&otp_out>;
>>
>> Are these optional or required? They only appear in the example.
>
>
> Yep,
> These are required for TSADC.

Then list them that way.

>
> I?m assumed that's right,
> I think we don't need to introduce the pinctrl in this document.

You need to state that you use them and what valid names are. That is
a contract with the driver.

The example is extra information and should not be required to write a
dts entry.

Rob

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Rob Herring]

On Wed, Oct 21, 2015 at 11:48 AM, Rob Herring <robh+dt@kernel.org> wrote:
> On Wed, Oct 21, 2015 at 10:45 AM, Caesar Wang <caesar.upstream@gmail.com> wrote:
>> Hi Rob,
>>
>> ? 2015?10?21? 23:18, Rob Herring ??:
>>>
>>> On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>>>>
>>>> Add the OTP gpio state, we need switch the pin to gpio state
>>>> before the TSADC controller is reset.

Also, please fix the subject to be specific what binding you are changing.

dt-bindings: rockchip-thermal: <what the change is>

Rob

[PATCH v1 1/2] dt-bindings: Sync the dts to this document

[Caesar Wang]

? 2015?10?22? 09:18, Rob Herring ??:
> On Wed, Oct 21, 2015 at 11:48 AM, Rob Herring <robh+dt@kernel.org> wrote:
>> On Wed, Oct 21, 2015 at 10:45 AM, Caesar Wang <caesar.upstream@gmail.com> wrote:
>>> Hi Rob,
>>>
>>> ? 2015?10?21? 23:18, Rob Herring ??:
>>>> On Tue, Oct 20, 2015 at 9:42 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>>>>> Add the OTP gpio state, we need switch the pin to gpio state
>>>>> before the TSADC controller is reset.
> Also, please fix the subject to be specific what binding you are changing.
>
> dt-bindings: rockchip-thermal: <what the change is>

Sorry, Mr. Rob
I just sent the patch.:-(


> Rob
>
>
>
>
> -- 
> Thanks,
> Caesar