From mboxrd@z Thu Jan 1 00:00:00 1970 From: timur@codeaurora.org (Timur Tabi) Date: Mon, 26 Oct 2015 09:07:42 -0500 Subject: [PATCH v13 5/5] uart: pl011: Add support to ZTE ZX296702 uart In-Reply-To: <562E3213.8070602@arm.com> References: <1438328959-16177-1-git-send-email-jun.nie@linaro.org> <1438328959-16177-6-git-send-email-jun.nie@linaro.org> <55FC16A2.5070207@arm.com> <562AFBD5.3050508@codeaurora.org> <562DF96D.6020307@arm.com> <562E20B2.4050805@codeaurora.org> <562E3213.8070602@arm.com> Message-ID: <562E33AE.2020608@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Andre Przywara wrote: > Yeah, I was interested in that scenario too, because the SBSA spec > actually speaks of 32-bit registers and vendors may implement it > strictly as that. Still waiting for actual failure reports on this > before I wanted to push a fix, though. What do you mean by failure reports? Our hardware generates an SError if you try to access the PL011 registers with 8-bit or 16-bit reads or writes. >> We have an internal patch >> that replaces all of the read/write routines with vendor function calls. >> I would need to refactor our patch on top of yours. > > But wouldn't Jun's patch address this more easily, because it wraps > every call already? TBH I found this change the most interesting. Yes, but I think it changes a lot of things unnecessarily, like the register names. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation.