From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2BBD9EB64DD for ; Mon, 14 Aug 2023 08:54:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:CC:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=I3GekVBgQB+fH5IvfzCvGZee3loAqEaNP6PIRIPTNKE=; b=GGfemXuGtRfijAzyczYB3EzIgg P383KZlwLtzj4RWx6DsWT3r2SE4JOtBGyK4eQnu0Lh+DL3xdziLyqbmv3JcxQ6KH9snI4W0ADdbTd QQRmLS0h/F/T/BQditz10UYlv99zi2FpfB//sM2fM0MVA66d0zXHUf8h5rLqHD5V9nRqod9poTCu6 uDHH1xoEVhyA7vl1kgMrDQFc6MG7mFq9Ek2MDrYo7dojR1mUDb3caMM75s3m+qlGFKVCrCJ5By57i FAsn+wRvszSd3mkgLY9dJrxSfZs5bFoO3+n+vhMx7H9JJx3C/d++jhAOgpSWh7z6a5EV7FhJU4LXY 3JWtoIkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qVTKf-00GZK2-2Y; Mon, 14 Aug 2023 08:53:49 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qVTKb-00GZI3-2u for linux-arm-kernel@lists.infradead.org; Mon, 14 Aug 2023 08:53:47 +0000 Received: from canpemm500009.china.huawei.com (unknown [172.30.72.53]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4RPSlK4xqpzNnVf; Mon, 14 Aug 2023 16:50:05 +0800 (CST) Received: from [10.67.102.169] (10.67.102.169) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 14 Aug 2023 16:53:36 +0800 CC: , , , , , , , , , , , , , , , , , Subject: Re: [PATCH] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09 To: Will Deacon References: <20230809100654.32036-1-yangyicong@huawei.com> <20230811111739.GD6993@willie-the-truck> From: Yicong Yang Message-ID: <56309be3-cf3b-821d-b6d8-7f407b160fbb@huawei.com> Date: Mon, 14 Aug 2023 16:53:35 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20230811111739.GD6993@willie-the-truck> X-Originating-IP: [10.67.102.169] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230814_015346_110106_603C2878 X-CRM114-Status: GOOD ( 10.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2023/8/11 19:17, Will Deacon wrote: > On Wed, Aug 09, 2023 at 06:06:54PM +0800, Yicong Yang wrote: >> diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c >> index 25a269d431e4..b854b67b81fc 100644 >> --- a/drivers/perf/arm_smmuv3_pmu.c >> +++ b/drivers/perf/arm_smmuv3_pmu.c >> @@ -115,6 +115,7 @@ >> #define SMMU_PMCG_PA_SHIFT 12 >> >> #define SMMU_PMCG_EVCNTR_RDONLY BIT(0) >> +#define SMMU_PMCG_HARDEN_DISABLE BIT(1) >> >> static int cpuhp_state_num; >> >> @@ -150,6 +151,22 @@ SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_stream_id, config1, 0, 31); >> SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_span, config1, 32, 32); >> SMMU_PMU_EVENT_ATTR_EXTRACTOR(filter_enable, config1, 33, 33); >> >> +static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu, >> + struct perf_event *event, int idx); >> + >> +static inline void smmu_pmu_enable_quirk_hip08_09(struct pmu *pmu) >> +{ >> + struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu); >> + unsigned int idx; >> + >> + for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters) >> + smmu_pmu_apply_event_filter(smmu_pmu, smmu_pmu->events[idx], idx); >> + >> + writel(SMMU_PMCG_IRQ_CTRL_IRQEN, >> + smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL); >> + writel(SMMU_PMCG_CR_ENABLE, smmu_pmu->reg_base + SMMU_PMCG_CR); > > Can you tail-call smmu_pmu_enable() instead of duplicating it here? > >> +static inline void smmu_pmu_disable_quirk_hip08_09(struct pmu *pmu) >> +{ >> + struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu); >> + unsigned int idx; >> + >> + /* >> + * The global disable of PMU sometimes fail to stop the counting. >> + * Harden this by writing an invalid event type to each used counter >> + * to forcibly stop counting. >> + */ >> + for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters) >> + writel(0xffff, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx)); >> + >> + writel(0, smmu_pmu->reg_base + SMMU_PMCG_CR); >> + writel(0, smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL); > > Same things here, but with smmu_pmu_disable() > Sure. Will tail call smmu_pmu_{enable, disable} in both case to avoid duplication. Thanks for the comments. Thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel