From: slash.tmp@free.fr (Mason)
To: linux-arm-kernel@lists.infradead.org
Subject: Cortex-A9 SCU + ARM_ERRATA_764369
Date: Tue, 3 Nov 2015 20:52:30 +0100 [thread overview]
Message-ID: <5639107E.7030901@free.fr> (raw)
In-Reply-To: <20151103172743.GE4049@leverpostej>
Mark Rutland wrote:
> Mason wrote:
>
>> What is scu_base + 0x30? (SCU diagnostic control register?)
>
> It's documented (admittedly very sparsely) in the Software
> Developers Errata Notice for Cortex-A9 processors, in the
> section regarding erratum 764369.
A Freescale document mentions:
> Set bit[0] in the undocumented SCU diagnostic control register
> located at offset 0x30 from the PERIPHBASE address. Setting this bit
> disables the "migratory bit" feature. This forces a dirty cache line
> to be evicted to the lower memory subsystem?which is both the point
> of coherency and the point of unification?when it is being read by
> another processor.
Can this register be written to by a non-secure OS?
Regards.
next prev parent reply other threads:[~2015-11-03 19:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-03 16:51 Cortex-A9 SCU + ARM_ERRATA_764369 Mason
2015-11-03 17:27 ` Mark Rutland
2015-11-03 18:55 ` Mason
2015-11-03 19:48 ` Russell King - ARM Linux
2015-11-03 19:52 ` Mason [this message]
2015-11-03 20:36 ` Mason
2015-11-03 21:18 ` Mason
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