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From: Suzuki.Poulose@arm.com (Suzuki K. Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] arm64: cpufeature: Track unsigned fields
Date: Thu, 19 Nov 2015 10:03:13 +0000	[thread overview]
Message-ID: <564D9E61.8010802@arm.com> (raw)
In-Reply-To: <564D56CA.60502@linaro.org>

On 19/11/15 04:57, AKASHI Takahiro wrote:
> Hi
>
>  From my curiosity,
> can you please clarify your criteria regarding which fields of a register should be signed or unsigned?
> I guessed that the fields marked with FTR_LOWER_SAFE or FTR_HIGHER_SAFE could be unsigned,
> but it seems to be not always true looking at your patch.
> Anyhow, for example,

...

>> -    ARM64_FTR_BITS(FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_PARANGE_SHIFT, 4, 0),
>> +    U_ARM64_FTR_BITS(FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_PARANGE_SHIFT, 4, 0),
>>       ARM64_FTR_END,
>>   };
>
> BigEnd, bits[11:8], is 0b0000 for "No mixed-endian support", and 0b0001 for
> "Mixed-endian support". But can any other value be possible? If not, why signed?
> If there are some hidden (or undocumented) specifications, as Ard mentioned, that's fine.
> Please ignore my comments.

There are no hidden specifications, but just that they are undocumented. To be precise,
the criteria I selected was based on the meaning of their values.

1) If value represents something which cannot be negative and hence should be treated as
    unsigned.
    e.g, number of break points ID_AA64DFR0:BRPs.

    
2) If the individual values are mapped to some other values which cannot be negative, but have
    LOWER_SAFE/HIGHER_SAFE relation.
     e.g,  CTR_EL0:WRG - Log2 of the write granule size.
	  ID_AA64MMFR0:PARANGE - Supported PA Size


Thanks
Suzuki

  reply	other threads:[~2015-11-19 10:03 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-18 17:03 [PATCH 0/5] arm64: cpufeature: Fixes for 4.4-rc1 Suzuki K. Poulose
2015-11-18 17:08 ` [PATCH 1/5] arm64: cpufeature: Add helpers for extracting unsigned values Suzuki K. Poulose
2015-11-18 17:08   ` [PATCH 2/5] arm64: cpufeature: Track unsigned fields Suzuki K. Poulose
2015-11-19  4:57     ` AKASHI Takahiro
2015-11-19 10:03       ` Suzuki K. Poulose [this message]
2015-11-19 10:06         ` Suzuki K. Poulose
2015-11-19 18:45         ` Catalin Marinas
2015-11-20 13:37           ` Suzuki K. Poulose
2015-11-18 17:08   ` [PATCH 3/5] arm64: debug: Treat the BRPs/WRPs as unsigned Suzuki K. Poulose
2015-11-23 17:29     ` Will Deacon
2015-11-18 17:08   ` [PATCH 4/5] arm64: Make fail_incapable_cpu reusable Suzuki K. Poulose
2015-11-18 17:09   ` [PATCH 5/5] arm64: Ensure the secondary CPUs have safe ASIDBits size Suzuki K. Poulose
2015-11-23 17:29     ` Will Deacon
2015-11-23 23:48       ` Suzuki K. Poulose
2015-11-26 18:13 ` [PATCH 0/5] arm64: cpufeature: Fixes for 4.4-rc1 Catalin Marinas

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