[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[Ariel D'Alessandro]

Hi,

This patch set includes some DTS changes for LPC4337 CIAA-NXP board.
It is based on tag next-20151120 of the linux-next repository. It has
been successfully tested on a LPC4337 CIAA-NXP Board.

Ariel D'Alessandro (3):
  ARM: dts: lpc4337-ciaa: enable EEPROM memory
  ARM: dts: lpc4337-ciaa: enable SCT-PWM
  ARM: dts: lpc4337-ciaa: add i2c0 and devices

 arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

-- 
2.6.2

[PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory

[Ariel D'Alessandro]

The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB
EEPROM memory.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
index 5f500c1..03bdf77 100644
--- a/arch/arm/boot/dts/lpc4337-ciaa.dts
+++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
@@ -155,6 +155,10 @@
 	};
 };
 
+&eeprom {
+	status = "okay";
+};
+
 &enet_tx_clk {
 	clock-frequency = <50000000>;
 };
-- 
2.6.2

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

[Ariel D'Alessandro]

Enable the PWM based on the State Configurable Timer (SCT) included in
the LPC4337 SoC of the CIAA-NXP board.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
index 03bdf77..1a23589 100644
--- a/arch/arm/boot/dts/lpc4337-ciaa.dts
+++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
@@ -170,6 +170,10 @@
 	pinctrl-0 = <&enet_rmii_pins>;
 };
 
+&sct_pwm {
+	status = "okay";
+};
+
 &ssp1 {
 	status = "okay";
 	pinctrl-names = "default";
-- 
2.6.2

[PATCH 3/3] ARM: dts: lpc4337-ciaa: add i2c0 and devices

[Ariel D'Alessandro]

Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board:

* 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs.
* 24AA025E48 EEPROM, 2kbit.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
---
 arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
index 1a23589..d81047a 100644
--- a/arch/arm/boot/dts/lpc4337-ciaa.dts
+++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
@@ -99,6 +99,14 @@
 		};
 	};
 
+	i2c0_pins: i2c0-pins {
+		i2c0_pins_cfg {
+			pins = "i2c0_scl", "i2c0_sda";
+			function = "i2c0";
+			input-enable;
+		};
+	};
+
 	ssp_pins: ssp-pins {
 		ssp1_cs {
 			pins = "p6_7";
@@ -163,6 +171,28 @@
 	clock-frequency = <50000000>;
 };
 
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	clock-frequency = <400000>;
+
+	eeprom at 50 {
+		compatible = "microchip,24c512";
+		reg = <0x50>;
+	};
+
+	eeprom at 51 {
+		compatible = "microchip,24c02";
+		reg = <0x51>;
+	};
+
+	eeprom at 54 {
+		compatible = "microchip,24c512";
+		reg = <0x54>;
+	};
+};
+
 &mac {
 	status = "okay";
 	phy-mode = "rmii";
-- 
2.6.2

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[Ariel D'Alessandro]

(+Cc Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
> Hi,
> 
> This patch set includes some DTS changes for LPC4337 CIAA-NXP board.
> It is based on tag next-20151120 of the linux-next repository. It has
> been successfully tested on a LPC4337 CIAA-NXP Board.
> 
> Ariel D'Alessandro (3):
>   ARM: dts: lpc4337-ciaa: enable EEPROM memory
>   ARM: dts: lpc4337-ciaa: enable SCT-PWM
>   ARM: dts: lpc4337-ciaa: add i2c0 and devices
> 
>  arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
> 

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[Joachim Eastwood]

Hi Ariel,

On 23 November 2015 at 13:43, Ariel D'Alessandro
<ariel@vanguardiasur.com.ar> wrote:
> (+Cc Joachim)
>
> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>> Hi,
>>
>> This patch set includes some DTS changes for LPC4337 CIAA-NXP board.
>> It is based on tag next-20151120 of the linux-next repository. It has
>> been successfully tested on a LPC4337 CIAA-NXP Board.
>>
>> Ariel D'Alessandro (3):
>>   ARM: dts: lpc4337-ciaa: enable EEPROM memory
>>   ARM: dts: lpc4337-ciaa: enable SCT-PWM
>>   ARM: dts: lpc4337-ciaa: add i2c0 and devices

If you want me to pick up the patches please put me in the To field so
they end up in my inbox.


regards,
Joachim Eastwood

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[Ariel D'Alessandro]

Joachim,

El 23/11/15 a las 15:17, Joachim Eastwood escribi?:
> Hi Ariel,
> 
> On 23 November 2015 at 13:43, Ariel D'Alessandro
> <ariel@vanguardiasur.com.ar> wrote:
>> (+Cc Joachim)
>>
>> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>>> Hi,
>>>
>>> This patch set includes some DTS changes for LPC4337 CIAA-NXP board.
>>> It is based on tag next-20151120 of the linux-next repository. It has
>>> been successfully tested on a LPC4337 CIAA-NXP Board.
>>>
>>> Ariel D'Alessandro (3):
>>>   ARM: dts: lpc4337-ciaa: enable EEPROM memory
>>>   ARM: dts: lpc4337-ciaa: enable SCT-PWM
>>>   ARM: dts: lpc4337-ciaa: add i2c0 and devices
> 
> If you want me to pick up the patches please put me in the To field so
> they end up in my inbox.

OK, I'm resending with you in the To field.

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 0/3] LPC4337 CIAA-NXP DTS changes

[Ariel D'Alessandro]

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
> Hi,
> 
> This patch set includes some DTS changes for LPC4337 CIAA-NXP board.
> It is based on tag next-20151120 of the linux-next repository. It has
> been successfully tested on a LPC4337 CIAA-NXP Board.
> 
> Ariel D'Alessandro (3):
>   ARM: dts: lpc4337-ciaa: enable EEPROM memory
>   ARM: dts: lpc4337-ciaa: enable SCT-PWM
>   ARM: dts: lpc4337-ciaa: add i2c0 and devices
> 
>  arch/arm/boot/dts/lpc4337-ciaa.dts | 38 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
> 

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory

[Ariel D'Alessandro]

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
> The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB
> EEPROM memory.
> 
> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
> ---
>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
> index 5f500c1..03bdf77 100644
> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
> @@ -155,6 +155,10 @@
>  	};
>  };
>  
> +&eeprom {
> +	status = "okay";
> +};
> +
>  &enet_tx_clk {
>  	clock-frequency = <50000000>;
>  };
> 

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

[Ariel D'Alessandro]

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
> Enable the PWM based on the State Configurable Timer (SCT) included in
> the LPC4337 SoC of the CIAA-NXP board.
> 
> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
> ---
>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
> index 03bdf77..1a23589 100644
> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
> @@ -170,6 +170,10 @@
>  	pinctrl-0 = <&enet_rmii_pins>;
>  };
>  
> +&sct_pwm {
> +	status = "okay";
> +};
> +
>  &ssp1 {
>  	status = "okay";
>  	pinctrl-names = "default";
> 

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 3/3] ARM: dts: lpc4337-ciaa: add i2c0 and devices

[Ariel D'Alessandro]

(+To: Joachim)

El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
> Add I2C0 and two I2C EEPROM devices on the CIAA-NXP board:
> 
> * 24AA1025 EEPROM, 1Mbit: it is accessed as two 512Kbit EEPROMs.
> * 24AA025E48 EEPROM, 2kbit.
> 
> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
> ---
>  arch/arm/boot/dts/lpc4337-ciaa.dts | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
> index 1a23589..d81047a 100644
> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
> @@ -99,6 +99,14 @@
>  		};
>  	};
>  
> +	i2c0_pins: i2c0-pins {
> +		i2c0_pins_cfg {
> +			pins = "i2c0_scl", "i2c0_sda";
> +			function = "i2c0";
> +			input-enable;
> +		};
> +	};
> +
>  	ssp_pins: ssp-pins {
>  		ssp1_cs {
>  			pins = "p6_7";
> @@ -163,6 +171,28 @@
>  	clock-frequency = <50000000>;
>  };
>  
> +&i2c0 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c0_pins>;
> +	clock-frequency = <400000>;
> +
> +	eeprom at 50 {
> +		compatible = "microchip,24c512";
> +		reg = <0x50>;
> +	};
> +
> +	eeprom at 51 {
> +		compatible = "microchip,24c02";
> +		reg = <0x51>;
> +	};
> +
> +	eeprom at 54 {
> +		compatible = "microchip,24c512";
> +		reg = <0x54>;
> +	};
> +};
> +
>  &mac {
>  	status = "okay";
>  	phy-mode = "rmii";
> 

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

[Joachim Eastwood]

Hi Ariel,

Sorry for the late reply. I have just started to put together my DT
for 4.5 branch now.

On 25 November 2015 at 13:28, Ariel D'Alessandro
<ariel@vanguardiasur.com.ar> wrote:
> (+To: Joachim)
>
> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>> Enable the PWM based on the State Configurable Timer (SCT) included in
>> the LPC4337 SoC of the CIAA-NXP board.
>>
>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>> ---
>>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
>> index 03bdf77..1a23589 100644
>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
>> @@ -170,6 +170,10 @@
>>       pinctrl-0 = <&enet_rmii_pins>;
>>  };
>>
>> +&sct_pwm {
>> +     status = "okay";
>> +};
>> +

Isn't this a bit useless without any pinmux setup?


regards,
Joachim Eastwood

[PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory

[Joachim Eastwood]

Hi Ariel,

On 25 November 2015 at 13:28, Ariel D'Alessandro
<ariel@vanguardiasur.com.ar> wrote:
> (+To: Joachim)
>
> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>> The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB
>> EEPROM memory.
>>
>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>> ---
>>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
>> index 5f500c1..03bdf77 100644
>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
>> @@ -155,6 +155,10 @@
>>       };
>>  };
>>
>> +&eeprom {
>> +     status = "okay";
>> +};
>> +

I already had a patch that enabled the eeprom for all boards that
included the lpc4357.dtsi from when I tested your driver. So opted to
use that patch instead of this one. This is really a SoC device
feature that doesn't require any board resources so I think it is
better to have this entry in lpc4357.dtsi.


regards,
Joachim Eastwood

[PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory

[Ariel D'Alessandro]

Joachim,

El 14/12/15 a las 19:52, Joachim Eastwood escribi?:
> Hi Ariel,
> 
> On 25 November 2015 at 13:28, Ariel D'Alessandro
> <ariel@vanguardiasur.com.ar> wrote:
>> (+To: Joachim)
>>
>> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>>> The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB
>>> EEPROM memory.
>>>
>>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>>> ---
>>>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> index 5f500c1..03bdf77 100644
>>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> @@ -155,6 +155,10 @@
>>>       };
>>>  };
>>>
>>> +&eeprom {
>>> +     status = "okay";
>>> +};
>>> +
> 
> I already had a patch that enabled the eeprom for all boards that
> included the lpc4357.dtsi from when I tested your driver. So opted to
> use that patch instead of this one. This is really a SoC device
> feature that doesn't require any board resources so I think it is
> better to have this entry in lpc4357.dtsi.

Yeah, you're right. Fine for me, thanks.

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

[Ariel D'Alessandro]

Joachim,

El 14/12/15 a las 19:48, Joachim Eastwood escribi?:
> Hi Ariel,
> 
> Sorry for the late reply. I have just started to put together my DT
> for 4.5 branch now.
> 
> On 25 November 2015 at 13:28, Ariel D'Alessandro
> <ariel@vanguardiasur.com.ar> wrote:
>> (+To: Joachim)
>>
>> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>>> Enable the PWM based on the State Configurable Timer (SCT) included in
>>> the LPC4337 SoC of the CIAA-NXP board.
>>>
>>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>>> ---
>>>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> index 03bdf77..1a23589 100644
>>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>> @@ -170,6 +170,10 @@
>>>       pinctrl-0 = <&enet_rmii_pins>;
>>>  };
>>>
>>> +&sct_pwm {
>>> +     status = "okay";
>>> +};
>>> +
> 
> Isn't this a bit useless without any pinmux setup?

Yes, it might be kind of useless. Do you think it shouldn't be enabled then?

-- 
Ariel D'Alessandro, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 2/3] ARM: dts: lpc4337-ciaa: enable SCT-PWM

[Joachim Eastwood]

On 16 December 2015 at 13:55, Ariel D'Alessandro
<ariel@vanguardiasur.com.ar> wrote:
> Joachim,
>
> El 14/12/15 a las 19:48, Joachim Eastwood escribi?:
>> Hi Ariel,
>>
>> Sorry for the late reply. I have just started to put together my DT
>> for 4.5 branch now.
>>
>> On 25 November 2015 at 13:28, Ariel D'Alessandro
>> <ariel@vanguardiasur.com.ar> wrote:
>>> (+To: Joachim)
>>>
>>> El 23/11/15 a las 09:37, Ariel D'Alessandro escribi?:
>>>> Enable the PWM based on the State Configurable Timer (SCT) included in
>>>> the LPC4337 SoC of the CIAA-NXP board.
>>>>
>>>> Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
>>>> ---
>>>>  arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++
>>>>  1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>>> index 03bdf77..1a23589 100644
>>>> --- a/arch/arm/boot/dts/lpc4337-ciaa.dts
>>>> +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts
>>>> @@ -170,6 +170,10 @@
>>>>       pinctrl-0 = <&enet_rmii_pins>;
>>>>  };
>>>>
>>>> +&sct_pwm {
>>>> +     status = "okay";
>>>> +};
>>>> +
>>
>> Isn't this a bit useless without any pinmux setup?
>
> Yes, it might be kind of useless. Do you think it shouldn't be enabled then?

It would be nice to have a board with sct-pwm enabled. Would it
possible for you to assign a pin to it?


regards,
Joachim Eastwood