From: harba@codeaurora.org (Abdulhamid, Harb)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V1 6/6] acpi: apei: handle SEA notification type for ARMv8
Date: Wed, 10 Feb 2016 22:22:00 -0500 [thread overview]
Message-ID: <56BBFE58.7020007@codeaurora.org> (raw)
In-Reply-To: <20160210180332.GU1052@arm.com>
On 2/10/2016 1:03 PM, Will Deacon wrote:
> On Fri, Feb 05, 2016 at 12:13:28PM -0700, Tyler Baicar wrote:
>> +#else /* CONFIG_HAVE_ACPI_APEI_SEA */
>> +static inline int ghes_sea_add(struct ghes *ghes)
>> +{
>> + pr_err(GHES_PFX "ID: %d, trying to add SEA notification which is not supported\n",
>> + ghes->generic->header.source_id);
>> + return -ENOTSUPP;
>> +}
>> +
>> +static inline void ghes_sea_remove(struct ghes *ghes)
>> +{
>> + pr_err(GHES_PFX "ID: %d, trying to remove SEA notification which is not supported\n",
>> + ghes->generic->header.source_id);
>> +}
>
> Why are these getting called if !CONFIG_HAVE_ACPI_APEI_SEA?
>
This was added to catch firmware bugs (i.e. bad ACPI tables). Since
"SEA" is a valid GHES notify type in ACPI, it's just a number in an ACPI
table. If someone incorrectly set SEA as their notify type in their
HEST table on an Intel system, this would catch that error here.
We may do this with less code by getting rid of the #else (as you
suggest), but we need to add #ifdefs to eliminate the calls to
ghes_sea_add and ghes_sea_remove to avoid compiler errors. Does the
below change look better?
>>@@ -1093,6 +1168,11 @@ static int ghes_probe(struct platform_device
>>*ghes_dev)
>> list_add_rcu(&ghes->list, &ghes_sci);
>> mutex_unlock(&ghes_list_mutex);
>> break;
>>
+#ifdef CONFIG_HAVE_ACPI_APEI_SEA
>>+ case ACPI_HEST_NOTIFY_SEA:
>>+ rc = ghes_sea_add(ghes);
>>+ if (rc)
>>+ goto err_edac_unreg;
>>+ break;
+#endif
...
>>@@ -1135,6 +1215,9 @@ static int ghes_remove(struct platform_device
>>*ghes_dev)
>> >>unregister_acpi_hed_notifier(&ghes_notifier_sci);
>> mutex_unlock(&ghes_list_mutex);
>> break;
+#ifdef CONFIG_HAVE_ACPI_APEI_SEA
>>+ case ACPI_HEST_NOTIFY_SEA:
>>+ ghes_sea_remove(ghes);
>>+ break;
+#endif
Harb
--
Qualcomm Technologies, Inc.
on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-02-11 3:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-05 19:13 [PATCH V1 0/6] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar
2016-02-05 19:13 ` [PATCH V1 1/6] acpi: apei: read ack upon ghes record consumption Tyler Baicar
2016-02-05 19:13 ` [PATCH V1 2/6] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar
2016-02-05 19:13 ` [PATCH V1 3/6] efi: parse ARMv8 processor error Tyler Baicar
2016-02-05 19:13 ` [PATCH V1 4/6] arm64: exception: handle Synchronous External Abort Tyler Baicar
2016-02-10 18:03 ` Will Deacon
2016-02-11 2:40 ` Abdulhamid, Harb
2016-02-05 19:13 ` [PATCH V1 5/6] arm64: exception: handle instruction abort at current EL Tyler Baicar
2016-02-10 18:02 ` Will Deacon
2016-02-11 3:03 ` Abdulhamid, Harb
2016-02-05 19:13 ` [PATCH V1 6/6] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar
2016-02-10 18:03 ` Will Deacon
2016-02-11 3:22 ` Abdulhamid, Harb [this message]
2016-02-11 22:37 ` Baicar, Tyler
2016-02-12 9:51 ` Will Deacon
2016-02-10 17:44 ` [PATCH V1 0/6] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Will Deacon
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