* [PATCH 1/3] ARM64: zynqmp: Keep gpio node alphabetically sorted @ 2016-02-11 12:26 Michal Simek 2016-02-11 12:26 ` [PATCH 2/3] ARM64: zynqmp: Extract clock information from EP108 Michal Simek 2016-02-11 12:26 ` [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format Michal Simek 0 siblings, 2 replies; 7+ messages in thread From: Michal Simek @ 2016-02-11 12:26 UTC (permalink / raw) To: linux-arm-kernel No functional change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 200fb588d0f5..7bc65e391530 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -126,18 +126,6 @@ clock-frequency = <25000000>; }; - gpio: gpio at ff0a0000 { - compatible = "xlnx,zynqmp-gpio-1.0"; - status = "disabled"; - #gpio-cells = <0x2>; - clocks = <&misc_clk>; - interrupt-parent = <&gic>; - interrupts = <0 16 4>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0xff0a0000 0x1000>; - }; - gem0: ethernet at ff0b0000 { compatible = "cdns,gem"; status = "disabled"; @@ -186,6 +174,18 @@ #size-cells = <0>; }; + gpio: gpio at ff0a0000 { + compatible = "xlnx,zynqmp-gpio-1.0"; + status = "disabled"; + #gpio-cells = <0x2>; + clocks = <&misc_clk>; + interrupt-parent = <&gic>; + interrupts = <0 16 4>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0xff0a0000 0x1000>; + }; + i2c_clk: i2c_clk { compatible = "fixed-clock"; #clock-cells = <0x0>; -- 1.9.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] ARM64: zynqmp: Extract clock information from EP108 2016-02-11 12:26 [PATCH 1/3] ARM64: zynqmp: Keep gpio node alphabetically sorted Michal Simek @ 2016-02-11 12:26 ` Michal Simek 2016-02-11 12:26 ` [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format Michal Simek 1 sibling, 0 replies; 7+ messages in thread From: Michal Simek @ 2016-02-11 12:26 UTC (permalink / raw) To: linux-arm-kernel Extract clocks and put it specific file to help with platform autogeneration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi | 88 ++++++++++++++++++++++++ arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 1 + arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 43 +----------- 3 files changed, 90 insertions(+), 42 deletions(-) create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi new file mode 100644 index 000000000000..cdc6a437dcc7 --- /dev/null +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi @@ -0,0 +1,88 @@ +/* + * clock specification for Xilinx ZynqMP ep108 development board + * + * (C) Copyright 2015, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +&amba { + misc_clk: misc_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + i2c_clk: i2c_clk { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <111111111>; + }; + + sata_clk: sata_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <75000000>; + }; +}; + +&can0 { + clocks = <&misc_clk &misc_clk>; +}; + +&gem0 { + clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; +}; + +&gpio { + clocks = <&misc_clk>; +}; + +&i2c0 { + clocks = <&i2c_clk>; +}; + +&i2c1 { + clocks = <&i2c_clk>; +}; + +&sata { + clocks = <&sata_clk>; +}; + +&sdhci0 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&sdhci1 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&spi0 { + clocks = <&misc_clk &misc_clk>; +}; + +&spi1 { + clocks = <&misc_clk &misc_clk>; +}; + +&uart0 { + clocks = <&misc_clk &misc_clk>; +}; + +&usb0 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&usb1 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&watchdog0 { + clocks= <&misc_clk>; +}; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts index ce5d848251fa..acb0527fdc4a 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts @@ -14,6 +14,7 @@ /dts-v1/; /include/ "zynqmp.dtsi" +/include/ "zynqmp-ep108-clk.dtsi" / { model = "ZynqMP EP108"; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 7bc65e391530..e595f22e7e4b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -90,7 +90,7 @@ }; }; - amba { + amba: amba { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; @@ -99,7 +99,6 @@ can0: can at ff060000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; - clocks = <&misc_clk &misc_clk>; clock-names = "can_clk", "pclk"; reg = <0x0 0xff060000 0x1000>; interrupts = <0 23 4>; @@ -111,7 +110,6 @@ can1: can at ff070000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; - clocks = <&misc_clk &misc_clk>; clock-names = "can_clk", "pclk"; reg = <0x0 0xff070000 0x1000>; interrupts = <0 24 4>; @@ -120,12 +118,6 @@ rx-fifo-depth = <0x40>; }; - misc_clk: misc_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - gem0: ethernet at ff0b0000 { compatible = "cdns,gem"; status = "disabled"; @@ -133,7 +125,6 @@ interrupts = <0 57 4>, <0 57 4>; reg = <0x0 0xff0b0000 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; - clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -145,7 +136,6 @@ interrupts = <0 59 4>, <0 59 4>; reg = <0x0 0xff0c0000 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; - clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -157,7 +147,6 @@ interrupts = <0 61 4>, <0 61 4>; reg = <0x0 0xff0d0000 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; - clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -169,7 +158,6 @@ interrupts = <0 63 4>, <0 63 4>; reg = <0x0 0xff0e0000 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; - clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -178,7 +166,6 @@ compatible = "xlnx,zynqmp-gpio-1.0"; status = "disabled"; #gpio-cells = <0x2>; - clocks = <&misc_clk>; interrupt-parent = <&gic>; interrupts = <0 16 4>; interrupt-controller; @@ -186,19 +173,12 @@ reg = <0x0 0xff0a0000 0x1000>; }; - i2c_clk: i2c_clk { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <111111111>; - }; - i2c0: i2c at ff020000 { compatible = "cdns,i2c-r1p10"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 17 4>; reg = <0x0 0xff020000 0x1000>; - clocks = <&i2c_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -209,24 +189,16 @@ interrupt-parent = <&gic>; interrupts = <0 18 4>; reg = <0x0 0xff030000 0x1000>; - clocks = <&i2c_clk>; #address-cells = <1>; #size-cells = <0>; }; - sata_clk: sata_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <75000000>; - }; - sata: ahci at fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled"; reg = <0x0 0xfd0c0000 0x2000>; interrupt-parent = <&gic>; interrupts = <0 133 4>; - clocks = <&sata_clk>; }; sdhci0: sdhci at ff160000 { @@ -236,7 +208,6 @@ interrupts = <0 48 4>; reg = <0x0 0xff160000 0x1000>; clock-names = "clk_xin", "clk_ahb"; - clocks = <&misc_clk>, <&misc_clk>; }; sdhci1: sdhci at ff170000 { @@ -246,7 +217,6 @@ interrupts = <0 49 4>; reg = <0x0 0xff170000 0x1000>; clock-names = "clk_xin", "clk_ahb"; - clocks = <&misc_clk>, <&misc_clk>; }; smmu: smmu at fd800000 { @@ -268,7 +238,6 @@ interrupts = <0 19 4>; reg = <0x0 0xff040000 0x1000>; clock-names = "ref_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -280,7 +249,6 @@ interrupts = <0 20 4>; reg = <0x0 0xff050000 0x1000>; clock-names = "ref_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; #address-cells = <1>; #size-cells = <0>; }; @@ -291,7 +259,6 @@ interrupt-parent = <&gic>; interrupts = <0 36 4>, <0 37 4>, <0 38 4>; reg = <0x0 0xff110000 0x1000>; - clocks = <&misc_clk>; timer-width = <32>; }; @@ -301,7 +268,6 @@ interrupt-parent = <&gic>; interrupts = <0 39 4>, <0 40 4>, <0 41 4>; reg = <0x0 0xff120000 0x1000>; - clocks = <&misc_clk>; timer-width = <32>; }; @@ -311,7 +277,6 @@ interrupt-parent = <&gic>; interrupts = <0 42 4>, <0 43 4>, <0 44 4>; reg = <0x0 0xff130000 0x1000>; - clocks = <&misc_clk>; timer-width = <32>; }; @@ -321,7 +286,6 @@ interrupt-parent = <&gic>; interrupts = <0 45 4>, <0 46 4>, <0 47 4>; reg = <0x0 0xff140000 0x1000>; - clocks = <&misc_clk>; timer-width = <32>; }; @@ -332,7 +296,6 @@ interrupts = <0 21 4>; reg = <0x0 0xff000000 0x1000>; clock-names = "uart_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; }; uart1: serial at ff010000 { @@ -342,7 +305,6 @@ interrupts = <0 22 4>; reg = <0x0 0xff010000 0x1000>; clock-names = "uart_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; }; usb0: usb at fe200000 { @@ -352,7 +314,6 @@ interrupts = <0 65 4>; reg = <0x0 0xfe200000 0x40000>; clock-names = "clk_xin", "clk_ahb"; - clocks = <&misc_clk>, <&misc_clk>; }; usb1: usb at fe300000 { @@ -362,13 +323,11 @@ interrupts = <0 70 4>; reg = <0x0 0xfe300000 0x40000>; clock-names = "clk_xin", "clk_ahb"; - clocks = <&misc_clk>, <&misc_clk>; }; watchdog0: watchdog at fd4d0000 { compatible = "cdns,wdt-r1p2"; status = "disabled"; - clocks= <&misc_clk>; interrupt-parent = <&gic>; interrupts = <0 52 1>; reg = <0x0 0xfd4d0000 0x1000>; -- 1.9.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format 2016-02-11 12:26 [PATCH 1/3] ARM64: zynqmp: Keep gpio node alphabetically sorted Michal Simek 2016-02-11 12:26 ` [PATCH 2/3] ARM64: zynqmp: Extract clock information from EP108 Michal Simek @ 2016-02-11 12:26 ` Michal Simek 2016-02-11 16:13 ` Rob Herring 1 sibling, 1 reply; 7+ messages in thread From: Michal Simek @ 2016-02-11 12:26 UTC (permalink / raw) To: linux-arm-kernel Use 64bit size cell format instead of 32bit for memory description. Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 2 +- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 63 ++++++++++++++--------------- 2 files changed, 32 insertions(+), 33 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts index acb0527fdc4a..358089687a69 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts @@ -29,7 +29,7 @@ memory { device_type = "memory"; - reg = <0x0 0x0 0x40000000>; + reg = <0x0 0x0 0x0 0x40000000>; }; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index e595f22e7e4b..ef8fe8e6c868 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -14,7 +14,7 @@ / { compatible = "xlnx,zynqmp"; #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; cpus { #address-cells = <1>; @@ -74,16 +74,15 @@ amba_apu { compatible = "simple-bus"; #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; ranges; - gic: interrupt-controller at f9010000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; - reg = <0x0 0xf9010000 0x10000>, - <0x0 0xf902f000 0x2000>, - <0x0 0xf9040000 0x20000>, - <0x0 0xf906f000 0x2000>; + reg = <0x0 0xf9010000 0x0 0x10000>, + <0x0 0xf902f000 0x0 0x2000>, + <0x0 0xf9040000 0x0 0x20000>, + <0x0 0xf906f000 0x0 0x2000>; interrupt-controller; interrupt-parent = <&gic>; interrupts = <1 9 0xf04>; @@ -93,14 +92,14 @@ amba: amba { compatible = "simple-bus"; #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; ranges; can0: can at ff060000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff060000 0x1000>; + reg = <0x0 0xff060000 0x0 0x1000>; interrupts = <0 23 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; @@ -111,7 +110,7 @@ compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff070000 0x1000>; + reg = <0x0 0xff070000 0x0 0x1000>; interrupts = <0 24 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; @@ -123,7 +122,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; - reg = <0x0 0xff0b0000 0x1000>; + reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -134,7 +133,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; - reg = <0x0 0xff0c0000 0x1000>; + reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -145,7 +144,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; - reg = <0x0 0xff0d0000 0x1000>; + reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -156,7 +155,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; - reg = <0x0 0xff0e0000 0x1000>; + reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -170,7 +169,7 @@ interrupts = <0 16 4>; interrupt-controller; #interrupt-cells = <2>; - reg = <0x0 0xff0a0000 0x1000>; + reg = <0x0 0xff0a0000 0x0 0x1000>; }; i2c0: i2c at ff020000 { @@ -178,7 +177,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 17 4>; - reg = <0x0 0xff020000 0x1000>; + reg = <0x0 0xff020000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; }; @@ -188,7 +187,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 18 4>; - reg = <0x0 0xff030000 0x1000>; + reg = <0x0 0xff030000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; }; @@ -196,7 +195,7 @@ sata: ahci at fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled"; - reg = <0x0 0xfd0c0000 0x2000>; + reg = <0x0 0xfd0c0000 0x0 0x2000>; interrupt-parent = <&gic>; interrupts = <0 133 4>; }; @@ -206,7 +205,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 48 4>; - reg = <0x0 0xff160000 0x1000>; + reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; }; @@ -215,13 +214,13 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 49 4>; - reg = <0x0 0xff170000 0x1000>; + reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; }; smmu: smmu at fd800000 { compatible = "arm,mmu-500"; - reg = <0x0 0xfd800000 0x20000>; + reg = <0x0 0xfd800000 0x0 0x20000>; #global-interrupts = <1>; interrupt-parent = <&gic>; interrupts = <0 157 4>, @@ -236,7 +235,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 19 4>; - reg = <0x0 0xff040000 0x1000>; + reg = <0x0 0xff040000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; @@ -247,7 +246,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 20 4>; - reg = <0x0 0xff050000 0x1000>; + reg = <0x0 0xff050000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; @@ -258,7 +257,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 36 4>, <0 37 4>, <0 38 4>; - reg = <0x0 0xff110000 0x1000>; + reg = <0x0 0xff110000 0x0 0x1000>; timer-width = <32>; }; @@ -267,7 +266,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 39 4>, <0 40 4>, <0 41 4>; - reg = <0x0 0xff120000 0x1000>; + reg = <0x0 0xff120000 0x0 0x1000>; timer-width = <32>; }; @@ -276,7 +275,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 42 4>, <0 43 4>, <0 44 4>; - reg = <0x0 0xff130000 0x1000>; + reg = <0x0 0xff130000 0x0 0x1000>; timer-width = <32>; }; @@ -285,7 +284,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 45 4>, <0 46 4>, <0 47 4>; - reg = <0x0 0xff140000 0x1000>; + reg = <0x0 0xff140000 0x0 0x1000>; timer-width = <32>; }; @@ -294,7 +293,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 21 4>; - reg = <0x0 0xff000000 0x1000>; + reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; }; @@ -303,7 +302,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 22 4>; - reg = <0x0 0xff010000 0x1000>; + reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; }; @@ -312,7 +311,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 65 4>; - reg = <0x0 0xfe200000 0x40000>; + reg = <0x0 0xfe200000 0x0 0x40000>; clock-names = "clk_xin", "clk_ahb"; }; @@ -321,7 +320,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 70 4>; - reg = <0x0 0xfe300000 0x40000>; + reg = <0x0 0xfe300000 0x0 0x40000>; clock-names = "clk_xin", "clk_ahb"; }; @@ -330,7 +329,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 52 1>; - reg = <0x0 0xfd4d0000 0x1000>; + reg = <0x0 0xfd4d0000 0x0 0x1000>; timeout-sec = <10>; }; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format 2016-02-11 12:26 ` [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format Michal Simek @ 2016-02-11 16:13 ` Rob Herring 2016-02-11 18:58 ` Michal Simek 0 siblings, 1 reply; 7+ messages in thread From: Rob Herring @ 2016-02-11 16:13 UTC (permalink / raw) To: linux-arm-kernel On Thu, Feb 11, 2016 at 6:26 AM, Michal Simek <michal.simek@xilinx.com> wrote: > Use 64bit size cell format instead of 32bit for memory > description. Change 64bit sizes also for all others IPs. Why? As is, this change is completely pointless because nothing needs a >4GB size. Do you have peripherals with >4GB size? > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 2 +- > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 63 ++++++++++++++--------------- > 2 files changed, 32 insertions(+), 33 deletions(-) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts > index acb0527fdc4a..358089687a69 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts > @@ -29,7 +29,7 @@ > > memory { > device_type = "memory"; > - reg = <0x0 0x0 0x40000000>; > + reg = <0x0 0x0 0x0 0x40000000>; > }; > }; > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index e595f22e7e4b..ef8fe8e6c868 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -14,7 +14,7 @@ > / { > compatible = "xlnx,zynqmp"; > #address-cells = <2>; > - #size-cells = <1>; > + #size-cells = <2>; > > cpus { > #address-cells = <1>; > @@ -74,16 +74,15 @@ > amba_apu { > compatible = "simple-bus"; > #address-cells = <2>; > - #size-cells = <1>; > + #size-cells = <2>; > ranges; > - > gic: interrupt-controller at f9010000 { > compatible = "arm,gic-400", "arm,cortex-a15-gic"; > #interrupt-cells = <3>; > - reg = <0x0 0xf9010000 0x10000>, > - <0x0 0xf902f000 0x2000>, > - <0x0 0xf9040000 0x20000>, > - <0x0 0xf906f000 0x2000>; > + reg = <0x0 0xf9010000 0x0 0x10000>, > + <0x0 0xf902f000 0x0 0x2000>, > + <0x0 0xf9040000 0x0 0x20000>, > + <0x0 0xf906f000 0x0 0x2000>; > interrupt-controller; > interrupt-parent = <&gic>; > interrupts = <1 9 0xf04>; > @@ -93,14 +92,14 @@ > amba: amba { > compatible = "simple-bus"; > #address-cells = <2>; > - #size-cells = <1>; > + #size-cells = <2>; > ranges; > > can0: can at ff060000 { > compatible = "xlnx,zynq-can-1.0"; > status = "disabled"; > clock-names = "can_clk", "pclk"; > - reg = <0x0 0xff060000 0x1000>; > + reg = <0x0 0xff060000 0x0 0x1000>; > interrupts = <0 23 4>; > interrupt-parent = <&gic>; > tx-fifo-depth = <0x40>; > @@ -111,7 +110,7 @@ > compatible = "xlnx,zynq-can-1.0"; > status = "disabled"; > clock-names = "can_clk", "pclk"; > - reg = <0x0 0xff070000 0x1000>; > + reg = <0x0 0xff070000 0x0 0x1000>; > interrupts = <0 24 4>; > interrupt-parent = <&gic>; > tx-fifo-depth = <0x40>; > @@ -123,7 +122,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 57 4>, <0 57 4>; > - reg = <0x0 0xff0b0000 0x1000>; > + reg = <0x0 0xff0b0000 0x0 0x1000>; > clock-names = "pclk", "hclk", "tx_clk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -134,7 +133,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 59 4>, <0 59 4>; > - reg = <0x0 0xff0c0000 0x1000>; > + reg = <0x0 0xff0c0000 0x0 0x1000>; > clock-names = "pclk", "hclk", "tx_clk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -145,7 +144,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 61 4>, <0 61 4>; > - reg = <0x0 0xff0d0000 0x1000>; > + reg = <0x0 0xff0d0000 0x0 0x1000>; > clock-names = "pclk", "hclk", "tx_clk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -156,7 +155,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 63 4>, <0 63 4>; > - reg = <0x0 0xff0e0000 0x1000>; > + reg = <0x0 0xff0e0000 0x0 0x1000>; > clock-names = "pclk", "hclk", "tx_clk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -170,7 +169,7 @@ > interrupts = <0 16 4>; > interrupt-controller; > #interrupt-cells = <2>; > - reg = <0x0 0xff0a0000 0x1000>; > + reg = <0x0 0xff0a0000 0x0 0x1000>; > }; > > i2c0: i2c at ff020000 { > @@ -178,7 +177,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 17 4>; > - reg = <0x0 0xff020000 0x1000>; > + reg = <0x0 0xff020000 0x0 0x1000>; > #address-cells = <1>; > #size-cells = <0>; > }; > @@ -188,7 +187,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 18 4>; > - reg = <0x0 0xff030000 0x1000>; > + reg = <0x0 0xff030000 0x0 0x1000>; > #address-cells = <1>; > #size-cells = <0>; > }; > @@ -196,7 +195,7 @@ > sata: ahci at fd0c0000 { > compatible = "ceva,ahci-1v84"; > status = "disabled"; > - reg = <0x0 0xfd0c0000 0x2000>; > + reg = <0x0 0xfd0c0000 0x0 0x2000>; > interrupt-parent = <&gic>; > interrupts = <0 133 4>; > }; > @@ -206,7 +205,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 48 4>; > - reg = <0x0 0xff160000 0x1000>; > + reg = <0x0 0xff160000 0x0 0x1000>; > clock-names = "clk_xin", "clk_ahb"; > }; > > @@ -215,13 +214,13 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 49 4>; > - reg = <0x0 0xff170000 0x1000>; > + reg = <0x0 0xff170000 0x0 0x1000>; > clock-names = "clk_xin", "clk_ahb"; > }; > > smmu: smmu at fd800000 { > compatible = "arm,mmu-500"; > - reg = <0x0 0xfd800000 0x20000>; > + reg = <0x0 0xfd800000 0x0 0x20000>; > #global-interrupts = <1>; > interrupt-parent = <&gic>; > interrupts = <0 157 4>, > @@ -236,7 +235,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 19 4>; > - reg = <0x0 0xff040000 0x1000>; > + reg = <0x0 0xff040000 0x0 0x1000>; > clock-names = "ref_clk", "pclk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -247,7 +246,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 20 4>; > - reg = <0x0 0xff050000 0x1000>; > + reg = <0x0 0xff050000 0x0 0x1000>; > clock-names = "ref_clk", "pclk"; > #address-cells = <1>; > #size-cells = <0>; > @@ -258,7 +257,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 36 4>, <0 37 4>, <0 38 4>; > - reg = <0x0 0xff110000 0x1000>; > + reg = <0x0 0xff110000 0x0 0x1000>; > timer-width = <32>; > }; > > @@ -267,7 +266,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 39 4>, <0 40 4>, <0 41 4>; > - reg = <0x0 0xff120000 0x1000>; > + reg = <0x0 0xff120000 0x0 0x1000>; > timer-width = <32>; > }; > > @@ -276,7 +275,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 42 4>, <0 43 4>, <0 44 4>; > - reg = <0x0 0xff130000 0x1000>; > + reg = <0x0 0xff130000 0x0 0x1000>; > timer-width = <32>; > }; > > @@ -285,7 +284,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 45 4>, <0 46 4>, <0 47 4>; > - reg = <0x0 0xff140000 0x1000>; > + reg = <0x0 0xff140000 0x0 0x1000>; > timer-width = <32>; > }; > > @@ -294,7 +293,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 21 4>; > - reg = <0x0 0xff000000 0x1000>; > + reg = <0x0 0xff000000 0x0 0x1000>; > clock-names = "uart_clk", "pclk"; > }; > > @@ -303,7 +302,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 22 4>; > - reg = <0x0 0xff010000 0x1000>; > + reg = <0x0 0xff010000 0x0 0x1000>; > clock-names = "uart_clk", "pclk"; > }; > > @@ -312,7 +311,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 65 4>; > - reg = <0x0 0xfe200000 0x40000>; > + reg = <0x0 0xfe200000 0x0 0x40000>; > clock-names = "clk_xin", "clk_ahb"; > }; > > @@ -321,7 +320,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 70 4>; > - reg = <0x0 0xfe300000 0x40000>; > + reg = <0x0 0xfe300000 0x0 0x40000>; > clock-names = "clk_xin", "clk_ahb"; > }; > > @@ -330,7 +329,7 @@ > status = "disabled"; > interrupt-parent = <&gic>; > interrupts = <0 52 1>; > - reg = <0x0 0xfd4d0000 0x1000>; > + reg = <0x0 0xfd4d0000 0x0 0x1000>; > timeout-sec = <10>; > }; > }; > -- > 1.9.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format 2016-02-11 16:13 ` Rob Herring @ 2016-02-11 18:58 ` Michal Simek 2016-02-11 19:49 ` Rob Herring 0 siblings, 1 reply; 7+ messages in thread From: Michal Simek @ 2016-02-11 18:58 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On 11.2.2016 17:13, Rob Herring wrote: > On Thu, Feb 11, 2016 at 6:26 AM, Michal Simek <michal.simek@xilinx.com> wrote: >> Use 64bit size cell format instead of 32bit for memory >> description. Change 64bit sizes also for all others IPs. > > Why? As is, this change is completely pointless because nothing needs > a >4GB size. Do you have peripherals with >4GB size? The change I need to do is to support more than 4GB memory. Memory space is divided to some parts. 2GB connected to hard part below 4GB. There there is 1GB connected to PL part below. Then 32GB hard part above of 4GB and a lot of space for PL part (~230GB). PCIe can also address more than 256GB. That's why I stand before decision. Change size-cell for all IPs which are currently listed. Or just change it for memory node which is listed in mainline. I am not quite sure how PCIe description will look like and if there is any other IP which will required on current buses use sizes more that 4GB. That's why I have change all sizes to support more than 4GB. But definitely current need is to support more than 4GB memory size and I have no problem to use not empty ranges property and keep there #size-cells = <1>; Both solution works for me. Definitely thank you for your comments. Thanks, Michal -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 181 bytes Desc: OpenPGP digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160211/4e1ce5ef/attachment.sig> ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format 2016-02-11 18:58 ` Michal Simek @ 2016-02-11 19:49 ` Rob Herring 2016-02-11 20:15 ` Michal Simek 0 siblings, 1 reply; 7+ messages in thread From: Rob Herring @ 2016-02-11 19:49 UTC (permalink / raw) To: linux-arm-kernel On Thu, Feb 11, 2016 at 12:58 PM, Michal Simek <monstr@monstr.eu> wrote: > Hi Rob, > > On 11.2.2016 17:13, Rob Herring wrote: >> On Thu, Feb 11, 2016 at 6:26 AM, Michal Simek <michal.simek@xilinx.com> wrote: >>> Use 64bit size cell format instead of 32bit for memory >>> description. Change 64bit sizes also for all others IPs. >> >> Why? As is, this change is completely pointless because nothing needs >> a >4GB size. Do you have peripherals with >4GB size? > > The change I need to do is to support more than 4GB memory. Memory space > is divided to some parts. 2GB connected to hard part below 4GB. There > there is 1GB connected to PL part below. Then 32GB hard part above of > 4GB and a lot of space for PL part (~230GB). > > PCIe can also address more than 256GB. So I would expect some amount of the bus structure to be reflected in the DT. For example, hard and PL IP are probably in separate address ranges. I'd guess PL bus has additional logic to enable/disable it for reprogramming, so you'd need a different bus node anyway. For PCIe, it's probably its own bus too. > That's why I stand before decision. Change size-cell for all IPs which > are currently listed. Or just change it for memory node which is listed > in mainline. > I am not quite sure how PCIe description will look like and if there is > any other IP which will required on current buses use sizes more that > 4GB. That's why I have change all sizes to support more than 4GB. > > But definitely current need is to support more than 4GB memory size and > I have no problem to use not empty ranges property and keep there > #size-cells = <1>; Then why aren't you adding to the memory? (the bootloader sets the actual size is a valid answer) > Both solution works for me. Definitely thank you for your comments. Either way, I'd change this when you actually need the change, not by itself. Rob ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format 2016-02-11 19:49 ` Rob Herring @ 2016-02-11 20:15 ` Michal Simek 0 siblings, 0 replies; 7+ messages in thread From: Michal Simek @ 2016-02-11 20:15 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On 11.2.2016 20:49, Rob Herring wrote: > On Thu, Feb 11, 2016 at 12:58 PM, Michal Simek <monstr@monstr.eu> wrote: >> Hi Rob, >> >> On 11.2.2016 17:13, Rob Herring wrote: >>> On Thu, Feb 11, 2016 at 6:26 AM, Michal Simek <michal.simek@xilinx.com> wrote: >>>> Use 64bit size cell format instead of 32bit for memory >>>> description. Change 64bit sizes also for all others IPs. >>> >>> Why? As is, this change is completely pointless because nothing needs >>> a >4GB size. Do you have peripherals with >4GB size? >> >> The change I need to do is to support more than 4GB memory. Memory space >> is divided to some parts. 2GB connected to hard part below 4GB. There >> there is 1GB connected to PL part below. Then 32GB hard part above of >> 4GB and a lot of space for PL part (~230GB). >> >> PCIe can also address more than 256GB. > > So I would expect some amount of the bus structure to be reflected in > the DT. For example, hard and PL IP are probably in separate address > ranges. I'd guess PL bus has additional logic to enable/disable it for > reprogramming, so you'd need a different bus node anyway. For PCIe, > it's probably its own bus too. As you see right now there is separation already. > >> That's why I stand before decision. Change size-cell for all IPs which >> are currently listed. Or just change it for memory node which is listed >> in mainline. >> I am not quite sure how PCIe description will look like and if there is >> any other IP which will required on current buses use sizes more that >> 4GB. That's why I have change all sizes to support more than 4GB. >> >> But definitely current need is to support more than 4GB memory size and >> I have no problem to use not empty ranges property and keep there >> #size-cells = <1>; > > Then why aren't you adding to the memory? (the bootloader sets the > actual size is a valid answer) I am not fully convinced about it. Bootloader can set it up but there shouldn't be dependency on bootloader capability that it will do it. Also you don't need to use fully featured bootloader for doing that. It means that for board dtses make sense to fill memory node with correct values. If bootloader is capable to rewrite it/fix it, then it is fine. If not, you can use let's say default values. Also the second part of the problem is. You have bootloader which is aware about that you have 34GB of memory in two banks. 2GB below 4GB limit and 32GB above. But if bootloader starts to rewrite memory node where #size-cell = <1> with 32GB size it will probably messes it up. That's why I see the value to setup size-cells = <2>; earlier rather than later. IRC someone mentioning that in past when I was pushing zynqmp DTS that we should use #size-cells = <2>; >> Both solution works for me. Definitely thank you for your comments. > > Either way, I'd change this when you actually need the change, not by itself. ok. Fair enough. I need this for at least memory node because boards are using the same zynqmp.dtsi files. For all other buses I have no problem to keep just size-cells = <1>; and setup ranges to make dtc happy. Thanks, Michal ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2016-02-11 20:15 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-02-11 12:26 [PATCH 1/3] ARM64: zynqmp: Keep gpio node alphabetically sorted Michal Simek 2016-02-11 12:26 ` [PATCH 2/3] ARM64: zynqmp: Extract clock information from EP108 Michal Simek 2016-02-11 12:26 ` [PATCH 3/3] ARM64: zynqmp: Use 64bit size cell format Michal Simek 2016-02-11 16:13 ` Rob Herring 2016-02-11 18:58 ` Michal Simek 2016-02-11 19:49 ` Rob Herring 2016-02-11 20:15 ` Michal Simek
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