linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 15/20] KVM: ARM64: Add PMU overflow interrupt routing
Date: Wed, 24 Feb 2016 13:19:57 +0000	[thread overview]
Message-ID: <56CDADFD.10805@arm.com> (raw)
In-Reply-To: <20160224122718.GD18451@cbox>

On 24/02/16 12:27, Christoffer Dall wrote:
> On Wed, Feb 24, 2016 at 01:08:35PM +0800, Shannon Zhao wrote:
>> From: Shannon Zhao <shannon.zhao@linaro.org>
>>
>> When calling perf_event_create_kernel_counter to create perf_event,
>> assign a overflow handler. Then when the perf event overflows, set the
>> corresponding bit of guest PMOVSSET register. If this counter is enabled
>> and its interrupt is enabled as well, kick the vcpu to sync the
>> interrupt.
>>
>> On VM entry, if there is counter overflowed, inject the interrupt with
>> the level set to 1. Otherwise, inject the interrupt with the level set
>> to 0.
>>
>> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
>> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
>> Reviewed-by: Andrew Jones <drjones@redhat.com>
>> ---
>>  arch/arm/kvm/arm.c    |  2 ++
>>  include/kvm/arm_pmu.h |  3 +++
>>  virt/kvm/arm/pmu.c    | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++-
>>  3 files changed, 55 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
>> index dda1959..f54264c 100644
>> --- a/arch/arm/kvm/arm.c
>> +++ b/arch/arm/kvm/arm.c
>> @@ -28,6 +28,7 @@
>>  #include <linux/sched.h>
>>  #include <linux/kvm.h>
>>  #include <trace/events/kvm.h>
>> +#include <kvm/arm_pmu.h>
>>  
>>  #define CREATE_TRACE_POINTS
>>  #include "trace.h"
>> @@ -577,6 +578,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
>>  		 * non-preemptible context.
>>  		 */
>>  		preempt_disable();
>> +		kvm_pmu_flush_hwstate(vcpu);
>>  		kvm_timer_flush_hwstate(vcpu);
>>  		kvm_vgic_flush_hwstate(vcpu);
>>  
>> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
>> index 8bc92d1..0aed4d4 100644
>> --- a/include/kvm/arm_pmu.h
>> +++ b/include/kvm/arm_pmu.h
>> @@ -35,6 +35,7 @@ struct kvm_pmu {
>>  	int irq_num;
>>  	struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
>>  	bool ready;
>> +	bool irq_level;
>>  };
>>  
>>  #define kvm_arm_pmu_v3_ready(v)		((v)->arch.pmu.ready)
>> @@ -44,6 +45,7 @@ u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
>>  void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val);
>>  void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val);
>>  void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val);
>> +void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
>>  void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
>>  void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
>>  void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
>> @@ -67,6 +69,7 @@ static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
>>  static inline void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val) {}
>>  static inline void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val) {}
>>  static inline void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val) {}
>> +static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
>>  static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
>>  static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
>>  static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
>> diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c
>> index cda869c..1cd4214 100644
>> --- a/virt/kvm/arm/pmu.c
>> +++ b/virt/kvm/arm/pmu.c
>> @@ -21,6 +21,7 @@
>>  #include <linux/perf_event.h>
>>  #include <asm/kvm_emulate.h>
>>  #include <kvm/arm_pmu.h>
>> +#include <kvm/arm_vgic.h>
>>  
>>  /**
>>   * kvm_pmu_get_counter_value - get PMU counter value
>> @@ -181,6 +182,53 @@ void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val)
>>  }
>>  
>>  /**
>> + * kvm_pmu_flush_hwstate - flush pmu state to cpu
>> + * @vcpu: The vcpu pointer
>> + *
>> + * Inject virtual PMU IRQ if IRQ is pending for this cpu.
>> + */
>> +void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu)
>> +{
>> +	struct kvm_pmu *pmu = &vcpu->arch.pmu;
>> +	bool overflow;
>> +
>> +	if (!kvm_arm_pmu_v3_ready(vcpu))
>> +		return;
>> +
>> +	overflow = !!kvm_pmu_overflow_status(vcpu);
>> +	if (pmu->irq_level != overflow) {
>> +		pmu->irq_level = overflow;
>> +		kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,
>> +				    pmu->irq_num, overflow);
>> +	}
> 
> a consequence of only doing this on flush and not checking if the input
> to the vgic should be adjusted on sync is that if you exit the guest
> because the guest does a 'wfi', for example, and you entered with the
> overflow interrupt set, then kvm_arch_vcpu_runnable() will return true,
> and the VCPU will not block but will run anyway.
> 
> Maybe not a big deal, but I think we might as well check the overflow
> status on sync (coming back from the VM) and reset the line at that time
> so that we have a 'more up to date' view of the interrupt line after
> exiting a vcpu.

That's a very good point. I can definitely imagine pathological
behaviours if the guest otherwise relies on the overflow interrupt
triggering.

Shannon, can you please address this?

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2016-02-24 13:19 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-24  5:08 [PATCH v13 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 01/20] ARM64: Move PMU register related defines to asm/perf_event.h Shannon Zhao
2016-02-24 17:52   ` Will Deacon
2016-02-25  2:02     ` Shannon Zhao
2016-02-25 10:48       ` Will Deacon
2016-02-29 13:07       ` Marc Zyngier
2016-02-29 13:59         ` Marc Zyngier
2016-02-29 15:41           ` Will Deacon
2016-02-29 15:53             ` Marc Zyngier
2016-02-29 15:43         ` Will Deacon
2016-02-29 18:50         ` Shannon Zhao
2016-02-29 19:03           ` Marc Zyngier
2016-02-24  5:08 ` [PATCH v13 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 03/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 04/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 05/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 06/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 07/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 08/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 09/20] KVM: ARM64: Add access handler for event type register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 10/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 11/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 12/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 13/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 14/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 15/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-02-24 12:27   ` Christoffer Dall
2016-02-24 13:19     ` Marc Zyngier [this message]
2016-02-24 13:26       ` Shannon Zhao
2016-02-24 13:42         ` Marc Zyngier
2016-02-24 14:33   ` [PATCH v14 " Shannon Zhao
2016-02-26  8:52     ` Christoffer Dall
2016-02-26 11:29     ` [PATCH v15 " Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 16/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 17/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 18/20] KVM: ARM64: Add a new feature bit for PMUv3 Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 19/20] KVM: ARM: Introduce per-vcpu kvm device controls Shannon Zhao
2016-02-24  5:08 ` [PATCH v13 20/20] KVM: ARM64: Add a new vcpu device control group for PMUv3 Shannon Zhao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=56CDADFD.10805@arm.com \
    --to=marc.zyngier@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).