From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 00/10] arm64: Introduce Allwinner A64 and Pine64 support
Date: Thu, 25 Feb 2016 10:04:59 +0000 [thread overview]
Message-ID: <56CED1CB.8040807@arm.com> (raw)
In-Reply-To: <1456165255-31013-1-git-send-email-andre.przywara@arm.com>
Hi Maxime,
can you give me a quick assessment on how we can progress from here?
Is it already too late for at least some of the patches to go into 4.6?
If not, can you at least merge the Kconfig patch (3/10) and the pinctrl
driver (if that goes via your tree at all)? Do you need more reviews or
Acks?
Of the prerequisite patches for a clean arm64 compile I see that the
sunxi-rsb is in your for-next branch, but not in -next itself. Also I
got a message about the sunxi-ss Kconfig patch to be applied, but cannot
find it in -next either. All the other patches have made it into -next
as of today.
Also are you happy with the PLL6 reuse patch I sent on Monday and can I
base the A64's PLL7 clock on that?
Or do you prefer another approach here? I am happy to discuss this on
the list then.
Cheers,
Andre.
On 22/02/16 18:20, Andre Przywara wrote:
> Hi,
>
> another update of the Allwinner A64 / Pine64 support series.
> I added a solution for the PLL6 reuse issue (the same patch I posted
> yesterday). Also I addressed the comments I got from Rob and Chen-Yu.
> For a changelog see below.
>
> This series provides initial support for the Allwinner A64 SoC,
> which is based on four ARM Cortex-A53 cores implementing the ARMv8
> 64-bit architecture.
> On top of this there is also initial support for the Pine64 board,
> for which you can find more information and links in the linux-sunxi
> Wiki [1].
> The resulting kernel boots fine on my development samples I have
> here, though the actual boot process is a bit involved at the moment.
> You can find more information and a ready-to-flash image here [2].
>
> Patch 1/10 removes the hardcoded "pll6" name for the PLL6 clock, so
> it can be reused for the A64's PLL7, patch 2/10 uses that facility
> for the Allwinner H3 SoC's PLL8.
> Patch 3/10 enables the Allwinner/sunxi platform for the arm64
> architecture, so one can select the required drivers during
> configuration.
> Patch 4/10 adds the pinctrl driver, which has been on the list before.
> Patch 5 and 6 add a new generic driver for the bus clock gates which
> relies on DT for providing the parent relationship. That makes adding
> new SoCs much easier, since there should be no more kernel code
> changes necessary.
> Patch 7-9 add the new vendor name and the device tree files, the former
> for the SoC itself, the latter for the Pine64 boards.
> The final patch 10 updates defconfig, so that the generic arm64 kernel
> supports the basic SoC drivers out of the box.
>
> In the moment we support the basic peripherals like GIC, timer, clocks,
> GPIOs, UARTs and (since v2) I2C.
> The MMC IP block has changed a bit compared to previous SoCs, so the
> existing driver is not 100% compatible. However the default delays seem
> to work fine for the SD cards, so I included all the necessary bits in
> here, since working MMC makes this series indefinitely more usable.
> We can fix both the MMC driver and the DT in a compatible way later.
>
> Please have a look and comment on the patches. We might want to split
> the series if some patches seem too controversial for being merged
> soonish, please let me know if this is the case and I am happy to
> rearrange the series.
>
> The patches are based on mripard/sunxi/for-next (since linux-next is
> a bit messy atm). A working repo can be found over here[3].
>
> Cheers,
> Andre
>
> Changelog v1 .. v2:
> - Change the naming of DT nodes, identifiers and file names to include
> the wonderful Allwinner architecture prefix everywhere. You asked
> for it, you got it, enjoy!
> - Drop SUNXI_MMC to be selected automatically, instead put it in the
> defconfig.
> - Add a binding documentation for the new multi-bus-gates driver.
> - Add a defconfig update patch.
> - Lots of changes in the DTs, see the respective patches for details.
>
> Changelog v2 .. v3:
> - Reordered sunxi section in ARM64 platform config.
> - Add PLL6 reuse patch and rework the .dtsi to use the existing binding.
> - Drop unneeded module boilerplate for the pinctrl driver.
> - Rename "owa" pin to "spdif".
> - Rename pll8 to pll7 in the DT.
> - Remove leading 0 in DT node address parts.
> - Added Acks from Rob.
>
> [1] http://linux-sunxi.org/Pine64
> [2] https://github.com/apritzel/pine64
> [3] https://github.com/apritzel/linux/commits/a64-v3
>
> Andre Przywara (10):
> clk: sunxi: allow PLL6 clock to be reused
> ARM: dts: sunxi: make PLL8 in the H3 a proper clock
> arm64: Introduce Allwinner SoC config option
> drivers: pinctrl: add driver for Allwinner A64 SoC
> DT: clk: sunxi: add binding doc for the multi-bus-gates clock
> clk: sunxi: add generic multi-parent bus clock gates driver
> arm64: dts: add Allwinner A64 SoC .dtsi
> of: add vendor prefix for Pine64
> arm64: dts: add Pine64 support
> arm64: add defconfig options for Allwinner SoCs
>
> Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
> Documentation/devicetree/bindings/clock/sunxi.txt | 7 +
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> arch/arm/boot/dts/sun8i-h3.dtsi | 18 +-
> arch/arm64/Kconfig.platforms | 6 +
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/allwinner/Makefile | 5 +
> .../dts/allwinner/sun50i-a64-pine64-common.dtsi | 80 +++
> .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 59 ++
> .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 58 ++
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 624 +++++++++++++++++++++
> arch/arm64/configs/defconfig | 7 +
> drivers/clk/sunxi/Makefile | 1 +
> drivers/clk/sunxi/clk-factors.c | 3 +-
> drivers/clk/sunxi/clk-factors.h | 1 +
> drivers/clk/sunxi/clk-multi-gates.c | 105 ++++
> drivers/clk/sunxi/clk-sunxi.c | 4 +-
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 602 ++++++++++++++++++++
> 21 files changed, 1577 insertions(+), 12 deletions(-)
> create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> create mode 100644 drivers/clk/sunxi/clk-multi-gates.c
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
>
next prev parent reply other threads:[~2016-02-25 10:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-22 18:20 [PATCH v3 00/10] arm64: Introduce Allwinner A64 and Pine64 support Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 02/10] ARM: dts: sunxi: make PLL8 in the H3 a proper clock Andre Przywara
2016-02-22 18:20 ` [PATCH v3 03/10] arm64: Introduce Allwinner SoC config option Andre Przywara
2016-02-22 18:20 ` [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC Andre Przywara
2016-02-25 18:49 ` Maxime Ripard
2016-03-07 3:33 ` Linus Walleij
2016-02-22 18:20 ` [PATCH v3 05/10] DT: clk: sunxi: add binding doc for the multi-bus-gates clock Andre Przywara
2016-02-22 18:20 ` [PATCH v3 06/10] clk: sunxi: add generic multi-parent bus clock gates driver Andre Przywara
2016-02-22 18:20 ` [PATCH v3 07/10] arm64: dts: add Allwinner A64 SoC .dtsi Andre Przywara
2016-02-22 18:20 ` [PATCH v3 08/10] of: add vendor prefix for Pine64 Andre Przywara
2016-02-22 18:20 ` [PATCH v3 09/10] arm64: dts: add Pine64 support Andre Przywara
2016-02-22 18:20 ` [PATCH v3 10/10] arm64: add defconfig options for Allwinner SoCs Andre Przywara
2016-02-25 18:52 ` Maxime Ripard
2016-02-25 10:04 ` Andre Przywara [this message]
2016-02-25 19:25 ` [PATCH v3 00/10] arm64: Introduce Allwinner A64 and Pine64 support Maxime Ripard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56CED1CB.8040807@arm.com \
--to=andre.przywara@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).