From: "Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>
To: "angelogioacchino.delregno@collabora.com"
<angelogioacchino.delregno@collabora.com>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Bibby Hsieh (謝濟遠)" <Bibby.Hsieh@mediatek.com>,
"jason-ch.chen@mediatek.corp-partner.google.com"
<jason-ch.chen@mediatek.corp-partner.google.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
"daniel@ffwll.ch" <daniel@ffwll.ch>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"CK Hu (胡俊光)" <ck.hu@mediatek.com>,
"seanpaul@chromium.org" <seanpaul@chromium.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"airlied@gmail.com" <airlied@gmail.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"fshao@chromium.org" <fshao@chromium.org>
Subject: Re: [PATCH v5 10/13] drm/mediatek: Support CRC in display driver
Date: Fri, 16 Feb 2024 02:16:58 +0000 [thread overview]
Message-ID: <56eec57c795bdea59baac3ad3d25e015d4c596c3.camel@mediatek.com> (raw)
In-Reply-To: <44529502-250b-4c8a-94c3-2c481d1385cf@collabora.com>
Hi Angelo,
On Thu, 2024-02-15 at 12:06 +0100, AngeloGioacchino Del Regno wrote:
> Il 15/02/24 11:11, Hsiao Chien Sung ha scritto:
> > Register CRC related function pointers to support
> > CRC retrieval.
> >
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 239
> > ++++++++++++++++++++
> > drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 39 ++++
> > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 3 +
> > 3 files changed, 281 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > index 14cf75fa217f9..6cb1ed419dee7 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > @@ -68,6 +68,9 @@ struct mtk_drm_crtc {
> > /* lock for display hardware access */
> > struct mutex hw_lock;
> > bool config_updating;
> > +
> > + struct mtk_ddp_comp *crc_provider;
> > + unsigned int frames;
> > };
> >
> > struct mtk_crtc_state {
> > @@ -635,6 +638,14 @@ static void mtk_crtc_ddp_irq(void *data)
> > struct drm_crtc *crtc = data;
> > struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> > struct mtk_drm_private *priv = crtc->dev->dev_private;
> > + struct mtk_ddp_comp *comp = mtk_crtc->crc_provider;
> > +
> > + /*
> > + * crc providers should make sure the crc is always correct
> > + * by resetting it in .crc_read()
> > + */
> > + if (crtc->crc.opened)
> > + comp->funcs->crc_read(comp->dev);
> >
> > #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > if (!priv->data->shadow_register && !mtk_crtc-
> > >cmdq_client.chan)
> > @@ -646,6 +657,24 @@ static void mtk_crtc_ddp_irq(void *data)
> > if (!priv->data->shadow_register)
> > mtk_crtc_ddp_config(crtc, NULL);
> > #endif
> > +
> > + /*
> > + * drm_crtc_add_crc_entry() could take more than 50ms to finish
> > + * put it at the end of the isr
> > + */
> > + if (crtc->crc.opened) {
> > + /*
> > + * skip the first crc because the first frame is
> > configured by
> > + * mtk_crtc_ddp_hw_init() when atomic enable
> > + */
> > + if (++mtk_crtc->frames > 1) {
> > + drm_crtc_add_crc_entry(crtc, true,
> > + drm_crtc_vblank_count(cr
> > tc),
> > + comp->funcs-
> > >crc_entry(comp->dev));
> > + }
> > + } else {
> > + mtk_crtc->frames = 0;
> > + }
> > mtk_drm_finish_page_flip(mtk_crtc);
> > }
> >
> > @@ -704,6 +733,40 @@ static void mtk_drm_crtc_update_output(struct
> > drm_crtc *crtc,
> > }
> > }
> >
> > +static int mtk_drm_crtc_set_crc_source(struct drm_crtc *crtc,
> > const char *src)
> > +{
> > + if (src && strcmp(src, "auto") != 0) {
> > + DRM_ERROR("%s(crtc-%d): unknown source '%s'\n",
> > + __func__, drm_crtc_index(crtc), src);
> > + return -EINVAL;
> > + }
> > + return 0;
> > +}
> > +
> > +static int mtk_drm_crtc_verify_crc_source(struct drm_crtc *crtc,
> > + const char *src,
> > + size_t *cnt)
> > +{
> > + struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> > + struct mtk_ddp_comp *comp = mtk_crtc->crc_provider;
> > +
> > + if (!comp) {
> > + DRM_ERROR("%s(crtc-%d): no crc provider\n",
> > + __func__, drm_crtc_index(crtc));
> > + return -ENOENT;
> > + }
> > +
> > + if (src && strcmp(src, "auto") != 0) {
> > + DRM_ERROR("%s(crtc-%d): unknown source '%s'\n",
> > + __func__, drm_crtc_index(crtc), src);
> > + return -EINVAL;
> > + }
> > +
> > + *cnt = comp->funcs->crc_cnt(comp->dev);
> > +
> > + return 0;
> > +}
> > +
> > int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct
> > drm_plane *plane,
> > struct mtk_plane_state *state)
> > {
> > @@ -841,6 +904,8 @@ static const struct drm_crtc_funcs
> > mtk_crtc_funcs = {
> > .atomic_destroy_state = mtk_drm_crtc_destroy_state,
> > .enable_vblank = mtk_drm_crtc_enable_vblank,
> > .disable_vblank = mtk_drm_crtc_disable_vblank,
> > + .set_crc_source = mtk_drm_crtc_set_crc_source,
> > + .verify_crc_source = mtk_drm_crtc_verify_crc_source,
> > };
> >
> > static const struct drm_crtc_helper_funcs mtk_crtc_helper_funcs =
> > {
> > @@ -1033,6 +1098,11 @@ int mtk_drm_crtc_create(struct drm_device
> > *drm_dev,
> >
> > if (comp->funcs->ctm_set)
> > has_ctm = true;
> > +
> > + if (comp->funcs->crc_cnt &&
> > + comp->funcs->crc_entry &&
> > + comp->funcs->crc_read)
> > + mtk_crtc->crc_provider = comp;
> > }
> >
> > mtk_ddp_comp_register_vblank_cb(comp, mtk_crtc_ddp_irq,
> > @@ -1137,3 +1207,172 @@ int mtk_drm_crtc_create(struct drm_device
> > *drm_dev,
> >
> > return 0;
> > }
> > +
> > +void mtk_drm_crc_init(struct mtk_drm_crc *crc,
> > + const u32 *crc_offset_table, size_t crc_count,
> > + u32 reset_offset, u32 reset_mask)
> > +{
> > + crc->ofs = crc_offset_table;
> > + crc->cnt = crc_count;
> > + crc->rst_ofs = reset_offset;
> > + crc->rst_msk = reset_mask;
> > + crc->va = kcalloc(crc->cnt, sizeof(*crc->va), GFP_KERNEL);
> > + if (!crc->va) {
> > + DRM_ERROR("failed to allocate memory for crc\n");
> > + crc->cnt = 0;
> > + }
> > +}
> > +
> > +void mtk_drm_crc_read(struct mtk_drm_crc *crc, void __iomem *reg)
> > +{
>
> u32 n; goes here
>
> > + if (!crc->cnt || !crc->ofs || !crc->va)
> > + return;
> > +
> > +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> > + /* sync to see the most up-to-date copy of the DMA buffer */
> > + dma_sync_single_for_cpu(crc->cmdq_client.chan->mbox->dev,
> > + crc->pa, crc->cnt * sizeof(*crc->va),
> > + DMA_FROM_DEVICE);
> > +#else
> > + /* read crc with cpu for the platforms without cmdq */
> > + {
>
> then you don't need the braces.
>
> Regards,
> Angelo
>
The variable n is placed within the braces because when CONFIG_MTK_CMDQ
is defined, the variable is not being used and causes a build error.
This is a workaround in order to have only one #if macro in that
function for a more clean code.
Thanks,
Shawn
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next prev parent reply other threads:[~2024-02-16 2:17 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-15 10:11 [PATCH v5 00/13] Support IGT in display driver Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 01/13] soc: mediatek: Disable 9-bit alpha in ETHDR Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 02/13] drm/mediatek: Add OVL compatible name for MT8195 Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 03/13] drm/mediatek: Add missing plane settings when async update Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 04/13] drm/mediatek: Fix errors when reporting rotation capability Hsiao Chien Sung
2024-03-01 6:56 ` CK Hu (胡俊光)
2024-02-15 10:11 ` [PATCH v5 05/13] drm/mediatek: Set DRM mode configs accordingly Hsiao Chien Sung
2024-03-01 7:21 ` CK Hu (胡俊光)
2024-03-19 7:16 ` Shawn Sung (宋孝謙)
2024-02-15 10:11 ` [PATCH v5 06/13] drm/mediatek: Turn off the layers with zero width or height Hsiao Chien Sung
2024-02-15 10:45 ` AngeloGioacchino Del Regno
2024-02-16 2:03 ` Shawn Sung (宋孝謙)
2024-03-01 7:51 ` CK Hu (胡俊光)
2024-03-19 7:34 ` Shawn Sung (宋孝謙)
2024-02-15 10:11 ` [PATCH v5 07/13] drm/mediatek: Support alpha blending in display driver Hsiao Chien Sung
2024-02-15 10:46 ` AngeloGioacchino Del Regno
2024-02-15 10:11 ` [PATCH v5 08/13] drm/mediatek: Support alpha blending in OVL Hsiao Chien Sung
2024-02-15 11:02 ` AngeloGioacchino Del Regno
2024-02-16 2:17 ` Shawn Sung (宋孝謙)
2024-03-01 9:01 ` CK Hu (胡俊光)
2024-02-15 10:11 ` [PATCH v5 09/13] drm/mediatek: Support alpha blending in Mixer Hsiao Chien Sung
2024-03-01 9:07 ` CK Hu (胡俊光)
2024-02-15 10:11 ` [PATCH v5 10/13] drm/mediatek: Support CRC in display driver Hsiao Chien Sung
2024-02-15 11:06 ` AngeloGioacchino Del Regno
2024-02-16 2:16 ` Shawn Sung (宋孝謙) [this message]
2024-02-16 17:04 ` Daniel Vetter
2024-02-16 17:17 ` Daniel Vetter
2024-02-19 2:28 ` Shawn Sung (宋孝謙)
2024-02-19 2:06 ` Shawn Sung (宋孝謙)
2024-02-15 10:11 ` [PATCH v5 11/13] drm/mediatek: Support CRC in OVL Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 12/13] drm/mediatek: Support CRC in OVL adaptor Hsiao Chien Sung
2024-02-15 10:11 ` [PATCH v5 13/13] drm/mediatek: Add comments for the structures Hsiao Chien Sung
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