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From: Suzuki.Poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 09/15] coresight: tmc: adding mode of operation for link/sinks
Date: Tue, 19 Apr 2016 14:19:49 +0100	[thread overview]
Message-ID: <57163075.5030107@arm.com> (raw)
In-Reply-To: <1460483692-25061-10-git-send-email-mathieu.poirier@linaro.org>

On 12/04/16 18:54, Mathieu Poirier wrote:
> Moving tmc_drvdata::enable to a local_t mode.  That way the
> sink interface is aware of it's orgin and the foundation for
> mutual exclusion between the sysFS and Perf interface can be
> laid out.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> ---
>   drivers/hwtracing/coresight/coresight-tmc-etf.c | 28 ++++++++++++++++++-------
>   drivers/hwtracing/coresight/coresight-tmc-etr.c | 24 ++++++++++++++++-----
>   drivers/hwtracing/coresight/coresight-tmc.h     |  4 ++--
>   3 files changed, 42 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index 7cb287ef7b9e..5908000e1ae0 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -110,6 +110,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
>   {
>   	bool allocated = false;
>   	char *buf = NULL;
> +	u32 val;
>   	unsigned long flags;
>   	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
>
> @@ -146,6 +147,15 @@ fast_path:
>   		return -EBUSY;
>   	}
>
> +	val = local_xchg(&drvdata->mode, mode);
> +	/*
> +	 * In sysFS mode we can have multiple writers per sink.  Since this
> +	 * sink is already enabled no memory is needed and the HW need not be
> +	 * touched.
> +	 */
> +	if (val == CS_MODE_SYSFS)
> +		goto out;
> +

We are not dropping the spinlock in this case. Are we ?

>   	/*
>   	 * If drvdata::buf isn't NULL, memory was allocated for a previous
>   	 * trace run but wasn't read.  If so simply zero-out the memory.
> @@ -163,9 +173,9 @@ fast_path:
>   	}
>
>   	tmc_etb_enable_hw(drvdata);
> -	drvdata->enable = true;
>   	spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
> +out:
>   	/* Free memory outside the spinlock if need be */
>   	if (!allocated && buf)
>   		kfree(buf);

> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 6022ff26deba..8e6fe267195a 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -85,6 +85,7 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
>   static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode)
>   {
>   	bool allocated = false;
> +	u32 val;
>   	unsigned long flags;
>   	void __iomem *vaddr = NULL;
>   	dma_addr_t paddr;
> @@ -125,6 +126,15 @@ fast_path:
>   		return -EBUSY;
>   	}
>
> +	val = local_xchg(&drvdata->mode, mode);
> +	/*
> +	 * In sysFS mode we can have multiple writers per sink.  Since this
> +	 * sink is already enabled no memory is needed and the HW need not be
> +	 * touched.
> +	 */
> +	if (val == CS_MODE_SYSFS)
> +		goto out;
> +

Same as above, we should drop the locks in this case.

> @@ -140,9 +150,9 @@ fast_path:
>   	memset(drvdata->vaddr, 0, drvdata->size);
>
>   	tmc_etr_enable_hw(drvdata);
> -	drvdata->enable = true;
>   	spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
> +out:
>   	/* Free memory outside the spinlock if need be */
>   	if (!allocated && vaddr)
>   		dma_free_coherent(drvdata->dev, drvdata->size, vaddr, paddr);
> @@ -153,6 +163,7 @@ fast_path:

> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 80096fa75326..821bdf150ac9 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -100,7 +100,7 @@ enum tmc_mem_intf_width {
>    * @paddr:	DMA start location in RAM.
>    * @vaddr:	virtual representation of @paddr.
>    * @size:	@buf size.
> - * @enable:	this TMC is being used.
> + * @mode:	how this TMC is being used.
>    * @config_type: TMC variant, must be of type @tmc_config_type.
>    * @trigger_cntr: amount of words to store after a trigger.
>    */
> @@ -116,7 +116,7 @@ struct tmc_drvdata {
>   	dma_addr_t		paddr;
>   	void __iomem		*vaddr;
>   	u32			size;
> -	bool			enable;
> +	local_t			mode;

Since we always deal with the mode under the spinlock, do we really need this to
be local_t ? Or do we plan to get rid of the lock ?

Suzuki

  reply	other threads:[~2016-04-19 13:19 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-12 17:54 [PATCH V2 00/15] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 01/15] coresight: tmc: modifying naming convention Mathieu Poirier
2016-04-14 17:01   ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 02/15] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-04-14 17:05   ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 03/15] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-04-14 17:11   ` Suzuki K Poulose
2016-04-15 15:40     ` Mathieu Poirier
2016-04-15 17:41       ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 04/15] coresight: tmc: introducing new header file Mathieu Poirier
2016-04-14 17:33   ` Suzuki K Poulose
2016-04-15 16:03     ` Mathieu Poirier
2016-04-15 16:08       ` Suzuki K Poulose
2016-04-15 16:15         ` Mathieu Poirier
2016-04-15 16:18           ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 05/15] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-04-19 12:20   ` Suzuki K Poulose
2016-04-19 15:14     ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 06/15] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-19 12:30   ` Suzuki K Poulose
2016-04-19 15:22     ` Mathieu Poirier
2016-04-19 15:32       ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 07/15] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-19 12:55   ` Suzuki K Poulose
2016-04-19 13:14     ` Suzuki K Poulose
2016-04-19 15:39     ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 08/15] coresight: tmc: getting the right read_count on tmc_open() Mathieu Poirier
2016-04-19 13:07   ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 09/15] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-19 13:19   ` Suzuki K Poulose [this message]
2016-04-19 15:45     ` Mathieu Poirier
2016-04-19 15:49       ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 10/15] coresight: tmc: dump system memory content only when needed Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 11/15] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-04-19 13:42   ` Suzuki K Poulose
2016-04-19 16:16     ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 12/15] coresight: tmc: keep track of memory width Mathieu Poirier
2016-04-14 11:19   ` Suzuki K Poulose
2016-04-15 16:10     ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-04-19 16:16   ` Suzuki K Poulose
2016-04-19 16:45     ` Mathieu Poirier
2016-04-19 16:50       ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 14/15] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-04-21 16:10   ` Suzuki K Poulose
2016-04-21 22:00     ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 15/15] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
2016-04-21 12:53   ` Suzuki K Poulose

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