From: Suzuki.Poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 14/18] coresight: tmc: keep track of memory width
Date: Mon, 25 Apr 2016 16:28:58 +0100 [thread overview]
Message-ID: <571E37BA.5080703@arm.com> (raw)
In-Reply-To: <CANLsYky5fcnyvLwVwme1AmQ5vbCCu-DOkhdGwz7FgwZnLUV3CA@mail.gmail.com>
On 25/04/16 16:25, Mathieu Poirier wrote:
> On 25 April 2016 at 09:09, Suzuki K Poulose <Suzuki.Poulose@arm.com> wrote:
>> On 25/04/16 15:55, Mathieu Poirier wrote:
>>>
>>> On 25 April 2016 at 08:41, Suzuki K Poulose <Suzuki.Poulose@arm.com>
>>> wrote:
>>>>
>>>> On 22/04/16 18:14, Mathieu Poirier wrote:
>>>>>
>>>>>
>>>>> Accessing the HW configuration register each time the memory
>>>>> width is needed simply doesn't make sense. It is much more
>>>>> efficient to read the value once and keep a reference for
>>>>> later use.
>>>>>
>>>>> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
>>>>> ---
>>>>> drivers/hwtracing/coresight/coresight-tmc-etf.c | 14 +---------
>>>>> drivers/hwtracing/coresight/coresight-tmc.c | 34
>>>>> +++++++++++++++++++++++++
>>>>> drivers/hwtracing/coresight/coresight-tmc.h | 10 +++++---
>>>>> 3 files changed, 41 insertions(+), 17 deletions(-)
>>>>>
>>>>> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>>>> b/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>>>> index cc88c15ba45c..981c5ca75e36 100644
>>>>> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>>>> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>>>> @@ -41,25 +41,13 @@ void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
>>>>>
>>>>> static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
>>>>> {
>>>>> - enum tmc_mem_intf_width memwidth;
>>>>> - u8 memwords;
>>>>> char *bufp;
>>>>> u32 read_data;
>>>>> int i;
>>>>>
>>>>> - memwidth = BMVAL(readl_relaxed(drvdata->base + CORESIGHT_DEVID),
>>>>> 8, 10);
>>>>> - if (memwidth == TMC_MEM_INTF_WIDTH_32BITS)
>>>>> - memwords = 1;
>>>>> - else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS)
>>>>> - memwords = 2;
>>>>> - else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS)
>>>>> - memwords = 4;
>>>>> - else
>>>>> - memwords = 8;
>>>>> -
>>>>> bufp = drvdata->buf;
>>>>> while (1) {
>>>>> - for (i = 0; i < memwords; i++) {
>>>>> + for (i = 0; i < drvdata->memwidth; i++) {
>>>>> read_data = readl_relaxed(drvdata->base +
>>>>> TMC_RRD);
>>>>> if (read_data == 0xFFFFFFFF)
>>>>> return;
>>>>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c
>>>>> b/drivers/hwtracing/coresight/coresight-tmc.c
>>>>> index 55806352b1f1..cb030a09659d 100644
>>>>> --- a/drivers/hwtracing/coresight/coresight-tmc.c
>>>>> +++ b/drivers/hwtracing/coresight/coresight-tmc.c
>>>>> @@ -193,6 +193,39 @@ static const struct file_operations tmc_fops = {
>>>>> .llseek = no_llseek,
>>>>> };
>>>>>
>>>>> +static enum tmc_mem_intf_width tmc_get_memwidth(u32 devid)
>>>>> +{
>>>>> + enum tmc_mem_intf_width memwidth;
>>>>> +
>>>>> + /*
>>>>> + * Excerpt from the TRM:
>>>>> + *
>>>>> + * DEVID::MEMWIDTH[10:8]
>>>>> + * 0x2 Memory interface databus is 32 bits wide.
>>>>> + * 0x3 Memory interface databus is 64 bits wide.
>>>>> + * 0x4 Memory interface databus is 128 bits wide.
>>>>> + * 0x5 Memory interface databus is 256 bits wide.
>>>>> + */
>>>>> + switch (BMVAL(devid, 8, 10)) {
>>>>> + case 0x2:
>>>>> + memwidth = TMC_MEM_INTF_WIDTH_32BITS;
>>>>> + break;
>>>>> + case 0x3:
>>>>> + memwidth = TMC_MEM_INTF_WIDTH_64BITS;
>>>>> + break;
>>>>> + case 0x4:
>>>>> + memwidth = TMC_MEM_INTF_WIDTH_128BITS;
>>>>> + break;
>>>>> + case 0x5:
>>>>> + memwidth = TMC_MEM_INTF_WIDTH_256BITS;
>>>>> + break;
>>>>> + default:
>>>>> + memwidth = 0;
>>>>> + }
>>>>> +
>>>>> + return memwidth;
>>>>> +}
>>>>> +
>>>>> #define coresight_tmc_simple_func(name, offset)
>>>>> \
>>>>> coresight_simple_func(struct tmc_drvdata, name, offset)
>>>>>
>>>>> @@ -306,6 +339,7 @@ static int tmc_probe(struct amba_device *adev, const
>>>>> struct amba_id *id)
>>>>>
>>>>> devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
>>>>> drvdata->config_type = BMVAL(devid, 6, 7);
>>>>> + drvdata->memwidth = tmc_get_memwidth(devid);
>>>>>
>>>>> if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
>>>>> if (np)
>>>>> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h
>>>>> b/drivers/hwtracing/coresight/coresight-tmc.h
>>>>> index 9b4c215d2b6b..12a097f3d06c 100644
>>>>> --- a/drivers/hwtracing/coresight/coresight-tmc.h
>>>>> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
>>>>> @@ -81,10 +81,10 @@ enum tmc_mode {
>>>>> };
>>>>>
>>>>> enum tmc_mem_intf_width {
>>>>> - TMC_MEM_INTF_WIDTH_32BITS = 0x2,
>>>>> - TMC_MEM_INTF_WIDTH_64BITS = 0x3,
>>>>> - TMC_MEM_INTF_WIDTH_128BITS = 0x4,
>>>>> - TMC_MEM_INTF_WIDTH_256BITS = 0x5,
>>>>> + TMC_MEM_INTF_WIDTH_32BITS = 1,
>>>>> + TMC_MEM_INTF_WIDTH_64BITS = 2,
>>>>> + TMC_MEM_INTF_WIDTH_128BITS = 4,
>>>>> + TMC_MEM_INTF_WIDTH_256BITS = 8,
>>>>> };
>>>>
>>>>
>>>>
>>>> I think this would cause confusion for the reader. It would be good to
>>>> leave the definitions above as before and tmc_get_memwidth() doing:
>>>>
>>>> i.e,
>>>> case TMC_MEM_INTF_WIDTH_32BITS:
>>>> memwidth = 1;
>>>> break;
>>>>
>>>> But we still store the memwidth in bytes.
>>>
>>>
>>> If we proceed this way we have to do a case statement on hard coded
>>> values (or introduce a new enumeration) in tmc_update_etf_buffer(). In
>>
>>
>> But then we are doing that already with this patch in tmc_get_memwidth
>> already.
>
> Right. With my approach we use hard coded values once and named
> symbols every time we need access to memwidth. With your approach we
> use name symbols once and hard coded values (along with a lengthy
> comment) every time memwidth is accessed.
That lengthy comment already exists as part of your patch. All I was saying
is you could reduce the switch..case for width to an if () for hard coded
value check, which is only done for mask generation.
Suzuki
next prev parent reply other threads:[~2016-04-25 15:28 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-22 17:13 [PATCH V3 00/18] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-04-22 17:13 ` [PATCH V3 01/18] coresight: tmc: modifying naming convention Mathieu Poirier
2016-04-22 17:13 ` [PATCH V3 02/18] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 03/18] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 04/18] coresight: tmc: clearly define number of transfers per burst Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 05/18] coresight: tmc: introducing new header file Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 06/18] coresight: tmc: cleaning up " Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 07/18] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 08/18] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 09/18] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-25 10:20 ` Suzuki K Poulose
2016-04-25 14:24 ` Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 10/18] coresight: tmc: getting the right read_count on tmc_open() Mathieu Poirier
2016-04-25 10:47 ` Suzuki K Poulose
2016-04-25 14:25 ` Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 11/18] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 12/18] coresight: tmc: dump system memory content only when needed Mathieu Poirier
2016-04-25 11:16 ` Suzuki K Poulose
2016-04-25 14:38 ` Mathieu Poirier
2016-04-25 14:49 ` Suzuki K Poulose
2016-04-22 17:14 ` [PATCH V3 13/18] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-04-25 14:32 ` Suzuki K Poulose
2016-04-25 14:48 ` Mathieu Poirier
2016-04-25 14:52 ` Suzuki K Poulose
2016-04-25 15:05 ` Mathieu Poirier
2016-04-25 15:11 ` Suzuki K Poulose
2016-04-25 15:18 ` Mathieu Poirier
2016-04-26 9:23 ` Suzuki K Poulose
2016-04-22 17:14 ` [PATCH V3 14/18] coresight: tmc: keep track of memory width Mathieu Poirier
2016-04-25 14:41 ` Suzuki K Poulose
2016-04-25 14:55 ` Mathieu Poirier
2016-04-25 15:09 ` Suzuki K Poulose
2016-04-25 15:25 ` Mathieu Poirier
2016-04-25 15:28 ` Suzuki K Poulose [this message]
2016-04-22 17:14 ` [PATCH V3 15/18] coresight: moving struct cs_buffers to header file Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 16/18] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 17/18] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-04-22 17:14 ` [PATCH V3 18/18] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
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