From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 47/54] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init
Date: Tue, 3 May 2016 16:02:57 +0100 [thread overview]
Message-ID: <5728BDA1.7050002@arm.com> (raw)
In-Reply-To: <1461861973-26464-48-git-send-email-andre.przywara@arm.com>
On 28/04/16 17:46, Andre Przywara wrote:
> From: Eric Auger <eric.auger@linaro.org>
>
> Implements kvm_vgic_hyp_init and vgic_probe function.
>
> The vgic_global struct is enriched with new fields populated
> by those functions.
>
> Signed-off-by: Eric Auger <eric.auger@linaro.org>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Changelog v1 .. v2:
> - rename vgic_init.c to vgic-init.c
>
> include/kvm/vgic/vgic.h | 1 +
> virt/kvm/arm/vgic/vgic-init.c | 122 ++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/vgic/vgic-v2.c | 90 +++++++++++++++++++++++++++++++
> virt/kvm/arm/vgic/vgic-v3.c | 74 +++++++++++++++++++++++++
> virt/kvm/arm/vgic/vgic.h | 6 +++
> 5 files changed, 293 insertions(+)
> create mode 100644 virt/kvm/arm/vgic/vgic-init.c
>
> diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h
> index cfc3640..d144e3d 100644
> --- a/include/kvm/vgic/vgic.h
> +++ b/include/kvm/vgic/vgic.h
> @@ -202,6 +202,7 @@ struct vgic_cpu {
> };
>
> int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
> +int kvm_vgic_hyp_init(void);
>
> int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
> bool level);
> diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgic/vgic-init.c
> new file mode 100644
> index 0000000..d7c50bb
> --- /dev/null
> +++ b/virt/kvm/arm/vgic/vgic-init.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright (C) 2015, 2016 ARM Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/uaccess.h>
> +#include <linux/interrupt.h>
> +#include <linux/cpu.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/kvm_host.h>
> +#include <kvm/vgic/vgic.h>
> +#include <asm/kvm_mmu.h>
> +#include "vgic.h"
> +
> +/* GENERIC PROBE */
> +
> +static void vgic_init_maintenance_interrupt(void *info)
> +{
> + enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0);
> +}
> +
> +static int vgic_cpu_notify(struct notifier_block *self,
> + unsigned long action, void *cpu)
> +{
> + switch (action) {
> + case CPU_STARTING:
> + case CPU_STARTING_FROZEN:
> + vgic_init_maintenance_interrupt(NULL);
> + break;
> + case CPU_DYING:
> + case CPU_DYING_FROZEN:
> + disable_percpu_irq(kvm_vgic_global_state.maint_irq);
> + break;
> + }
> +
> + return NOTIFY_OK;
> +}
> +
> +static struct notifier_block vgic_cpu_nb = {
> + .notifier_call = vgic_cpu_notify,
> +};
> +
> +static irqreturn_t vgic_maintenance_handler(int irq, void *data)
> +{
> + /*
> + * We cannot rely on the vgic maintenance interrupt to be
> + * delivered synchronously. This means we can only use it to
> + * exit the VM, and we perform the handling of EOIed
> + * interrupts on the exit path (see vgic_process_maintenance).
> + */
> + return IRQ_HANDLED;
> +}
> +
> +static const struct of_device_id vgic_ids[] = {
> + { .compatible = "arm,cortex-a15-gic", .data = vgic_v2_probe, },
> + { .compatible = "arm,cortex-a7-gic", .data = vgic_v2_probe, },
> + { .compatible = "arm,gic-400", .data = vgic_v2_probe, },
> + { .compatible = "arm,gic-v3", .data = vgic_v3_probe, },
> + {},
> +};
> +
> +/**
> + * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable
> + * according to the host GIC model. Accordingly calls either
> + * vgic_v2/v3_probe which registers the KVM_DEVICE that can be
> + * instantiated by a guest later on .
> + */
> +int kvm_vgic_hyp_init(void)
> +{
> + const struct of_device_id *matched_id;
> + const int (*vgic_probe)(struct device_node *);
> + struct device_node *vgic_node;
> + int ret;
> +
> + vgic_node = of_find_matching_node_and_match(NULL,
> + vgic_ids, &matched_id);
> + if (!vgic_node) {
> + kvm_err("error: no compatible GIC node found\n");
> + return -ENODEV;
> + }
> +
> + vgic_probe = matched_id->data;
> + ret = vgic_probe(vgic_node);
> + if (ret)
> + return ret;
> +
> + ret = request_percpu_irq(kvm_vgic_global_state.maint_irq,
> + vgic_maintenance_handler,
> + "vgic", kvm_get_running_vcpus());
> + if (ret) {
> + kvm_err("Cannot register interrupt %d\n",
> + kvm_vgic_global_state.maint_irq);
> + return ret;
> + }
> +
> + ret = __register_cpu_notifier(&vgic_cpu_nb);
> + if (ret) {
> + kvm_err("Cannot register vgic CPU notifier\n");
> + goto out_free_irq;
> + }
> +
> + on_each_cpu(vgic_init_maintenance_interrupt, NULL, 1);
> +
> + return 0;
> +
> +out_free_irq:
> + free_percpu_irq(kvm_vgic_global_state.maint_irq,
> + kvm_get_running_vcpus());
> + return ret;
> +}
> diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c
> index 70cac63..00dc166 100644
> --- a/virt/kvm/arm/vgic/vgic-v2.c
> +++ b/virt/kvm/arm/vgic/vgic-v2.c
> @@ -17,6 +17,11 @@
> #include <linux/irqchip/arm-gic.h>
> #include <linux/kvm.h>
> #include <linux/kvm_host.h>
> +#include <kvm/vgic/vgic.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <asm/kvm_mmu.h>
>
> #include "vgic.h"
>
> @@ -205,3 +210,88 @@ void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
> vmcrp->pmr = (vmcr & GICH_VMCR_PRIMASK_MASK) >>
> GICH_VMCR_PRIMASK_SHIFT;
> }
> +
> +/**
> + * vgic_v2_probe - probe for a GICv2 compatible interrupt controller in DT
> + * @node: pointer to the DT node
> + *
> + * Returns 0 if a GICv2 has been found, returns an error code otherwise
> + */
> +int vgic_v2_probe(struct device_node *vgic_node)
> +{
> + int ret;
> + struct resource vctrl_res;
> + struct resource vcpu_res;
> +
> + kvm_vgic_global_state.maint_irq = irq_of_parse_and_map(vgic_node, 0);
> + if (!kvm_vgic_global_state.maint_irq) {
> + kvm_err("error getting vgic maintenance irq from DT\n");
> + ret = -ENXIO;
> + goto out;
> + }
> +
> + ret = of_address_to_resource(vgic_node, 2, &vctrl_res);
> + if (ret) {
> + kvm_err("Cannot obtain GICH resource\n");
> + goto out;
> + }
> +
> + kvm_vgic_global_state.vctrl_base = of_iomap(vgic_node, 2);
> + if (!kvm_vgic_global_state.vctrl_base) {
> + kvm_err("Cannot ioremap GICH\n");
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + kvm_vgic_global_state.nr_lr =
> + readl_relaxed(kvm_vgic_global_state.vctrl_base + GICH_VTR);
> + kvm_vgic_global_state.nr_lr = (kvm_vgic_global_state.nr_lr & 0x3f) + 1;
> +
> + ret = create_hyp_io_mappings(kvm_vgic_global_state.vctrl_base,
> + kvm_vgic_global_state.vctrl_base +
> + resource_size(&vctrl_res),
> + vctrl_res.start);
> + if (ret) {
> + kvm_err("Cannot map VCTRL into hyp\n");
> + goto out_unmap;
> + }
> +
> + if (of_address_to_resource(vgic_node, 3, &vcpu_res)) {
> + kvm_err("Cannot obtain GICV resource\n");
> + ret = -ENXIO;
> + goto out_unmap;
> + }
> +
> + if (!PAGE_ALIGNED(vcpu_res.start)) {
> + kvm_err("GICV physical address 0x%llx not page aligned\n",
> + (unsigned long long)vcpu_res.start);
> + ret = -ENXIO;
> + goto out_unmap;
> + }
> +
> + if (!PAGE_ALIGNED(resource_size(&vcpu_res))) {
> + kvm_err("GICV size 0x%llx not a multiple of page size 0x%lx\n",
> + (unsigned long long)resource_size(&vcpu_res),
> + PAGE_SIZE);
> + ret = -ENXIO;
> + goto out_unmap;
> + }
> +
> + kvm_vgic_global_state.can_emulate_gicv2 = true;
> + kvm_register_vgic_device(KVM_DEV_TYPE_ARM_VGIC_V2);
> +
> + kvm_vgic_global_state.vcpu_base = vcpu_res.start;
> +
> + kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
> + vctrl_res.start, kvm_vgic_global_state.maint_irq);
> +
> + kvm_vgic_global_state.type = VGIC_V2;
> + kvm_vgic_global_state.max_gic_vcpus = VGIC_V2_MAX_CPUS;
> + goto out;
> +
> +out_unmap:
> + iounmap(kvm_vgic_global_state.vctrl_base);
> +out:
> + of_node_put(vgic_node);
> + return ret;
> +}
> diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
> index 2c55bd5..a2026c2 100644
> --- a/virt/kvm/arm/vgic/vgic-v3.c
> +++ b/virt/kvm/arm/vgic/vgic-v3.c
> @@ -16,9 +16,17 @@
> #include <linux/kvm.h>
> #include <linux/kvm_host.h>
> #include <linux/irqchip/arm-gic.h>
> +#include <kvm/vgic/vgic.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <asm/kvm_mmu.h>
> +#include <asm/kvm_asm.h>
>
> #include "vgic.h"
>
> +static u32 ich_vtr_el2;
> +
This can be dropped...
> void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu)
> {
> struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3;
> @@ -189,3 +197,69 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
> vmcrp->bpr = (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;
> vmcrp->pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
> }
> +
> +/**
> + * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
> + * @node: pointer to the DT node
> + *
> + * Returns 0 if a GICv3 has been found, returns an error code otherwise
> + */
> +int vgic_v3_probe(struct device_node *vgic_node)
> +{
> + int ret = 0;
> + u32 gicv_idx;
> + struct resource vcpu_res;
and defined here (no need for a global variable anymore now that we have
a global state).
> +
> + kvm_vgic_global_state.maint_irq = irq_of_parse_and_map(vgic_node, 0);
> + if (!kvm_vgic_global_state.maint_irq) {
> + kvm_err("error getting vgic maintenance irq from DT\n");
> + ret = -ENXIO;
> + goto out;
> + }
> +
> + ich_vtr_el2 = kvm_call_hyp(__vgic_v3_get_ich_vtr_el2);
> +
> + /*
> + * The ListRegs field is 5 bits, but there is a architectural
> + * maximum of 16 list registers. Just ignore bit 4...
> + */
> + kvm_vgic_global_state.nr_lr = (ich_vtr_el2 & 0xf) + 1;
> + kvm_vgic_global_state.can_emulate_gicv2 = false;
> +
> + if (of_property_read_u32(vgic_node, "#redistributor-regions",
> + &gicv_idx))
> + gicv_idx = 1;
> +
> + gicv_idx += 3; /* Also skip GICD, GICC, GICH */
> + if (of_address_to_resource(vgic_node, gicv_idx, &vcpu_res)) {
> + kvm_info("GICv3: no GICV resource entry\n");
> + kvm_vgic_global_state.vcpu_base = 0;
> + } else if (!PAGE_ALIGNED(vcpu_res.start)) {
> + pr_warn("GICV physical address 0x%llx not page aligned\n",
> + (unsigned long long)vcpu_res.start);
> + kvm_vgic_global_state.vcpu_base = 0;
> + } else if (!PAGE_ALIGNED(resource_size(&vcpu_res))) {
> + pr_warn("GICV size 0x%llx not a multiple of page size 0x%lx\n",
> + (unsigned long long)resource_size(&vcpu_res),
> + PAGE_SIZE);
> + kvm_vgic_global_state.vcpu_base = 0;
> + } else {
> + kvm_vgic_global_state.vcpu_base = vcpu_res.start;
> + kvm_vgic_global_state.can_emulate_gicv2 = true;
> + kvm_register_vgic_device(KVM_DEV_TYPE_ARM_VGIC_V2);
> + }
> + if (kvm_vgic_global_state.vcpu_base == 0)
> + kvm_info("disabling GICv2 emulation\n");
> + kvm_register_vgic_device(KVM_DEV_TYPE_ARM_VGIC_V3);
> +
> + kvm_vgic_global_state.vctrl_base = NULL;
> + kvm_vgic_global_state.type = VGIC_V3;
> + kvm_vgic_global_state.max_gic_vcpus = VGIC_V3_MAX_CPUS;
> +
> + kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
> + vcpu_res.start, kvm_vgic_global_state.maint_irq);
> +
> +out:
> + of_node_put(vgic_node);
> + return ret;
> +}
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index ea72f32..d6fe7b4 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -41,6 +41,7 @@ int vgic_v2_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
> int vgic_v2_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr);
> void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
> void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
> +int vgic_v2_probe(struct device_node *vgic_node);
>
> #ifdef CONFIG_KVM_ARM_VGIC_V3
> void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu);
> @@ -50,6 +51,7 @@ void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr);
> void vgic_v3_set_underflow(struct kvm_vcpu *vcpu);
> void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
> void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
> +int vgic_v3_probe(struct device_node *vgic_node);
> #else
> static inline void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu)
> {
> @@ -82,6 +84,10 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
> {
> }
>
> +static inline int vgic_v3_probe(struct device_node *vgic_node)
> +{
> + return -ENODEV;
> +}
> #endif
>
> void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
>
Depending on the merge order with Julien's series, it could be worth
squashing my rework into this patch.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2016-05-03 15:02 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-28 16:45 [PATCH v2 00/54] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-04-28 16:45 ` [PATCH v2 01/54] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-04-28 16:45 ` [PATCH v2 02/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-04-28 16:45 ` [PATCH v2 03/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-04-28 16:45 ` [PATCH v2 04/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-04-28 16:45 ` [PATCH v2 05/54] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-03 12:15 ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 06/54] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-02 16:44 ` Eric Auger
2016-05-04 10:37 ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 07/54] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-03 22:22 ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 08/54] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-04-28 16:45 ` [PATCH v2 09/54] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-04-28 16:45 ` [PATCH v2 10/54] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-04-28 16:45 ` [PATCH v2 11/54] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-04-28 16:45 ` [PATCH v2 12/54] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-04-28 16:45 ` [PATCH v2 13/54] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-04-28 16:45 ` [PATCH v2 14/54] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-03 23:46 ` Tom Hanson
2016-05-05 11:24 ` Andre Przywara
2016-05-05 14:43 ` Marc Zyngier
2016-05-05 16:34 ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 15/54] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-04-28 16:45 ` [PATCH v2 16/54] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-05 16:23 ` Tom Hanson
2016-05-05 16:44 ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 17/54] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-02 12:16 ` Marc Zyngier
2016-05-03 8:26 ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-03 16:16 ` Marc Zyngier
2016-05-04 13:30 ` Andre Przywara
2016-05-04 13:54 ` Marc Zyngier
2016-05-04 14:21 ` [PATCH] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-04 14:28 ` Marc Zyngier
2016-05-05 17:04 ` [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend Tom Hanson
2016-04-28 16:45 ` [PATCH v2 19/54] KVM: arm/arm64: vgic-new: Implement Andre Przywara
2016-05-02 12:24 ` Eric Auger
2016-05-03 8:26 ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 20/54] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-04-28 16:45 ` [PATCH v2 21/54] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-03 15:32 ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 22/54] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-04-28 16:45 ` [PATCH v2 23/54] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-04-28 16:45 ` [PATCH v2 24/54] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-04-28 16:45 ` [PATCH v2 25/54] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-04-28 16:45 ` [PATCH v2 26/54] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-05 16:48 ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 27/54] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-04-28 16:45 ` [PATCH v2 28/54] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-04-28 16:45 ` [PATCH v2 29/54] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-04-28 16:45 ` [PATCH v2 30/54] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-04-28 16:45 ` [PATCH v2 31/54] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-04-28 16:45 ` [PATCH v2 32/54] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-04-29 14:04 ` Vladimir Murzin
2016-04-29 14:22 ` Vladimir Murzin
2016-05-02 8:38 ` Christoffer Dall
2016-05-02 16:13 ` Eric Auger
2016-05-05 17:55 ` Andre Przywara
2016-05-03 15:34 ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 33/54] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-04-28 16:45 ` [PATCH v2 34/54] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-04-28 16:45 ` [PATCH v2 35/54] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-04-28 16:45 ` [PATCH v2 36/54] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-04-28 16:45 ` [PATCH v2 37/54] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-04-28 16:45 ` [PATCH v2 38/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-04-28 16:45 ` [PATCH v2 39/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-04-28 16:45 ` [PATCH v2 40/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-04-28 16:46 ` [PATCH v2 41/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-04-28 16:46 ` [PATCH v2 42/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-03 9:59 ` Marc Zyngier
2016-05-03 10:09 ` Andre Przywara
2016-05-03 10:12 ` Marc Zyngier
2016-05-03 10:16 ` Marc Zyngier
2016-05-03 16:07 ` [PATCH] KVM: arm/arm64: new-vgic: add proper GICv2 CPU interface userland access Andre Przywara
2016-05-03 17:00 ` Marc Zyngier
2016-05-03 17:59 ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 43/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-04-28 16:46 ` [PATCH v2 44/54] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-04-28 16:46 ` [PATCH v2 45/54] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-04-28 16:46 ` [PATCH v2 46/54] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-03 10:21 ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 47/54] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-03 15:02 ` Marc Zyngier [this message]
2016-05-03 15:35 ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 48/54] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-04-28 16:46 ` [PATCH v2 49/54] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-04-28 16:46 ` [PATCH v2 50/54] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-03 10:47 ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 51/54] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-04-28 16:46 ` [PATCH v2 52/54] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-04-28 16:46 ` [PATCH v2 53/54] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-04-28 16:46 ` [PATCH v2 54/54] KVM: arm/arm64: vgic-new: enable build Andre Przywara
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