From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] clocksource/arm_arch_timer: Force per-CPU interrupt to trigger on level-high
Date: Mon, 9 May 2016 14:27:12 +0100 [thread overview]
Message-ID: <57309030.8040907@arm.com> (raw)
In-Reply-To: <1462799197-31286-1-git-send-email-marc.zyngier@arm.com>
On 09/05/16 14:06, Marc Zyngier wrote:
> The ARM architected timer produces level-triggered interrupts (this
> is mandated by the architecture). Unfortunately, most device-trees
> get this wrong, and expose an edge-triggered interrupt.
>
> Until now, this wasn't too much an issue, as the programming of the
> trigger would fail (the corresponding PPI cannot be reconfigured),
> and the kernel would be happy with this. But we're about to change
> this, and trust DT a lot if the driver doesn't provide its own
> trigger information. In that context, the timer breaks badly.
>
> While we do need to fix the DTs, there is also some userspace out
> there (kvmtool) that generates the same kind of broken DT on the
> fly, and that will completely break with newer kernels.
>
> As a safety measure, and to keep buggy software alive as well as
> buying us some time to fix DTs all over the place, let's enforce
> the interrupt trigger in the timer driver. This doesn't cost
> us anything, and ensures that this will work in all situations,
> broken DT or not.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> drivers/clocksource/arm_arch_timer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 5152b38..fdf367ae 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -366,7 +366,7 @@ static int arch_timer_setup(struct clock_event_device *clk)
> {
> __arch_timer_setup(ARCH_CP15_TIMER, clk);
>
> - enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], 0);
> + enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], IRQF_TRIGGER_HIGH);
Looking at it a bit more, it looks like it is should be a TRIGGER_LOW
(the ARM GIC doesn't distinguish between levels, but other
implementations might be able to). Oh well.
I'll respin this shortly.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
prev parent reply other threads:[~2016-05-09 13:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 13:06 [PATCH] clocksource/arm_arch_timer: Force per-CPU interrupt to trigger on level-high Marc Zyngier
2016-05-09 13:27 ` Marc Zyngier [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=57309030.8040907@arm.com \
--to=marc.zyngier@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).