From: vladimir.murzin@arm.com (Vladimir Murzin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/10] ARM: V7M: Make read_cpuid() generally available on V7M.
Date: Mon, 13 Jun 2016 17:21:18 +0100 [thread overview]
Message-ID: <575EDD7E.20202@arm.com> (raw)
In-Reply-To: <20160613151517.GV1041@n2100.armlinux.org.uk>
On 13/06/16 16:15, Russell King - ARM Linux wrote:
> On Mon, Jun 13, 2016 at 04:03:01PM +0100, Vladimir Murzin wrote:
>> This requires a custom specialisation for each of the CPUID_* registers, and
>> as more than just CPUID_ID may be implemented in the future this doesn't
>> make much sense.
>
> You shouldn't need most of this patch. The CPUID registers are defined
> in such a way that unimplemented registers do not fault, but return the
> MIDR value. If you're just implementing MIDR, then you should just
> return the MIDR value and be done with it.
>
> (Any location reading the other CPUID registers without checking whether
> it's a MIDR alias is probably buggy.)
>
I'll think on it more. Thanks for feedback!
Cheers
Vladimir
next prev parent reply other threads:[~2016-06-13 16:21 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 15:02 [PATCH 00/10] ARM: V7M: Support caches Vladimir Murzin
2016-06-13 15:03 ` [PATCH 01/10] ARM: factor out CSSELR/CCSIDR operations that use cp15 directly Vladimir Murzin
2016-06-13 15:03 ` [PATCH 02/10] ARM: V7M: Make read_cpuid() generally available on V7M Vladimir Murzin
2016-06-13 15:15 ` Russell King - ARM Linux
2016-06-13 16:21 ` Vladimir Murzin [this message]
2016-06-13 15:03 ` [PATCH 03/10] ARM: V7M: Add addresses for mem-mapped V7M cache operations Vladimir Murzin
2016-06-13 15:03 ` [PATCH 04/10] ARM: V7M: Add support for reading the CTR with CPUID_CACHETYPE Vladimir Murzin
2016-06-13 15:03 ` [PATCH 05/10] ARM: Extract cp15 operations from cache flush code Vladimir Murzin
2016-06-13 15:03 ` [PATCH 06/10] ARM: V7M: Implement cache macros for V7M Vladimir Murzin
2016-06-13 15:18 ` Russell King - ARM Linux
2016-06-13 16:27 ` Vladimir Murzin
2016-06-13 16:29 ` Russell King - ARM Linux
2016-06-13 16:34 ` Vladimir Murzin
2016-06-13 15:03 ` [PATCH 07/10] ARM: V7M: fix notrace variant of save_and_disable_irqs Vladimir Murzin
2016-06-13 15:03 ` [PATCH 08/10] ARM: V7M: Wire up caches for V7M processors with cache support Vladimir Murzin
2016-06-13 15:03 ` [PATCH 09/10] ARM: V7M: Indirect proc_info construction for V7M CPUs Vladimir Murzin
2016-06-13 15:03 ` [PATCH 10/10] ARM: V7M: Add support for the Cortex-M7 processor Vladimir Murzin
2016-06-13 16:09 ` [PATCH 00/10] ARM: V7M: Support caches Alexandre Torgue
2016-06-13 16:19 ` Vladimir Murzin
2016-06-13 16:29 ` Alexandre Torgue
2016-06-15 10:14 ` Alexandre Torgue
2016-06-15 12:43 ` Vladimir Murzin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=575EDD7E.20202@arm.com \
--to=vladimir.murzin@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).