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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] irqchip/gicv3-its: Enable cacheable attribute Read-allocate hints
Date: Tue, 30 Aug 2016 09:42:45 +0100	[thread overview]
Message-ID: <57C54705.4070209@arm.com> (raw)
In-Reply-To: <11225da6-559e-c1bd-2ba5-a941595d6532@codeaurora.org>

On 29/08/16 16:35, Shanker Donthineni wrote:
> Marc,
> 
> Are you planning to push this change? I talked to Qualcomm ITS hw team 
> and they told me nice to have this change even though we see a small gain.

Hi Shanker,

As I asked before, I'd like to know what is the actual gain on real HW,
and how you measured it, so that I can try and make sure this doesn't
introduce regressions on other implementations. If it does, then we'll
probably have to quirk it.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

      reply	other threads:[~2016-08-30  8:42 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-12  3:36 [PATCH] irqchip/gicv3-its: Enable cacheable attribute Read-allocate hints Shanker Donthineni
2016-07-12  8:09 ` Marc Zyngier
2016-07-12 13:32   ` Shanker Donthineni
2016-08-29 15:35     ` Shanker Donthineni
2016-08-30  8:42       ` Marc Zyngier [this message]

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